
#if (NUCODEGEN_PDMA)
/*************************************/
/**             PDMA                **/
/*************************************/
#if ((NUCODEGEN_PDMA_CH0_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)||(NUCODEGEN_PDMA_CH1_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)||(NUCODEGEN_PDMA_CH2_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)||(NUCODEGEN_PDMA_CH3_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)||(NUCODEGEN_PDMA_CH4_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)||(NUCODEGEN_PDMA_CH5_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)||(NUCODEGEN_PDMA_CH6_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)||(NUCODEGEN_PDMA_CH7_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)||(NUCODEGEN_PDMA_CH8_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER))
typedef struct dma_desc_t
{
    uint32_t u32Ctl;
    uint32_t u32Src;
    uint32_t u32Dest;
    uint32_t u32Offset;
} DMA_DESC_T;
#endif

#if(NUCODEGEN_PDMA_CH0_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH0[5];
#elif(NUCODEGEN_PDMA_CH0_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH0[4];
#elif(NUCODEGEN_PDMA_CH0_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH0[3];
#elif(NUCODEGEN_PDMA_CH0_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH0[2];
#else
DMA_DESC_T DMA_DESC_CH0[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH1_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH1[5];
#elif(NUCODEGEN_PDMA_CH1_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH1[4];
#elif(NUCODEGEN_PDMA_CH1_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH1[3];
#elif(NUCODEGEN_PDMA_CH1_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH1[2];
#else
DMA_DESC_T DMA_DESC_CH1[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH2_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH2[5];
#elif(NUCODEGEN_PDMA_CH2_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH2[4];
#elif(NUCODEGEN_PDMA_CH2_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH2[3];
#elif(NUCODEGEN_PDMA_CH2_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH2[2];
#else
DMA_DESC_T DMA_DESC_CH2[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH3_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH3[5];
#elif(NUCODEGEN_PDMA_CH3_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH3[4];
#elif(NUCODEGEN_PDMA_CH3_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH3[3];
#elif(NUCODEGEN_PDMA_CH3_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH3[2];
#else
DMA_DESC_T DMA_DESC_CH3[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH4_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH4[5];
#elif(NUCODEGEN_PDMA_CH4_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH4[4];
#elif(NUCODEGEN_PDMA_CH4_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH4[3];
#elif(NUCODEGEN_PDMA_CH4_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH4[2];
#else
DMA_DESC_T DMA_DESC_CH4[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH5_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH5[5];
#elif(NUCODEGEN_PDMA_CH5_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH5[4];
#elif(NUCODEGEN_PDMA_CH5_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH5[3];
#elif(NUCODEGEN_PDMA_CH5_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH5[2];
#else
DMA_DESC_T DMA_DESC_CH5[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH6_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH6[5];
#elif(NUCODEGEN_PDMA_CH6_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH6[4];
#elif(NUCODEGEN_PDMA_CH6_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH6[3];
#elif(NUCODEGEN_PDMA_CH6_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH6[2];
#else
DMA_DESC_T DMA_DESC_CH6[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH7_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH7[5];
#elif(NUCODEGEN_PDMA_CH7_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH7[4];
#elif(NUCODEGEN_PDMA_CH7_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH7[3];
#elif(NUCODEGEN_PDMA_CH7_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH7[2];
#else
DMA_DESC_T DMA_DESC_CH7[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH8_OPMODE_S==NUCODEGEN_PDMA_OP_SCATTER)
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH8[5];
#elif(NUCODEGEN_PDMA_CH8_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH8[4];
#elif(NUCODEGEN_PDMA_CH8_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH8[3];
#elif(NUCODEGEN_PDMA_CH8_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
DMA_DESC_T DMA_DESC_CH8[2];
#else
DMA_DESC_T DMA_DESC_CH8[1];
#endif
#endif

#if(NUCODEGEN_PDMA_CH0_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH0_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0SrcArray[PDMA_CH0_DATA_LENGTH];
uint8_t* g_pu8CH0SrcArray;
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0SrcArray[PDMA_CH0_DATA_LENGTH];
uint16_t* g_pu16CH0SrcArray;
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0SrcArray[PDMA_CH0_DATA_LENGTH];
uint32_t* g_pu32CH0SrcArray;
#endif /*NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH0_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0SrcArrayTB0[PDMA_CH0_DATA_LENGTH_TB0];
uint8_t* g_pu8CH0SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0SrcArrayTB0[PDMA_CH0_DATA_LENGTH_TB0];
uint16_t* g_pu16CH0SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0SrcArrayTB0[PDMA_CH0_DATA_LENGTH_TB0];
uint32_t* g_pu32CH0SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0SrcArrayTB1[PDMA_CH0_DATA_LENGTH_TB1];
uint8_t* g_pu8CH0SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0SrcArrayTB1[PDMA_CH0_DATA_LENGTH_TB1];
uint16_t* g_pu16CH0SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0SrcArrayTB1[PDMA_CH0_DATA_LENGTH_TB1];
uint32_t* g_pu32CH0SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0SrcArrayTB2[PDMA_CH0_DATA_LENGTH_TB2];
uint8_t* g_pu8CH0SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0SrcArrayTB2[PDMA_CH0_DATA_LENGTH_TB2];
uint16_t* g_pu16CH0SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0SrcArrayTB2[PDMA_CH0_DATA_LENGTH_TB2];
uint32_t* g_pu32CH0SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0SrcArrayTB3[PDMA_CH0_DATA_LENGTH_TB3];
uint8_t* g_pu8CH0SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0SrcArrayTB3[PDMA_CH0_DATA_LENGTH_TB3];
uint16_t* g_pu16CH0SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0SrcArrayTB3[PDMA_CH0_DATA_LENGTH_TB3];
uint32_t* g_pu32CH0SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0SrcArrayTB4[PDMA_CH0_DATA_LENGTH_TB4];
uint8_t* g_pu8CH0SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0SrcArrayTB4[PDMA_CH0_DATA_LENGTH_TB4];
uint16_t* g_pu16CH0SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0SrcArrayTB4[PDMA_CH0_DATA_LENGTH_TB4];
uint32_t* g_pu32CH0SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH0_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0DesArray[PDMA_CH0_DATA_LENGTH];
uint8_t* g_pu8CH0DesArray;
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0DesArray[PDMA_CH0_DATA_LENGTH];
uint16_t* g_pu16CH0DesArray;
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0DesArray[PDMA_CH0_DATA_LENGTH];
uint32_t* g_pu32CH0DesArray;
#endif /*NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH0_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0DesArrayTB0[PDMA_CH0_DATA_LENGTH_TB0];
uint8_t* g_pu8CH0DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0DesArrayTB0[PDMA_CH0_DATA_LENGTH_TB0];
uint16_t* g_pu16CH0DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0DesArrayTB0[PDMA_CH0_DATA_LENGTH_TB0];
uint32_t* g_pu32CH0DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0DesArrayTB1[PDMA_CH0_DATA_LENGTH_TB1];
uint8_t* g_pu8CH0DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0DesArrayTB1[PDMA_CH0_DATA_LENGTH_TB1];
uint16_t* g_pu16CH0DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0DesArrayTB1[PDMA_CH0_DATA_LENGTH_TB1];
uint32_t* g_pu32CH0DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0DesArrayTB2[PDMA_CH0_DATA_LENGTH_TB2];
uint8_t* g_pu8CH0DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0DesArrayTB2[PDMA_CH0_DATA_LENGTH_TB2];
uint16_t* g_pu16CH0DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0DesArrayTB2[PDMA_CH0_DATA_LENGTH_TB2];
uint32_t* g_pu32CH0DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0DesArrayTB3[PDMA_CH0_DATA_LENGTH_TB3];
uint8_t* g_pu8CH0DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0DesArrayTB3[PDMA_CH0_DATA_LENGTH_TB3];
uint16_t* g_pu16CH0DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0DesArrayTB3[PDMA_CH0_DATA_LENGTH_TB3];
uint32_t* g_pu32CH0DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH0DesArrayTB4[PDMA_CH0_DATA_LENGTH_TB4];
uint8_t* g_pu8CH0DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH0DesArrayTB4[PDMA_CH0_DATA_LENGTH_TB4];
uint16_t* g_pu16CH0DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH0DesArrayTB4[PDMA_CH0_DATA_LENGTH_TB4];
uint32_t* g_pu32CH0DesArrayTB4;
#endif
#endif
#endif
#endif

#if(NUCODEGEN_PDMA_CH1_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH1_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1SrcArray[PDMA_CH1_DATA_LENGTH];
uint8_t* g_pu8CH1SrcArray;
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1SrcArray[PDMA_CH1_DATA_LENGTH];
uint16_t* g_pu16CH1SrcArray;
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1SrcArray[PDMA_CH1_DATA_LENGTH];
uint32_t* g_pu32CH1SrcArray;
#endif /*NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH1_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1SrcArrayTB0[PDMA_CH1_DATA_LENGTH_TB0];
uint8_t* g_pu8CH1SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1SrcArrayTB0[PDMA_CH1_DATA_LENGTH_TB0];
uint16_t* g_pu16CH1SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1SrcArrayTB0[PDMA_CH1_DATA_LENGTH_TB0];
uint32_t* g_pu32CH1SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1SrcArrayTB1[PDMA_CH1_DATA_LENGTH_TB1];
uint8_t* g_pu8CH1SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1SrcArrayTB1[PDMA_CH1_DATA_LENGTH_TB1];
uint16_t* g_pu16CH1SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1SrcArrayTB1[PDMA_CH1_DATA_LENGTH_TB1];
uint32_t* g_pu32CH1SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1SrcArrayTB2[PDMA_CH1_DATA_LENGTH_TB2];
uint8_t* g_pu8CH1SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1SrcArrayTB2[PDMA_CH1_DATA_LENGTH_TB2];
uint16_t* g_pu16CH1SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1SrcArrayTB2[PDMA_CH1_DATA_LENGTH_TB2];
uint32_t* g_pu32CH1SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1SrcArrayTB3[PDMA_CH1_DATA_LENGTH_TB3];
uint8_t* g_pu8CH1SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1SrcArrayTB3[PDMA_CH1_DATA_LENGTH_TB3];
uint16_t* g_pu16CH1SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1SrcArrayTB3[PDMA_CH1_DATA_LENGTH_TB3];
uint32_t* g_pu32CH1SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1SrcArrayTB4[PDMA_CH1_DATA_LENGTH_TB4];
uint8_t* g_pu8CH1SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1SrcArrayTB4[PDMA_CH1_DATA_LENGTH_TB4];
uint16_t* g_pu16CH1SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1SrcArrayTB4[PDMA_CH1_DATA_LENGTH_TB4];
uint32_t* g_pu32CH1SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH1_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1DesArray[PDMA_CH1_DATA_LENGTH];
uint8_t* g_pu8CH1DesArray;
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1DesArray[PDMA_CH1_DATA_LENGTH];
uint16_t* g_pu16CH1DesArray;
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1DesArray[PDMA_CH1_DATA_LENGTH];
uint32_t* g_pu32CH1DesArray;
#endif /*NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH1_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1DesArrayTB0[PDMA_CH1_DATA_LENGTH_TB0];
uint8_t* g_pu8CH1DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1DesArrayTB0[PDMA_CH1_DATA_LENGTH_TB0];
uint16_t* g_pu16CH1DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1DesArrayTB0[PDMA_CH1_DATA_LENGTH_TB0];
uint32_t* g_pu32CH1DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1DesArrayTB1[PDMA_CH1_DATA_LENGTH_TB1];
uint8_t* g_pu8CH1DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1DesArrayTB1[PDMA_CH1_DATA_LENGTH_TB1];
uint16_t* g_pu16CH1DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1DesArrayTB1[PDMA_CH1_DATA_LENGTH_TB1];
uint32_t* g_pu32CH1DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1DesArrayTB2[PDMA_CH1_DATA_LENGTH_TB2];
uint8_t* g_pu8CH1DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1DesArrayTB2[PDMA_CH1_DATA_LENGTH_TB2];
uint16_t* g_pu16CH1DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1DesArrayTB2[PDMA_CH1_DATA_LENGTH_TB2];
uint32_t* g_pu32CH1DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1DesArrayTB3[PDMA_CH1_DATA_LENGTH_TB3];
uint8_t* g_pu8CH1DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1DesArrayTB3[PDMA_CH1_DATA_LENGTH_TB3];
uint16_t* g_pu16CH1DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1DesArrayTB3[PDMA_CH1_DATA_LENGTH_TB3];
uint32_t* g_pu32CH1DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH1DesArrayTB4[PDMA_CH1_DATA_LENGTH_TB4];
uint8_t* g_pu8CH1DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH1DesArrayTB4[PDMA_CH1_DATA_LENGTH_TB4];
uint16_t* g_pu16CH1DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH1DesArrayTB4[PDMA_CH1_DATA_LENGTH_TB4];
uint32_t* g_pu32CH1DesArrayTB4;
#endif
#endif
#endif
#endif

#if(NUCODEGEN_PDMA_CH2_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH2_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2SrcArray[PDMA_CH2_DATA_LENGTH];
uint8_t* g_pu8CH2SrcArray;
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2SrcArray[PDMA_CH2_DATA_LENGTH];
uint16_t* g_pu16CH2SrcArray;
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2SrcArray[PDMA_CH2_DATA_LENGTH];
uint32_t* g_pu32CH2SrcArray;
#endif /*NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH2_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2SrcArrayTB0[PDMA_CH2_DATA_LENGTH_TB0];
uint8_t* g_pu8CH2SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2SrcArrayTB0[PDMA_CH2_DATA_LENGTH_TB0];
uint16_t* g_pu16CH2SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2SrcArrayTB0[PDMA_CH2_DATA_LENGTH_TB0];
uint32_t* g_pu32CH2SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2SrcArrayTB1[PDMA_CH2_DATA_LENGTH_TB1];
uint8_t* g_pu8CH2SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2SrcArrayTB1[PDMA_CH2_DATA_LENGTH_TB1];
uint16_t* g_pu16CH2SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2SrcArrayTB1[PDMA_CH2_DATA_LENGTH_TB1];
uint32_t* g_pu32CH2SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2SrcArrayTB2[PDMA_CH2_DATA_LENGTH_TB2];
uint8_t* g_pu8CH2SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2SrcArrayTB2[PDMA_CH2_DATA_LENGTH_TB2];
uint16_t* g_pu16CH2SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2SrcArrayTB2[PDMA_CH2_DATA_LENGTH_TB2];
uint32_t* g_pu32CH2SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2SrcArrayTB3[PDMA_CH2_DATA_LENGTH_TB3];
uint8_t* g_pu8CH2SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2SrcArrayTB3[PDMA_CH2_DATA_LENGTH_TB3];
uint16_t* g_pu16CH2SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2SrcArrayTB3[PDMA_CH2_DATA_LENGTH_TB3];
uint32_t* g_pu32CH2SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2SrcArrayTB4[PDMA_CH2_DATA_LENGTH_TB4];
uint8_t* g_pu8CH2SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2SrcArrayTB4[PDMA_CH2_DATA_LENGTH_TB4];
uint16_t* g_pu16CH2SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2SrcArrayTB4[PDMA_CH2_DATA_LENGTH_TB4];
uint32_t* g_pu32CH2SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH2_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2DesArray[PDMA_CH2_DATA_LENGTH];
uint8_t* g_pu8CH2DesArray;
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2DesArray[PDMA_CH2_DATA_LENGTH];
uint16_t* g_pu16CH2DesArray;
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2DesArray[PDMA_CH2_DATA_LENGTH];
uint32_t* g_pu32CH2DesArray;
#endif /*NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH2_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2DesArrayTB0[PDMA_CH2_DATA_LENGTH_TB0];
uint8_t* g_pu8CH2DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2DesArrayTB0[PDMA_CH2_DATA_LENGTH_TB0];
uint16_t* g_pu16CH2DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2DesArrayTB0[PDMA_CH2_DATA_LENGTH_TB0];
uint32_t* g_pu32CH2DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2DesArrayTB1[PDMA_CH2_DATA_LENGTH_TB1];
uint8_t* g_pu8CH2DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2DesArrayTB1[PDMA_CH2_DATA_LENGTH_TB1];
uint16_t* g_pu16CH2DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2DesArrayTB1[PDMA_CH2_DATA_LENGTH_TB1];
uint32_t* g_pu32CH2DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2DesArrayTB2[PDMA_CH2_DATA_LENGTH_TB2];
uint8_t* g_pu8CH2DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2DesArrayTB2[PDMA_CH2_DATA_LENGTH_TB2];
uint16_t* g_pu16CH2DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2DesArrayTB2[PDMA_CH2_DATA_LENGTH_TB2];
uint32_t* g_pu32CH2DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2DesArrayTB3[PDMA_CH2_DATA_LENGTH_TB3];
uint8_t* g_pu8CH2DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2DesArrayTB3[PDMA_CH2_DATA_LENGTH_TB3];
uint16_t* g_pu16CH2DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2DesArrayTB3[PDMA_CH2_DATA_LENGTH_TB3];
uint32_t* g_pu32CH2DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH2DesArrayTB4[PDMA_CH2_DATA_LENGTH_TB4];
uint8_t* g_pu8CH2DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH2DesArrayTB4[PDMA_CH2_DATA_LENGTH_TB4];
uint16_t* g_pu16CH2DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH2DesArrayTB4[PDMA_CH2_DATA_LENGTH_TB4];
uint32_t* g_pu32CH2DesArrayTB4;
#endif
#endif
#endif
#endif

#if(NUCODEGEN_PDMA_CH3_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH3_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3SrcArray[PDMA_CH3_DATA_LENGTH];
uint8_t* g_pu8CH3SrcArray;
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3SrcArray[PDMA_CH3_DATA_LENGTH];
uint16_t* g_pu16CH3SrcArray;
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3SrcArray[PDMA_CH3_DATA_LENGTH];
uint32_t* g_pu32CH3SrcArray;
#endif /*NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH3_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3SrcArrayTB0[PDMA_CH3_DATA_LENGTH_TB0];
uint8_t* g_pu8CH3SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3SrcArrayTB0[PDMA_CH3_DATA_LENGTH_TB0];
uint16_t* g_pu16CH3SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3SrcArrayTB0[PDMA_CH3_DATA_LENGTH_TB0];
uint32_t* g_pu32CH3SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3SrcArrayTB1[PDMA_CH3_DATA_LENGTH_TB1];
uint8_t* g_pu8CH3SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3SrcArrayTB1[PDMA_CH3_DATA_LENGTH_TB1];
uint16_t* g_pu16CH3SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3SrcArrayTB1[PDMA_CH3_DATA_LENGTH_TB1];
uint32_t* g_pu32CH3SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3SrcArrayTB2[PDMA_CH3_DATA_LENGTH_TB2];
uint8_t* g_pu8CH3SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3SrcArrayTB2[PDMA_CH3_DATA_LENGTH_TB2];
uint16_t* g_pu16CH3SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3SrcArrayTB2[PDMA_CH3_DATA_LENGTH_TB2];
uint32_t* g_pu32CH3SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3SrcArrayTB3[PDMA_CH3_DATA_LENGTH_TB3];
uint8_t* g_pu8CH3SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3SrcArrayTB3[PDMA_CH3_DATA_LENGTH_TB3];
uint16_t* g_pu16CH3SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3SrcArrayTB3[PDMA_CH3_DATA_LENGTH_TB3];
uint32_t* g_pu32CH3SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3SrcArrayTB4[PDMA_CH3_DATA_LENGTH_TB4];
uint8_t* g_pu8CH3SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3SrcArrayTB4[PDMA_CH3_DATA_LENGTH_TB4];
uint16_t* g_pu16CH3SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3SrcArrayTB4[PDMA_CH3_DATA_LENGTH_TB4];
uint32_t* g_pu32CH3SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH3_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3DesArray[PDMA_CH3_DATA_LENGTH];
uint8_t* g_pu8CH3DesArray;
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3DesArray[PDMA_CH3_DATA_LENGTH];
uint16_t* g_pu16CH3DesArray;
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3DesArray[PDMA_CH3_DATA_LENGTH];
uint32_t* g_pu32CH3DesArray;
#endif /*NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH3_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3DesArrayTB0[PDMA_CH3_DATA_LENGTH_TB0];
uint8_t* g_pu8CH3DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3DesArrayTB0[PDMA_CH3_DATA_LENGTH_TB0];
uint16_t* g_pu16CH3DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3DesArrayTB0[PDMA_CH3_DATA_LENGTH_TB0];
uint32_t* g_pu32CH3DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3DesArrayTB1[PDMA_CH3_DATA_LENGTH_TB1];
uint8_t* g_pu8CH3DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3DesArrayTB1[PDMA_CH3_DATA_LENGTH_TB1];
uint16_t* g_pu16CH3DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3DesArrayTB1[PDMA_CH3_DATA_LENGTH_TB1];
uint32_t* g_pu32CH3DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3DesArrayTB2[PDMA_CH3_DATA_LENGTH_TB2];
uint8_t* g_pu8CH3DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3DesArrayTB2[PDMA_CH3_DATA_LENGTH_TB2];
uint16_t* g_pu16CH3DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3DesArrayTB2[PDMA_CH3_DATA_LENGTH_TB2];
uint32_t* g_pu32CH3DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3DesArrayTB3[PDMA_CH3_DATA_LENGTH_TB3];
uint8_t* g_pu8CH3DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3DesArrayTB3[PDMA_CH3_DATA_LENGTH_TB3];
uint16_t* g_pu16CH3DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3DesArrayTB3[PDMA_CH3_DATA_LENGTH_TB3];
uint32_t* g_pu32CH3DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH3DesArrayTB4[PDMA_CH3_DATA_LENGTH_TB4];
uint8_t* g_pu8CH3DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH3DesArrayTB4[PDMA_CH3_DATA_LENGTH_TB4];
uint16_t* g_pu16CH3DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH3DesArrayTB4[PDMA_CH3_DATA_LENGTH_TB4];
uint32_t* g_pu32CH3DesArrayTB4;
#endif
#endif
#endif
#endif

#if(NUCODEGEN_PDMA_CH4_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH4_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4SrcArray[PDMA_CH4_DATA_LENGTH];
uint8_t* g_pu8CH4SrcArray;
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4SrcArray[PDMA_CH4_DATA_LENGTH];
uint16_t* g_pu16CH4SrcArray;
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4SrcArray[PDMA_CH4_DATA_LENGTH];
uint32_t* g_pu32CH4SrcArray;
#endif /*NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH4_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4SrcArrayTB0[PDMA_CH4_DATA_LENGTH_TB0];
uint8_t* g_pu8CH4SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4SrcArrayTB0[PDMA_CH4_DATA_LENGTH_TB0];
uint16_t* g_pu16CH4SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4SrcArrayTB0[PDMA_CH4_DATA_LENGTH_TB0];
uint32_t* g_pu32CH4SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4SrcArrayTB1[PDMA_CH4_DATA_LENGTH_TB1];
uint8_t* g_pu8CH4SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4SrcArrayTB1[PDMA_CH4_DATA_LENGTH_TB1];
uint16_t* g_pu16CH4SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4SrcArrayTB1[PDMA_CH4_DATA_LENGTH_TB1];
uint32_t* g_pu32CH4SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4SrcArrayTB2[PDMA_CH4_DATA_LENGTH_TB2];
uint8_t* g_pu8CH4SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4SrcArrayTB2[PDMA_CH4_DATA_LENGTH_TB2];
uint16_t* g_pu16CH4SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4SrcArrayTB2[PDMA_CH4_DATA_LENGTH_TB2];
uint32_t* g_pu32CH4SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4SrcArrayTB3[PDMA_CH4_DATA_LENGTH_TB3];
uint8_t* g_pu8CH4SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4SrcArrayTB3[PDMA_CH4_DATA_LENGTH_TB3];
uint16_t* g_pu16CH4SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4SrcArrayTB3[PDMA_CH4_DATA_LENGTH_TB3];
uint32_t* g_pu32CH4SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4SrcArrayTB4[PDMA_CH4_DATA_LENGTH_TB4];
uint8_t* g_pu8CH4SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4SrcArrayTB4[PDMA_CH4_DATA_LENGTH_TB4];
uint16_t* g_pu16CH4SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4SrcArrayTB4[PDMA_CH4_DATA_LENGTH_TB4];
uint32_t* g_pu32CH4SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH4_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4DesArray[PDMA_CH4_DATA_LENGTH];
uint8_t* g_pu8CH4DesArray;
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4DesArray[PDMA_CH4_DATA_LENGTH];
uint16_t* g_pu16CH4DesArray;
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4DesArray[PDMA_CH4_DATA_LENGTH];
uint32_t* g_pu32CH4DesArray;
#endif /*NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH4_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4DesArrayTB0[PDMA_CH4_DATA_LENGTH_TB0];
uint8_t* g_pu8CH4DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4DesArrayTB0[PDMA_CH4_DATA_LENGTH_TB0];
uint16_t* g_pu16CH4DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4DesArrayTB0[PDMA_CH4_DATA_LENGTH_TB0];
uint32_t* g_pu32CH4DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4DesArrayTB1[PDMA_CH4_DATA_LENGTH_TB1];
uint8_t* g_pu8CH4DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4DesArrayTB1[PDMA_CH4_DATA_LENGTH_TB1];
uint16_t* g_pu16CH4DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4DesArrayTB1[PDMA_CH4_DATA_LENGTH_TB1];
uint32_t* g_pu32CH4DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4DesArrayTB2[PDMA_CH4_DATA_LENGTH_TB2];
uint8_t* g_pu8CH4DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4DesArrayTB2[PDMA_CH4_DATA_LENGTH_TB2];
uint16_t* g_pu16CH4DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4DesArrayTB2[PDMA_CH4_DATA_LENGTH_TB2];
uint32_t* g_pu32CH4DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4DesArrayTB3[PDMA_CH4_DATA_LENGTH_TB3];
uint8_t* g_pu8CH4DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4DesArrayTB3[PDMA_CH4_DATA_LENGTH_TB3];
uint16_t* g_pu16CH4DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4DesArrayTB3[PDMA_CH4_DATA_LENGTH_TB3];
uint32_t* g_pu32CH4DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH4DesArrayTB4[PDMA_CH4_DATA_LENGTH_TB4];
uint8_t* g_pu8CH4DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH4DesArrayTB4[PDMA_CH4_DATA_LENGTH_TB4];
uint16_t* g_pu16CH4DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH4DesArrayTB4[PDMA_CH4_DATA_LENGTH_TB4];
uint32_t* g_pu32CH4DesArrayTB4;
#endif
#endif
#endif
#endif

#if(NUCODEGEN_PDMA_CH5_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH5_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5SrcArray[PDMA_CH5_DATA_LENGTH];
uint8_t* g_pu8CH5SrcArray;
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5SrcArray[PDMA_CH5_DATA_LENGTH];
uint16_t* g_pu16CH5SrcArray;
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5SrcArray[PDMA_CH5_DATA_LENGTH];
uint32_t* g_pu32CH5SrcArray;
#endif /*NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH5_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5SrcArrayTB0[PDMA_CH5_DATA_LENGTH_TB0];
uint8_t* g_pu8CH5SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5SrcArrayTB0[PDMA_CH5_DATA_LENGTH_TB0];
uint16_t* g_pu16CH5SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5SrcArrayTB0[PDMA_CH5_DATA_LENGTH_TB0];
uint32_t* g_pu32CH5SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5SrcArrayTB1[PDMA_CH5_DATA_LENGTH_TB1];
uint8_t* g_pu8CH5SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5SrcArrayTB1[PDMA_CH5_DATA_LENGTH_TB1];
uint16_t* g_pu16CH5SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5SrcArrayTB1[PDMA_CH5_DATA_LENGTH_TB1];
uint32_t* g_pu32CH5SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5SrcArrayTB2[PDMA_CH5_DATA_LENGTH_TB2];
uint8_t* g_pu8CH5SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5SrcArrayTB2[PDMA_CH5_DATA_LENGTH_TB2];
uint16_t* g_pu16CH5SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5SrcArrayTB2[PDMA_CH5_DATA_LENGTH_TB2];
uint32_t* g_pu32CH5SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5SrcArrayTB3[PDMA_CH5_DATA_LENGTH_TB3];
uint8_t* g_pu8CH5SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5SrcArrayTB3[PDMA_CH5_DATA_LENGTH_TB3];
uint16_t* g_pu16CH5SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5SrcArrayTB3[PDMA_CH5_DATA_LENGTH_TB3];
uint32_t* g_pu32CH5SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5SrcArrayTB4[PDMA_CH5_DATA_LENGTH_TB4];
uint8_t* g_pu8CH5SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5SrcArrayTB4[PDMA_CH5_DATA_LENGTH_TB4];
uint16_t* g_pu16CH5SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5SrcArrayTB4[PDMA_CH5_DATA_LENGTH_TB4];
uint32_t* g_pu32CH5SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH5_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5DesArray[PDMA_CH5_DATA_LENGTH];
uint8_t* g_pu8CH5DesArray;
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5DesArray[PDMA_CH5_DATA_LENGTH];
uint16_t* g_pu16CH5DesArray;
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5DesArray[PDMA_CH5_DATA_LENGTH];
uint32_t* g_pu32CH5DesArray;
#endif /*NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH5_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5DesArrayTB0[PDMA_CH5_DATA_LENGTH_TB0];
uint8_t* g_pu8CH5DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5DesArrayTB0[PDMA_CH5_DATA_LENGTH_TB0];
uint16_t* g_pu16CH5DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5DesArrayTB0[PDMA_CH5_DATA_LENGTH_TB0];
uint32_t* g_pu32CH5DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5DesArrayTB1[PDMA_CH5_DATA_LENGTH_TB1];
uint8_t* g_pu8CH5DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5DesArrayTB1[PDMA_CH5_DATA_LENGTH_TB1];
uint16_t* g_pu16CH5DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5DesArrayTB1[PDMA_CH5_DATA_LENGTH_TB1];
uint32_t* g_pu32CH5DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5DesArrayTB2[PDMA_CH5_DATA_LENGTH_TB2];
uint8_t* g_pu8CH5DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5DesArrayTB2[PDMA_CH5_DATA_LENGTH_TB2];
uint16_t* g_pu16CH5DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5DesArrayTB2[PDMA_CH5_DATA_LENGTH_TB2];
uint32_t* g_pu32CH5DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5DesArrayTB3[PDMA_CH5_DATA_LENGTH_TB3];
uint8_t* g_pu8CH5DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5DesArrayTB3[PDMA_CH5_DATA_LENGTH_TB3];
uint16_t* g_pu16CH5DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5DesArrayTB3[PDMA_CH5_DATA_LENGTH_TB3];
uint32_t* g_pu32CH5DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH5DesArrayTB4[PDMA_CH5_DATA_LENGTH_TB4];
uint8_t* g_pu8CH5DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH5DesArrayTB4[PDMA_CH5_DATA_LENGTH_TB4];
uint16_t* g_pu16CH5DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH5DesArrayTB4[PDMA_CH5_DATA_LENGTH_TB4];
uint32_t* g_pu32CH5DesArrayTB4;
#endif
#endif
#endif
#endif

#if(NUCODEGEN_PDMA_CH6_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH6_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6SrcArray[PDMA_CH6_DATA_LENGTH];
uint8_t* g_pu8CH6SrcArray;
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6SrcArray[PDMA_CH6_DATA_LENGTH];
uint16_t* g_pu16CH6SrcArray;
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6SrcArray[PDMA_CH6_DATA_LENGTH];
uint32_t* g_pu32CH6SrcArray;
#endif /*NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH6_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6SrcArrayTB0[PDMA_CH6_DATA_LENGTH_TB0];
uint8_t* g_pu8CH6SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6SrcArrayTB0[PDMA_CH6_DATA_LENGTH_TB0];
uint16_t* g_pu16CH6SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6SrcArrayTB0[PDMA_CH6_DATA_LENGTH_TB0];
uint32_t* g_pu32CH6SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6SrcArrayTB1[PDMA_CH6_DATA_LENGTH_TB1];
uint8_t* g_pu8CH6SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6SrcArrayTB1[PDMA_CH6_DATA_LENGTH_TB1];
uint16_t* g_pu16CH6SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6SrcArrayTB1[PDMA_CH6_DATA_LENGTH_TB1];
uint32_t* g_pu32CH6SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6SrcArrayTB2[PDMA_CH6_DATA_LENGTH_TB2];
uint8_t* g_pu8CH6SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6SrcArrayTB2[PDMA_CH6_DATA_LENGTH_TB2];
uint16_t* g_pu16CH6SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6SrcArrayTB2[PDMA_CH6_DATA_LENGTH_TB2];
uint32_t* g_pu32CH6SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6SrcArrayTB3[PDMA_CH6_DATA_LENGTH_TB3];
uint8_t* g_pu8CH6SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6SrcArrayTB3[PDMA_CH6_DATA_LENGTH_TB3];
uint16_t* g_pu16CH6SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6SrcArrayTB3[PDMA_CH6_DATA_LENGTH_TB3];
uint32_t* g_pu32CH6SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6SrcArrayTB4[PDMA_CH6_DATA_LENGTH_TB4];
uint8_t* g_pu8CH6SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6SrcArrayTB4[PDMA_CH6_DATA_LENGTH_TB4];
uint16_t* g_pu16CH6SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6SrcArrayTB4[PDMA_CH6_DATA_LENGTH_TB4];
uint32_t* g_pu32CH6SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH6_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6DesArray[PDMA_CH6_DATA_LENGTH];
uint8_t* g_pu8CH6DesArray;
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6DesArray[PDMA_CH6_DATA_LENGTH];
uint16_t* g_pu16CH6DesArray;
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6DesArray[PDMA_CH6_DATA_LENGTH];
uint32_t* g_pu32CH6DesArray;
#endif /*NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH6_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6DesArrayTB0[PDMA_CH6_DATA_LENGTH_TB0];
uint8_t* g_pu8CH6DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6DesArrayTB0[PDMA_CH6_DATA_LENGTH_TB0];
uint16_t* g_pu16CH6DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6DesArrayTB0[PDMA_CH6_DATA_LENGTH_TB0];
uint32_t* g_pu32CH6DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6DesArrayTB1[PDMA_CH6_DATA_LENGTH_TB1];
uint8_t* g_pu8CH6DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6DesArrayTB1[PDMA_CH6_DATA_LENGTH_TB1];
uint16_t* g_pu16CH6DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6DesArrayTB1[PDMA_CH6_DATA_LENGTH_TB1];
uint32_t* g_pu32CH6DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6DesArrayTB2[PDMA_CH6_DATA_LENGTH_TB2];
uint8_t* g_pu8CH6DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6DesArrayTB2[PDMA_CH6_DATA_LENGTH_TB2];
uint16_t* g_pu16CH6DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6DesArrayTB2[PDMA_CH6_DATA_LENGTH_TB2];
uint32_t* g_pu32CH6DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6DesArrayTB3[PDMA_CH6_DATA_LENGTH_TB3];
uint8_t* g_pu8CH6DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6DesArrayTB3[PDMA_CH6_DATA_LENGTH_TB3];
uint16_t* g_pu16CH6DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6DesArrayTB3[PDMA_CH6_DATA_LENGTH_TB3];
uint32_t* g_pu32CH6DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH6DesArrayTB4[PDMA_CH6_DATA_LENGTH_TB4];
uint8_t* g_pu8CH6DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH6DesArrayTB4[PDMA_CH6_DATA_LENGTH_TB4];
uint16_t* g_pu16CH6DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH6DesArrayTB4[PDMA_CH6_DATA_LENGTH_TB4];
uint32_t* g_pu32CH6DesArrayTB4;
#endif
#endif
#endif
#endif

#if(NUCODEGEN_PDMA_CH7_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH7_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7SrcArray[PDMA_CH7_DATA_LENGTH];
uint8_t* g_pu8CH7SrcArray;
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7SrcArray[PDMA_CH7_DATA_LENGTH];
uint16_t* g_pu16CH7SrcArray;
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7SrcArray[PDMA_CH7_DATA_LENGTH];
uint32_t* g_pu32CH7SrcArray;
#endif /*NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH7_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7SrcArrayTB0[PDMA_CH7_DATA_LENGTH_TB0];
uint8_t* g_pu8CH7SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7SrcArrayTB0[PDMA_CH7_DATA_LENGTH_TB0];
uint16_t* g_pu16CH7SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7SrcArrayTB0[PDMA_CH7_DATA_LENGTH_TB0];
uint32_t* g_pu32CH7SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7SrcArrayTB1[PDMA_CH7_DATA_LENGTH_TB1];
uint8_t* g_pu8CH7SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7SrcArrayTB1[PDMA_CH7_DATA_LENGTH_TB1];
uint16_t* g_pu16CH7SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7SrcArrayTB1[PDMA_CH7_DATA_LENGTH_TB1];
uint32_t* g_pu32CH7SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7SrcArrayTB2[PDMA_CH7_DATA_LENGTH_TB2];
uint8_t* g_pu8CH7SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7SrcArrayTB2[PDMA_CH7_DATA_LENGTH_TB2];
uint16_t* g_pu16CH7SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7SrcArrayTB2[PDMA_CH7_DATA_LENGTH_TB2];
uint32_t* g_pu32CH7SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7SrcArrayTB3[PDMA_CH7_DATA_LENGTH_TB3];
uint8_t* g_pu8CH7SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7SrcArrayTB3[PDMA_CH7_DATA_LENGTH_TB3];
uint16_t* g_pu16CH7SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7SrcArrayTB3[PDMA_CH7_DATA_LENGTH_TB3];
uint32_t* g_pu32CH7SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7SrcArrayTB4[PDMA_CH7_DATA_LENGTH_TB4];
uint8_t* g_pu8CH7SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7SrcArrayTB4[PDMA_CH7_DATA_LENGTH_TB4];
uint16_t* g_pu16CH7SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7SrcArrayTB4[PDMA_CH7_DATA_LENGTH_TB4];
uint32_t* g_pu32CH7SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH7_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7DesArray[PDMA_CH7_DATA_LENGTH];
uint8_t* g_pu8CH7DesArray;
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7DesArray[PDMA_CH7_DATA_LENGTH];
uint16_t* g_pu16CH7DesArray;
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7DesArray[PDMA_CH7_DATA_LENGTH];
uint32_t* g_pu32CH7DesArray;
#endif /*NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH7_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7DesArrayTB0[PDMA_CH7_DATA_LENGTH_TB0];
uint8_t* g_pu8CH7DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7DesArrayTB0[PDMA_CH7_DATA_LENGTH_TB0];
uint16_t* g_pu16CH7DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7DesArrayTB0[PDMA_CH7_DATA_LENGTH_TB0];
uint32_t* g_pu32CH7DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7DesArrayTB1[PDMA_CH7_DATA_LENGTH_TB1];
uint8_t* g_pu8CH7DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7DesArrayTB1[PDMA_CH7_DATA_LENGTH_TB1];
uint16_t* g_pu16CH7DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7DesArrayTB1[PDMA_CH7_DATA_LENGTH_TB1];
uint32_t* g_pu32CH7DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7DesArrayTB2[PDMA_CH7_DATA_LENGTH_TB2];
uint8_t* g_pu8CH7DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7DesArrayTB2[PDMA_CH7_DATA_LENGTH_TB2];
uint16_t* g_pu16CH7DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7DesArrayTB2[PDMA_CH7_DATA_LENGTH_TB2];
uint32_t* g_pu32CH7DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7DesArrayTB3[PDMA_CH7_DATA_LENGTH_TB3];
uint8_t* g_pu8CH7DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7DesArrayTB3[PDMA_CH7_DATA_LENGTH_TB3];
uint16_t* g_pu16CH7DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7DesArrayTB3[PDMA_CH7_DATA_LENGTH_TB3];
uint32_t* g_pu32CH7DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH7DesArrayTB4[PDMA_CH7_DATA_LENGTH_TB4];
uint8_t* g_pu8CH7DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH7DesArrayTB4[PDMA_CH7_DATA_LENGTH_TB4];
uint16_t* g_pu16CH7DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH7DesArrayTB4[PDMA_CH7_DATA_LENGTH_TB4];
uint32_t* g_pu32CH7DesArrayTB4;
#endif
#endif
#endif
#endif

#if(NUCODEGEN_PDMA_CH8_SRC_ADDR_S)
#if(NUCODEGEN_PDMA_CH8_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8SrcArray[PDMA_CH8_DATA_LENGTH];
uint8_t* g_pu8CH8SrcArray;
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8SrcArray[PDMA_CH8_DATA_LENGTH];
uint16_t* g_pu16CH8SrcArray;
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8SrcArray[PDMA_CH8_DATA_LENGTH];
uint32_t* g_pu32CH8SrcArray;
#endif /*NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH8_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8SrcArrayTB0[PDMA_CH8_DATA_LENGTH_TB0];
uint8_t* g_pu8CH8SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8SrcArrayTB0[PDMA_CH8_DATA_LENGTH_TB0];
uint16_t* g_pu16CH8SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8SrcArrayTB0[PDMA_CH8_DATA_LENGTH_TB0];
uint32_t* g_pu32CH8SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8SrcArrayTB1[PDMA_CH8_DATA_LENGTH_TB1];
uint8_t* g_pu8CH8SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8SrcArrayTB1[PDMA_CH8_DATA_LENGTH_TB1];
uint16_t* g_pu16CH8SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8SrcArrayTB1[PDMA_CH8_DATA_LENGTH_TB1];
uint32_t* g_pu32CH8SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8SrcArrayTB2[PDMA_CH8_DATA_LENGTH_TB2];
uint8_t* g_pu8CH8SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8SrcArrayTB2[PDMA_CH8_DATA_LENGTH_TB2];
uint16_t* g_pu16CH8SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8SrcArrayTB2[PDMA_CH8_DATA_LENGTH_TB2];
uint32_t* g_pu32CH8SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8SrcArrayTB3[PDMA_CH8_DATA_LENGTH_TB3];
uint8_t* g_pu8CH8SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8SrcArrayTB3[PDMA_CH8_DATA_LENGTH_TB3];
uint16_t* g_pu16CH8SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8SrcArrayTB3[PDMA_CH8_DATA_LENGTH_TB3];
uint32_t* g_pu32CH8SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8SrcArrayTB4[PDMA_CH8_DATA_LENGTH_TB4];
uint8_t* g_pu8CH8SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8SrcArrayTB4[PDMA_CH8_DATA_LENGTH_TB4];
uint16_t* g_pu16CH8SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8SrcArrayTB4[PDMA_CH8_DATA_LENGTH_TB4];
uint32_t* g_pu32CH8SrcArrayTB4;
#endif
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_DES_ADDR_S)
#if(NUCODEGEN_PDMA_CH8_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC)
#if (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8DesArray[PDMA_CH8_DATA_LENGTH];
uint8_t* g_pu8CH8DesArray;
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8DesArray[PDMA_CH8_DATA_LENGTH];
uint16_t* g_pu16CH8DesArray;
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8DesArray[PDMA_CH8_DATA_LENGTH];
uint32_t* g_pu32CH8DesArray;
#endif /*NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_32*/
#else /*NUCODEGEN_PDMA_CH8_OPMODE_S==NUCODEGEN_PDMA_OP_BASIC*/
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8DesArrayTB0[PDMA_CH8_DATA_LENGTH_TB0];
uint8_t* g_pu8CH8DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8DesArrayTB0[PDMA_CH8_DATA_LENGTH_TB0];
uint16_t* g_pu16CH8DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8DesArrayTB0[PDMA_CH8_DATA_LENGTH_TB0];
uint32_t* g_pu32CH8DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8DesArrayTB1[PDMA_CH8_DATA_LENGTH_TB1];
uint8_t* g_pu8CH8DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8DesArrayTB1[PDMA_CH8_DATA_LENGTH_TB1];
uint16_t* g_pu16CH8DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8DesArrayTB1[PDMA_CH8_DATA_LENGTH_TB1];
uint32_t* g_pu32CH8DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8DesArrayTB2[PDMA_CH8_DATA_LENGTH_TB2];
uint8_t* g_pu8CH8DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8DesArrayTB2[PDMA_CH8_DATA_LENGTH_TB2];
uint16_t* g_pu16CH8DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8DesArrayTB2[PDMA_CH8_DATA_LENGTH_TB2];
uint32_t* g_pu32CH8DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8DesArrayTB3[PDMA_CH8_DATA_LENGTH_TB3];
uint8_t* g_pu8CH8DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8DesArrayTB3[PDMA_CH8_DATA_LENGTH_TB3];
uint16_t* g_pu16CH8DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8DesArrayTB3[PDMA_CH8_DATA_LENGTH_TB3];
uint32_t* g_pu32CH8DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
uint8_t g_au8CH8DesArrayTB4[PDMA_CH8_DATA_LENGTH_TB4];
uint8_t* g_pu8CH8DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)	
uint16_t g_au16CH8DesArrayTB4[PDMA_CH8_DATA_LENGTH_TB4];
uint16_t* g_pu16CH8DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
uint32_t g_au32CH8DesArrayTB4[PDMA_CH8_DATA_LENGTH_TB4];
uint32_t* g_pu32CH8DesArrayTB4;
#endif
#endif
#endif
#endif

void PDMA_Init()
{
#if (NUCODEGEN_PDMA_CH0)
#if (NUCODEGEN_PDMA_CH0_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH0_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0SrcArray = g_au8CH0SrcArray;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH0SrcArray = g_au16CH0SrcArray;
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0SrcArray = g_au32CH0SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0DesArray = g_au8CH0DesArray;
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0DesArray = g_au16CH0DesArray;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0DesArray = g_au32CH0DesArray;
#endif 
#endif
    /* Open CH0 */
    PDMA_Open(PDMA, 1 << 0);

#if (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH0_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 0, PDMA_WIDTH_8, PDMA_CH0_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH0_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 0, PDMA_WIDTH_16, PDMA_CH0_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH0_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH0_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 0, PDMA_WIDTH_32, PDMA_CH0_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH0_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH0_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 0, (uint32_t)NUCODEGEN_PDMA_CH0_SRC_ADDR, NUCODEGEN_PDMA_CH0_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH0_DES_ADDR, NUCODEGEN_PDMA_CH0_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 0, NUCODEGEN_PDMA_CH0_MODE, NUCODEGEN_PDMA_CH0_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH0_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 0, NUCODEGEN_PDMA_CH0_TMOUT, NUCODEGEN_PDMA_CH0_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH0_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 0, NUCODEGEN_PDMA_CH0_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH0_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH0_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0SrcArrayTB0 = g_au8CH0SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0SrcArrayTB0 = g_au16CH0SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0SrcArrayTB0 = g_au32CH0SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0SrcArrayTB1 = g_au8CH0SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0SrcArrayTB1 = g_au16CH0SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0SrcArrayTB1 = g_au32CH0SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0SrcArrayTB2 = g_au8CH0SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0SrcArrayTB2 = g_au16CH0SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0SrcArrayTB2 = g_au32CH0SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0SrcArrayTB3 = g_au8CH0SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0SrcArrayTB3 = g_au16CH0SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0SrcArrayTB3 = g_au32CH0SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0SrcArrayTB4 = g_au8CH0SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0SrcArrayTB4 = g_au16CH0SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0SrcArrayTB4 = g_au32CH0SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0DesArrayTB0 = g_au8CH0DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0DesArrayTB0 = g_au16CH0DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0DesArrayTB0 = g_au32CH0DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0DesArrayTB1 = g_au8CH0DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0DesArrayTB1 = g_au16CH0DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0DesArrayTB1 = g_au32CH0DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0DesArrayTB2 = g_au8CH0DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0DesArrayTB2 = g_au16CH0DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0DesArrayTB2 = g_au32CH0DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0DesArrayTB3 = g_au8CH0DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0DesArrayTB3 = g_au16CH0DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0DesArrayTB3 = g_au32CH0DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH0DesArrayTB4 = g_au8CH0DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH0DesArrayTB4 = g_au16CH0DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH0DesArrayTB4 = g_au32CH0DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH0_DES_ADDR_S */   
    /* Open CH0 */
    PDMA_Open(PDMA, 1 << 0);
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH0[0].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH0[0].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH0[0].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH0[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH0_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH0[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH0_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH0_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH0[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH0[0].u32Offset = (uint32_t)&DMA_DESC_CH0[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH0[1].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH0[1].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH0[1].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH0[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH0_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH0[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH0_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH0_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH0[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH0[1].u32Offset = (uint32_t)&DMA_DESC_CH0[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH0[2].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH0[2].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH0[2].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH0[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH0_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH0[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH0_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH0[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH0[2].u32Offset = (uint32_t)&DMA_DESC_CH0[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH0[3].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH0[3].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH0[3].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH0[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH0_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH0[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH0_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH0_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH0[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH0[3].u32Offset = (uint32_t)&DMA_DESC_CH0[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH0_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH0[4].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH0[4].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH0_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH0[4].u32Ctl =
        (((uint32_t)PDMA_CH0_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH0_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH0_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH0_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH0_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH0_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH0_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH0[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH0_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH0[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH0_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH0[4].u32Offset = (uint32_t)&DMA_DESC_CH0[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH0_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 0, NUCODEGEN_PDMA_CH0_TMOUT, NUCODEGEN_PDMA_CH0_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH0_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 0, NUCODEGEN_PDMA_CH0_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH0[0]);
#endif  //NUCODEGEN_PDMA_CH0_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH0

#if (NUCODEGEN_PDMA_CH1)
#if (NUCODEGEN_PDMA_CH1_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH1_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1SrcArray = g_au8CH1SrcArray;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH1SrcArray = g_au16CH1SrcArray;
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1SrcArray = g_au32CH1SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1DesArray = g_au8CH1DesArray;
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1DesArray = g_au16CH1DesArray;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1DesArray = g_au32CH1DesArray;
#endif 
#endif
    /* Open CH1 */
    PDMA_Open(PDMA, 1 << 1);

#if (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH1_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 1, PDMA_WIDTH_8, PDMA_CH1_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH1_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 1, PDMA_WIDTH_16, PDMA_CH1_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH1_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH1_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 1, PDMA_WIDTH_32, PDMA_CH1_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH1_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH1_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 1, (uint32_t)NUCODEGEN_PDMA_CH1_SRC_ADDR, NUCODEGEN_PDMA_CH1_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH1_DES_ADDR, NUCODEGEN_PDMA_CH1_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 1, NUCODEGEN_PDMA_CH1_MODE, NUCODEGEN_PDMA_CH1_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH1_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 1, NUCODEGEN_PDMA_CH1_TMOUT, NUCODEGEN_PDMA_CH1_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH1_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 1, NUCODEGEN_PDMA_CH1_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH1_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH1_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1SrcArrayTB0 = g_au8CH1SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1SrcArrayTB0 = g_au16CH1SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1SrcArrayTB0 = g_au32CH1SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1SrcArrayTB1 = g_au8CH1SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1SrcArrayTB1 = g_au16CH1SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1SrcArrayTB1 = g_au32CH1SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1SrcArrayTB2 = g_au8CH1SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1SrcArrayTB2 = g_au16CH1SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1SrcArrayTB2 = g_au32CH1SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1SrcArrayTB3 = g_au8CH1SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1SrcArrayTB3 = g_au16CH1SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1SrcArrayTB3 = g_au32CH1SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1SrcArrayTB4 = g_au8CH1SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1SrcArrayTB4 = g_au16CH1SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1SrcArrayTB4 = g_au32CH1SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1DesArrayTB0 = g_au8CH1DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1DesArrayTB0 = g_au16CH1DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1DesArrayTB0 = g_au32CH1DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1DesArrayTB1 = g_au8CH1DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1DesArrayTB1 = g_au16CH1DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1DesArrayTB1 = g_au32CH1DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1DesArrayTB2 = g_au8CH1DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1DesArrayTB2 = g_au16CH1DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1DesArrayTB2 = g_au32CH1DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1DesArrayTB3 = g_au8CH1DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1DesArrayTB3 = g_au16CH1DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1DesArrayTB3 = g_au32CH1DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH1DesArrayTB4 = g_au8CH1DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH1DesArrayTB4 = g_au16CH1DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH1DesArrayTB4 = g_au32CH1DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH1_DES_ADDR_S */   
    /* Open CH1 */
    PDMA_Open(PDMA, 1 << 1);
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH1[0].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH1[0].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH1[0].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH1[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH1_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH1[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH1_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH1_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH1[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH1[0].u32Offset = (uint32_t)&DMA_DESC_CH1[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH1[1].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH1[1].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH1[1].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH1[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH1_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH1[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH1_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH1_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH1[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH1[1].u32Offset = (uint32_t)&DMA_DESC_CH1[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH1[2].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH1[2].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH1[2].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH1[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH1_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH1[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH1_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH1[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH1[2].u32Offset = (uint32_t)&DMA_DESC_CH1[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH1[3].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH1[3].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH1[3].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH1[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH1_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH1[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH1_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH1_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH1[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH1[3].u32Offset = (uint32_t)&DMA_DESC_CH1[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH1_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH1[4].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH1[4].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH1_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH1[4].u32Ctl =
        (((uint32_t)PDMA_CH1_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH1_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH1_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH1_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH1_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH1_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH1_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH1[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH1_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH1[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH1_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH1[4].u32Offset = (uint32_t)&DMA_DESC_CH1[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH1_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 1, NUCODEGEN_PDMA_CH1_TMOUT, NUCODEGEN_PDMA_CH1_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH1_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 1, NUCODEGEN_PDMA_CH1_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH1[0]);
#endif  //NUCODEGEN_PDMA_CH1_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH1

#if (NUCODEGEN_PDMA_CH2)
#if (NUCODEGEN_PDMA_CH2_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH2_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2SrcArray = g_au8CH2SrcArray;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH2SrcArray = g_au16CH2SrcArray;
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2SrcArray = g_au32CH2SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2DesArray = g_au8CH2DesArray;
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2DesArray = g_au16CH2DesArray;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2DesArray = g_au32CH2DesArray;
#endif 
#endif
    /* Open CH2 */
    PDMA_Open(PDMA, 1 << 2);

#if (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH2_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 2, PDMA_WIDTH_8, PDMA_CH2_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH2_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 2, PDMA_WIDTH_16, PDMA_CH2_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH2_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH2_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 2, PDMA_WIDTH_32, PDMA_CH2_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH2_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH2_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 2, (uint32_t)NUCODEGEN_PDMA_CH2_SRC_ADDR, NUCODEGEN_PDMA_CH2_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH2_DES_ADDR, NUCODEGEN_PDMA_CH2_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 2, NUCODEGEN_PDMA_CH2_MODE, NUCODEGEN_PDMA_CH2_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH2_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 2, NUCODEGEN_PDMA_CH2_TMOUT, NUCODEGEN_PDMA_CH2_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH2_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 2, NUCODEGEN_PDMA_CH2_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH2_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH2_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2SrcArrayTB0 = g_au8CH2SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2SrcArrayTB0 = g_au16CH2SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2SrcArrayTB0 = g_au32CH2SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2SrcArrayTB1 = g_au8CH2SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2SrcArrayTB1 = g_au16CH2SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2SrcArrayTB1 = g_au32CH2SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2SrcArrayTB2 = g_au8CH2SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2SrcArrayTB2 = g_au16CH2SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2SrcArrayTB2 = g_au32CH2SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2SrcArrayTB3 = g_au8CH2SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2SrcArrayTB3 = g_au16CH2SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2SrcArrayTB3 = g_au32CH2SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2SrcArrayTB4 = g_au8CH2SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2SrcArrayTB4 = g_au16CH2SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2SrcArrayTB4 = g_au32CH2SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2DesArrayTB0 = g_au8CH2DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2DesArrayTB0 = g_au16CH2DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2DesArrayTB0 = g_au32CH2DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2DesArrayTB1 = g_au8CH2DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2DesArrayTB1 = g_au16CH2DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2DesArrayTB1 = g_au32CH2DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2DesArrayTB2 = g_au8CH2DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2DesArrayTB2 = g_au16CH2DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2DesArrayTB2 = g_au32CH2DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2DesArrayTB3 = g_au8CH2DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2DesArrayTB3 = g_au16CH2DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2DesArrayTB3 = g_au32CH2DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH2DesArrayTB4 = g_au8CH2DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH2DesArrayTB4 = g_au16CH2DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH2DesArrayTB4 = g_au32CH2DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH2_DES_ADDR_S */   
    /* Open CH2 */
    PDMA_Open(PDMA, 1 << 2);
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH2[0].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH2[0].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH2[0].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH2[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH2_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH2[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH2_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH2_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH2[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH2[0].u32Offset = (uint32_t)&DMA_DESC_CH2[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH2[1].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH2[1].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH2[1].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH2[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH2_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH2[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH2_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH2_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH2[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH2[1].u32Offset = (uint32_t)&DMA_DESC_CH2[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH2[2].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH2[2].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH2[2].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH2[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH2_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH2[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH2_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH2[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH2[2].u32Offset = (uint32_t)&DMA_DESC_CH2[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH2[3].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH2[3].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH2[3].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH2[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH2_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH2[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH2_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH2_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH2[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH2[3].u32Offset = (uint32_t)&DMA_DESC_CH2[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH2_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH2[4].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH2[4].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH2_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH2[4].u32Ctl =
        (((uint32_t)PDMA_CH2_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH2_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH2_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH2_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH2_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH2_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH2_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH2[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH2_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH2[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH2_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH2[4].u32Offset = (uint32_t)&DMA_DESC_CH2[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH2_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 2, NUCODEGEN_PDMA_CH2_TMOUT, NUCODEGEN_PDMA_CH2_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH2_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 2, NUCODEGEN_PDMA_CH2_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH2[0]);
#endif  //NUCODEGEN_PDMA_CH2_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH2

#if (NUCODEGEN_PDMA_CH3)
#if (NUCODEGEN_PDMA_CH3_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH3_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3SrcArray = g_au8CH3SrcArray;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH3SrcArray = g_au16CH3SrcArray;
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3SrcArray = g_au32CH3SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3DesArray = g_au8CH3DesArray;
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3DesArray = g_au16CH3DesArray;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3DesArray = g_au32CH3DesArray;
#endif 
#endif
    /* Open CH3 */
    PDMA_Open(PDMA, 1 << 3);

#if (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH3_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 3, PDMA_WIDTH_8, PDMA_CH3_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH3_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 3, PDMA_WIDTH_16, PDMA_CH3_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH3_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH3_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 3, PDMA_WIDTH_32, PDMA_CH3_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH3_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH3_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 3, (uint32_t)NUCODEGEN_PDMA_CH3_SRC_ADDR, NUCODEGEN_PDMA_CH3_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH3_DES_ADDR, NUCODEGEN_PDMA_CH3_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 3, NUCODEGEN_PDMA_CH3_MODE, NUCODEGEN_PDMA_CH3_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH3_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 3, NUCODEGEN_PDMA_CH3_TMOUT, NUCODEGEN_PDMA_CH3_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH3_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 3, NUCODEGEN_PDMA_CH3_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH3_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH3_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3SrcArrayTB0 = g_au8CH3SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3SrcArrayTB0 = g_au16CH3SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3SrcArrayTB0 = g_au32CH3SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3SrcArrayTB1 = g_au8CH3SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3SrcArrayTB1 = g_au16CH3SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3SrcArrayTB1 = g_au32CH3SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3SrcArrayTB2 = g_au8CH3SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3SrcArrayTB2 = g_au16CH3SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3SrcArrayTB2 = g_au32CH3SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3SrcArrayTB3 = g_au8CH3SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3SrcArrayTB3 = g_au16CH3SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3SrcArrayTB3 = g_au32CH3SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3SrcArrayTB4 = g_au8CH3SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3SrcArrayTB4 = g_au16CH3SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3SrcArrayTB4 = g_au32CH3SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3DesArrayTB0 = g_au8CH3DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3DesArrayTB0 = g_au16CH3DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3DesArrayTB0 = g_au32CH3DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3DesArrayTB1 = g_au8CH3DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3DesArrayTB1 = g_au16CH3DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3DesArrayTB1 = g_au32CH3DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3DesArrayTB2 = g_au8CH3DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3DesArrayTB2 = g_au16CH3DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3DesArrayTB2 = g_au32CH3DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3DesArrayTB3 = g_au8CH3DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3DesArrayTB3 = g_au16CH3DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3DesArrayTB3 = g_au32CH3DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH3DesArrayTB4 = g_au8CH3DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH3DesArrayTB4 = g_au16CH3DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH3DesArrayTB4 = g_au32CH3DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH3_DES_ADDR_S */   
    /* Open CH3 */
    PDMA_Open(PDMA, 1 << 3);
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH3[0].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH3[0].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH3[0].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH3[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH3_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH3[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH3_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH3_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH3[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH3[0].u32Offset = (uint32_t)&DMA_DESC_CH3[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH3[1].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH3[1].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH3[1].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH3[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH3_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH3[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH3_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH3_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH3[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH3[1].u32Offset = (uint32_t)&DMA_DESC_CH3[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH3[2].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH3[2].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH3[2].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH3[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH3_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH3[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH3_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH3[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH3[2].u32Offset = (uint32_t)&DMA_DESC_CH3[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH3[3].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH3[3].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH3[3].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH3[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH3_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH3[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH3_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH3_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH3[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH3[3].u32Offset = (uint32_t)&DMA_DESC_CH3[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH3_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH3[4].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH3[4].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH3_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH3[4].u32Ctl =
        (((uint32_t)PDMA_CH3_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH3_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH3_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH3_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH3_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH3_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH3_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH3[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH3_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH3[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH3_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH3[4].u32Offset = (uint32_t)&DMA_DESC_CH3[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH3_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 3, NUCODEGEN_PDMA_CH3_TMOUT, NUCODEGEN_PDMA_CH3_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH3_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 3, NUCODEGEN_PDMA_CH3_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH3[0]);
#endif  //NUCODEGEN_PDMA_CH3_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH3

#if (NUCODEGEN_PDMA_CH4)
#if (NUCODEGEN_PDMA_CH4_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH4_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4SrcArray = g_au8CH4SrcArray;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH4SrcArray = g_au16CH4SrcArray;
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4SrcArray = g_au32CH4SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4DesArray = g_au8CH4DesArray;
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4DesArray = g_au16CH4DesArray;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4DesArray = g_au32CH4DesArray;
#endif 
#endif
    /* Open CH4 */
    PDMA_Open(PDMA, 1 << 4);

#if (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH4_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 4, PDMA_WIDTH_8, PDMA_CH4_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH4_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 4, PDMA_WIDTH_16, PDMA_CH4_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH4_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH4_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 4, PDMA_WIDTH_32, PDMA_CH4_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH4_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH4_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 4, (uint32_t)NUCODEGEN_PDMA_CH4_SRC_ADDR, NUCODEGEN_PDMA_CH4_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH4_DES_ADDR, NUCODEGEN_PDMA_CH4_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 4, NUCODEGEN_PDMA_CH4_MODE, NUCODEGEN_PDMA_CH4_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH4_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 4, NUCODEGEN_PDMA_CH4_TMOUT, NUCODEGEN_PDMA_CH4_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH4_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 4, NUCODEGEN_PDMA_CH4_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH4_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH4_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4SrcArrayTB0 = g_au8CH4SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4SrcArrayTB0 = g_au16CH4SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4SrcArrayTB0 = g_au32CH4SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4SrcArrayTB1 = g_au8CH4SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4SrcArrayTB1 = g_au16CH4SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4SrcArrayTB1 = g_au32CH4SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4SrcArrayTB2 = g_au8CH4SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4SrcArrayTB2 = g_au16CH4SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4SrcArrayTB2 = g_au32CH4SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4SrcArrayTB3 = g_au8CH4SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4SrcArrayTB3 = g_au16CH4SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4SrcArrayTB3 = g_au32CH4SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4SrcArrayTB4 = g_au8CH4SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4SrcArrayTB4 = g_au16CH4SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4SrcArrayTB4 = g_au32CH4SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4DesArrayTB0 = g_au8CH4DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4DesArrayTB0 = g_au16CH4DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4DesArrayTB0 = g_au32CH4DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4DesArrayTB1 = g_au8CH4DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4DesArrayTB1 = g_au16CH4DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4DesArrayTB1 = g_au32CH4DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4DesArrayTB2 = g_au8CH4DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4DesArrayTB2 = g_au16CH4DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4DesArrayTB2 = g_au32CH4DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4DesArrayTB3 = g_au8CH4DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4DesArrayTB3 = g_au16CH4DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4DesArrayTB3 = g_au32CH4DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH4DesArrayTB4 = g_au8CH4DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH4DesArrayTB4 = g_au16CH4DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH4DesArrayTB4 = g_au32CH4DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH4_DES_ADDR_S */   
    /* Open CH4 */
    PDMA_Open(PDMA, 1 << 4);
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH4[0].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH4[0].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH4[0].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH4[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH4_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH4[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH4_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH4_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH4[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH4[0].u32Offset = (uint32_t)&DMA_DESC_CH4[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH4[1].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH4[1].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH4[1].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH4[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH4_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH4[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH4_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH4_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH4[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH4[1].u32Offset = (uint32_t)&DMA_DESC_CH4[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH4[2].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH4[2].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH4[2].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH4[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH4_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH4[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH4_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH4[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH4[2].u32Offset = (uint32_t)&DMA_DESC_CH4[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH4[3].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH4[3].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH4[3].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH4[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH4_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH4[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH4_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH4_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH4[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH4[3].u32Offset = (uint32_t)&DMA_DESC_CH4[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH4_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH4[4].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH4[4].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH4_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH4[4].u32Ctl =
        (((uint32_t)PDMA_CH4_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH4_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH4_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH4_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH4_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH4_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH4_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH4[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH4_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH4[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH4_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH4[4].u32Offset = (uint32_t)&DMA_DESC_CH4[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH4_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 4, NUCODEGEN_PDMA_CH4_TMOUT, NUCODEGEN_PDMA_CH4_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH4_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 4, NUCODEGEN_PDMA_CH4_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH4[0]);
#endif  //NUCODEGEN_PDMA_CH4_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH4

#if (NUCODEGEN_PDMA_CH5)
#if (NUCODEGEN_PDMA_CH5_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH5_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5SrcArray = g_au8CH5SrcArray;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH5SrcArray = g_au16CH5SrcArray;
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5SrcArray = g_au32CH5SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5DesArray = g_au8CH5DesArray;
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5DesArray = g_au16CH5DesArray;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5DesArray = g_au32CH5DesArray;
#endif 
#endif
    /* Open CH5 */
    PDMA_Open(PDMA, 1 << 5);

#if (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH5_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 5, PDMA_WIDTH_8, PDMA_CH5_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH5_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 5, PDMA_WIDTH_16, PDMA_CH5_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH5_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH5_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 5, PDMA_WIDTH_32, PDMA_CH5_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH5_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH5_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 5, (uint32_t)NUCODEGEN_PDMA_CH5_SRC_ADDR, NUCODEGEN_PDMA_CH5_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH5_DES_ADDR, NUCODEGEN_PDMA_CH5_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 5, NUCODEGEN_PDMA_CH5_MODE, NUCODEGEN_PDMA_CH5_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH5_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 5, NUCODEGEN_PDMA_CH5_TMOUT, NUCODEGEN_PDMA_CH5_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH5_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 5, NUCODEGEN_PDMA_CH5_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH5_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH5_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5SrcArrayTB0 = g_au8CH5SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5SrcArrayTB0 = g_au16CH5SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5SrcArrayTB0 = g_au32CH5SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5SrcArrayTB1 = g_au8CH5SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5SrcArrayTB1 = g_au16CH5SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5SrcArrayTB1 = g_au32CH5SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5SrcArrayTB2 = g_au8CH5SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5SrcArrayTB2 = g_au16CH5SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5SrcArrayTB2 = g_au32CH5SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5SrcArrayTB3 = g_au8CH5SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5SrcArrayTB3 = g_au16CH5SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5SrcArrayTB3 = g_au32CH5SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5SrcArrayTB4 = g_au8CH5SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5SrcArrayTB4 = g_au16CH5SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5SrcArrayTB4 = g_au32CH5SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5DesArrayTB0 = g_au8CH5DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5DesArrayTB0 = g_au16CH5DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5DesArrayTB0 = g_au32CH5DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5DesArrayTB1 = g_au8CH5DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5DesArrayTB1 = g_au16CH5DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5DesArrayTB1 = g_au32CH5DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5DesArrayTB2 = g_au8CH5DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5DesArrayTB2 = g_au16CH5DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5DesArrayTB2 = g_au32CH5DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5DesArrayTB3 = g_au8CH5DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5DesArrayTB3 = g_au16CH5DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5DesArrayTB3 = g_au32CH5DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH5DesArrayTB4 = g_au8CH5DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH5DesArrayTB4 = g_au16CH5DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH5DesArrayTB4 = g_au32CH5DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH5_DES_ADDR_S */   
    /* Open CH5 */
    PDMA_Open(PDMA, 1 << 5);
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH5[0].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH5[0].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH5[0].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH5[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH5_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH5[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH5_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH5_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH5[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH5[0].u32Offset = (uint32_t)&DMA_DESC_CH5[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH5[1].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH5[1].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH5[1].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH5[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH5_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH5[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH5_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH5_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH5[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH5[1].u32Offset = (uint32_t)&DMA_DESC_CH5[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH5[2].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH5[2].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH5[2].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH5[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH5_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH5[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH5_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH5[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH5[2].u32Offset = (uint32_t)&DMA_DESC_CH5[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH5[3].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH5[3].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH5[3].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH5[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH5_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH5[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH5_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH5_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH5[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH5[3].u32Offset = (uint32_t)&DMA_DESC_CH5[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH5_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH5[4].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH5[4].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH5_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH5[4].u32Ctl =
        (((uint32_t)PDMA_CH5_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH5_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH5_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH5_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH5_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH5_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH5_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH5[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH5_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH5[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH5_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH5[4].u32Offset = (uint32_t)&DMA_DESC_CH5[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH5_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 5, NUCODEGEN_PDMA_CH5_TMOUT, NUCODEGEN_PDMA_CH5_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH5_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 5, NUCODEGEN_PDMA_CH5_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH5[0]);
#endif  //NUCODEGEN_PDMA_CH5_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH5

#if (NUCODEGEN_PDMA_CH6)
#if (NUCODEGEN_PDMA_CH6_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH6_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6SrcArray = g_au8CH6SrcArray;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH6SrcArray = g_au16CH6SrcArray;
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6SrcArray = g_au32CH6SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6DesArray = g_au8CH6DesArray;
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6DesArray = g_au16CH6DesArray;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6DesArray = g_au32CH6DesArray;
#endif 
#endif
    /* Open CH6 */
    PDMA_Open(PDMA, 1 << 6);

#if (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH6_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 6, PDMA_WIDTH_8, PDMA_CH6_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH6_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 6, PDMA_WIDTH_16, PDMA_CH6_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH6_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH6_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 6, PDMA_WIDTH_32, PDMA_CH6_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH6_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH6_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 6, (uint32_t)NUCODEGEN_PDMA_CH6_SRC_ADDR, NUCODEGEN_PDMA_CH6_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH6_DES_ADDR, NUCODEGEN_PDMA_CH6_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 6, NUCODEGEN_PDMA_CH6_MODE, NUCODEGEN_PDMA_CH6_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH6_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 6, NUCODEGEN_PDMA_CH6_TMOUT, NUCODEGEN_PDMA_CH6_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH6_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 6, NUCODEGEN_PDMA_CH6_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH6_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH6_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6SrcArrayTB0 = g_au8CH6SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6SrcArrayTB0 = g_au16CH6SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6SrcArrayTB0 = g_au32CH6SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6SrcArrayTB1 = g_au8CH6SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6SrcArrayTB1 = g_au16CH6SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6SrcArrayTB1 = g_au32CH6SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6SrcArrayTB2 = g_au8CH6SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6SrcArrayTB2 = g_au16CH6SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6SrcArrayTB2 = g_au32CH6SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6SrcArrayTB3 = g_au8CH6SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6SrcArrayTB3 = g_au16CH6SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6SrcArrayTB3 = g_au32CH6SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6SrcArrayTB4 = g_au8CH6SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6SrcArrayTB4 = g_au16CH6SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6SrcArrayTB4 = g_au32CH6SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6DesArrayTB0 = g_au8CH6DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6DesArrayTB0 = g_au16CH6DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6DesArrayTB0 = g_au32CH6DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6DesArrayTB1 = g_au8CH6DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6DesArrayTB1 = g_au16CH6DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6DesArrayTB1 = g_au32CH6DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6DesArrayTB2 = g_au8CH6DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6DesArrayTB2 = g_au16CH6DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6DesArrayTB2 = g_au32CH6DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6DesArrayTB3 = g_au8CH6DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6DesArrayTB3 = g_au16CH6DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6DesArrayTB3 = g_au32CH6DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH6DesArrayTB4 = g_au8CH6DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH6DesArrayTB4 = g_au16CH6DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH6DesArrayTB4 = g_au32CH6DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH6_DES_ADDR_S */   
    /* Open CH6 */
    PDMA_Open(PDMA, 1 << 6);
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH6[0].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH6[0].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH6[0].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH6[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH6_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH6[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH6_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH6_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH6[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH6[0].u32Offset = (uint32_t)&DMA_DESC_CH6[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH6[1].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH6[1].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH6[1].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH6[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH6_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH6[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH6_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH6_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH6[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH6[1].u32Offset = (uint32_t)&DMA_DESC_CH6[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH6[2].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH6[2].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH6[2].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH6[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH6_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH6[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH6_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH6[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH6[2].u32Offset = (uint32_t)&DMA_DESC_CH6[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH6[3].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH6[3].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH6[3].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH6[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH6_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH6[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH6_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH6_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH6[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH6[3].u32Offset = (uint32_t)&DMA_DESC_CH6[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH6_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH6[4].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH6[4].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH6_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH6[4].u32Ctl =
        (((uint32_t)PDMA_CH6_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH6_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH6_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH6_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH6_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH6_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH6_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH6[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH6_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH6[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH6_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH6[4].u32Offset = (uint32_t)&DMA_DESC_CH6[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH6_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 6, NUCODEGEN_PDMA_CH6_TMOUT, NUCODEGEN_PDMA_CH6_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH6_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 6, NUCODEGEN_PDMA_CH6_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH6[0]);
#endif  //NUCODEGEN_PDMA_CH6_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH6

#if (NUCODEGEN_PDMA_CH7)
#if (NUCODEGEN_PDMA_CH7_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH7_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7SrcArray = g_au8CH7SrcArray;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH7SrcArray = g_au16CH7SrcArray;
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7SrcArray = g_au32CH7SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7DesArray = g_au8CH7DesArray;
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7DesArray = g_au16CH7DesArray;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7DesArray = g_au32CH7DesArray;
#endif 
#endif
    /* Open CH7 */
    PDMA_Open(PDMA, 1 << 7);

#if (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH7_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 7, PDMA_WIDTH_8, PDMA_CH7_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH7_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 7, PDMA_WIDTH_16, PDMA_CH7_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH7_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH7_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 7, PDMA_WIDTH_32, PDMA_CH7_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH7_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH7_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 7, (uint32_t)NUCODEGEN_PDMA_CH7_SRC_ADDR, NUCODEGEN_PDMA_CH7_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH7_DES_ADDR, NUCODEGEN_PDMA_CH7_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 7, NUCODEGEN_PDMA_CH7_MODE, NUCODEGEN_PDMA_CH7_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH7_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 7, NUCODEGEN_PDMA_CH7_TMOUT, NUCODEGEN_PDMA_CH7_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH7_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 7, NUCODEGEN_PDMA_CH7_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH7_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH7_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7SrcArrayTB0 = g_au8CH7SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7SrcArrayTB0 = g_au16CH7SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7SrcArrayTB0 = g_au32CH7SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7SrcArrayTB1 = g_au8CH7SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7SrcArrayTB1 = g_au16CH7SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7SrcArrayTB1 = g_au32CH7SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7SrcArrayTB2 = g_au8CH7SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7SrcArrayTB2 = g_au16CH7SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7SrcArrayTB2 = g_au32CH7SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7SrcArrayTB3 = g_au8CH7SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7SrcArrayTB3 = g_au16CH7SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7SrcArrayTB3 = g_au32CH7SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7SrcArrayTB4 = g_au8CH7SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7SrcArrayTB4 = g_au16CH7SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7SrcArrayTB4 = g_au32CH7SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7DesArrayTB0 = g_au8CH7DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7DesArrayTB0 = g_au16CH7DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7DesArrayTB0 = g_au32CH7DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7DesArrayTB1 = g_au8CH7DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7DesArrayTB1 = g_au16CH7DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7DesArrayTB1 = g_au32CH7DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7DesArrayTB2 = g_au8CH7DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7DesArrayTB2 = g_au16CH7DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7DesArrayTB2 = g_au32CH7DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7DesArrayTB3 = g_au8CH7DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7DesArrayTB3 = g_au16CH7DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7DesArrayTB3 = g_au32CH7DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH7DesArrayTB4 = g_au8CH7DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH7DesArrayTB4 = g_au16CH7DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH7DesArrayTB4 = g_au32CH7DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH7_DES_ADDR_S */   
    /* Open CH7 */
    PDMA_Open(PDMA, 1 << 7);
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH7[0].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH7[0].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH7[0].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH7[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH7_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH7[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH7_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH7_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH7[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH7[0].u32Offset = (uint32_t)&DMA_DESC_CH7[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH7[1].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH7[1].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH7[1].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH7[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH7_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH7[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH7_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH7_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH7[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH7[1].u32Offset = (uint32_t)&DMA_DESC_CH7[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH7[2].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH7[2].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH7[2].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH7[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH7_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH7[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH7_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH7[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH7[2].u32Offset = (uint32_t)&DMA_DESC_CH7[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH7[3].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH7[3].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH7[3].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH7[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH7_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH7[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH7_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH7_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH7[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH7[3].u32Offset = (uint32_t)&DMA_DESC_CH7[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH7_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH7[4].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH7[4].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH7_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH7[4].u32Ctl =
        (((uint32_t)PDMA_CH7_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH7_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH7_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH7_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH7_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH7_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH7_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH7[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH7_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH7[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH7_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH7[4].u32Offset = (uint32_t)&DMA_DESC_CH7[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH7_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 7, NUCODEGEN_PDMA_CH7_TMOUT, NUCODEGEN_PDMA_CH7_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH7_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 7, NUCODEGEN_PDMA_CH7_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH7[0]);
#endif  //NUCODEGEN_PDMA_CH7_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH7

#if (NUCODEGEN_PDMA_CH8)
#if (NUCODEGEN_PDMA_CH8_OPMODE_S == NUCODEGEN_PDMA_OP_BASIC)
#if(NUCODEGEN_PDMA_CH8_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8SrcArray = g_au8CH8SrcArray;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_16)	
    g_pu16CH8SrcArray = g_au16CH8SrcArray;
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8SrcArray = g_au32CH8SrcArray;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_DES_ADDR_S) 
#if (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8DesArray = g_au8CH8DesArray;
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8DesArray = g_au16CH8DesArray;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8DesArray = g_au32CH8DesArray;
#endif 
#endif
    /* Open CH8 */
    PDMA_Open(PDMA, 1 << 8);

#if (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_8)
    /* Transfer count is PDMA_CH8_DATA_LENGTH, transfer width is PDMA_WIDTH_8 */
    PDMA_SetTransferCnt(PDMA, 8, PDMA_WIDTH_8, PDMA_CH8_DATA_LENGTH);
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_16)
    /* Transfer count is PDMA_CH8_DATA_LENGTH, transfer width is PDMA_WIDTH_16 */
    PDMA_SetTransferCnt(PDMA, 8, PDMA_WIDTH_16, PDMA_CH8_DATA_LENGTH);	
#elif (NUCODEGEN_PDMA_CH8_WIDTH==NUCODEGEN_PDMA_WIDTH_32)
    /* Transfer count is PDMA_CH8_DATA_LENGTH, transfer width is PDMA_WIDTH_32 */
    PDMA_SetTransferCnt(PDMA, 8, PDMA_WIDTH_32, PDMA_CH8_DATA_LENGTH);
#endif    
    
    /* Set source address is NUCODEGEN_PDMA_CH8_SRC_ADDR, destination address is NUCODEGEN_PDMA_CH8_DES_ADDR */
    PDMA_SetTransferAddr(PDMA, 8, (uint32_t)NUCODEGEN_PDMA_CH8_SRC_ADDR, NUCODEGEN_PDMA_CH8_SRC_TYPE, (uint32_t)NUCODEGEN_PDMA_CH8_DES_ADDR, NUCODEGEN_PDMA_CH8_DES_TYPE);

    /* Set transfer mode and burst size */
    PDMA_SetBurstType(PDMA, 8, NUCODEGEN_PDMA_CH8_MODE, NUCODEGEN_PDMA_CH8_BURST_SIZE);

#if(NUCODEGEN_PDMA_CH8_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 8, NUCODEGEN_PDMA_CH8_TMOUT, NUCODEGEN_PDMA_CH8_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH8_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 8, NUCODEGEN_PDMA_CH8_SRC_DES_SEL, 0, 0);
#else   //NUCODEGEN_PDMA_CH8_OPMODE_S == PDMA_OP_SCATTER
#if(NUCODEGEN_PDMA_CH8_SRC_ADDR_S)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8SrcArrayTB0 = g_au8CH8SrcArrayTB0;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8SrcArrayTB0 = g_au16CH8SrcArrayTB0;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8SrcArrayTB0 = g_au32CH8SrcArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8SrcArrayTB1 = g_au8CH8SrcArrayTB1;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8SrcArrayTB1 = g_au16CH8SrcArrayTB1;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8SrcArrayTB1 = g_au32CH8SrcArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8SrcArrayTB2 = g_au8CH8SrcArrayTB2;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8SrcArrayTB2 = g_au16CH8SrcArrayTB2;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8SrcArrayTB2 = g_au32CH8SrcArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8SrcArrayTB3 = g_au8CH8SrcArrayTB3;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8SrcArrayTB3 = g_au16CH8SrcArrayTB3;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8SrcArrayTB3 = g_au32CH8SrcArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8SrcArrayTB4 = g_au8CH8SrcArrayTB4;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8SrcArrayTB4 = g_au16CH8SrcArrayTB4;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8SrcArrayTB4 = g_au32CH8SrcArrayTB4;
#endif
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_DES_ADDR_S)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8DesArrayTB0 = g_au8CH8DesArrayTB0;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8DesArrayTB0 = g_au16CH8DesArrayTB0;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8DesArrayTB0 = g_au32CH8DesArrayTB0;
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8DesArrayTB1 = g_au8CH8DesArrayTB1;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8DesArrayTB1 = g_au16CH8DesArrayTB1;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8DesArrayTB1 = g_au32CH8DesArrayTB1;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8DesArrayTB2 = g_au8CH8DesArrayTB2;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8DesArrayTB2 = g_au16CH8DesArrayTB2;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8DesArrayTB2 = g_au32CH8DesArrayTB2;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8DesArrayTB3 = g_au8CH8DesArrayTB3;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8DesArrayTB3 = g_au16CH8DesArrayTB3;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8DesArrayTB3 = g_au32CH8DesArrayTB3;
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    g_pu8CH8DesArrayTB4 = g_au8CH8DesArrayTB4;
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    g_pu16CH8DesArrayTB4 = g_au16CH8DesArrayTB4;	
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    g_pu32CH8DesArrayTB4 = g_au32CH8DesArrayTB4;
#endif
#endif
#endif /* NUCODEGEN_PDMA_CH8_DES_ADDR_S */   
    /* Open CH8 */
    PDMA_Open(PDMA, 1 << 8);
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH8[0].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH8[0].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB0;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB0==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH8[0].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB0 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /*   Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB0 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB0 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB0 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB0 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB0_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB0;  /* Set operation mode */
#endif        
    /* Configure source address */
    DMA_DESC_CH8[0].u32Src = (uint32_t)NUCODEGEN_PDMA_CH8_SRC_ADDR_TB0;

    /* Configure destination address */
    DMA_DESC_CH8[0].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH8_DES_ADDR_TB0;

#if(NUCODEGEN_PDMA_CH8_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH8[0].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH8[0].u32Offset = (uint32_t)&DMA_DESC_CH8[1] - (PDMA->SCATBA); /* next descriptor table is table 1 */
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB0_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH8[1].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH8[1].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB1;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB1==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH8[1].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB1 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB1 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB1 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB1 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB1 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB1_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB1;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH8[1].u32Src = (uint32_t)NUCODEGEN_PDMA_CH8_SRC_ADDR_TB1;

    /* Configure destination address */
    DMA_DESC_CH8[1].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH8_DES_ADDR_TB1;

#if(NUCODEGEN_PDMA_CH8_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH8[1].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH8[1].u32Offset = (uint32_t)&DMA_DESC_CH8[2] - (PDMA->SCATBA); /* next descriptor table is table 2 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB1_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH8[2].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH8[2].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB2;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB2==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH8[2].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB2 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB2 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB2 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB2 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB2 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB2_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB2;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH8[2].u32Src = (uint32_t)NUCODEGEN_PDMA_CH8_SRC_ADDR_TB2;

    /* Configure destination address */
    DMA_DESC_CH8[2].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH8_DES_ADDR_TB2;
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH8[2].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH8[2].u32Offset = (uint32_t)&DMA_DESC_CH8[3] - (PDMA->SCATBA); /* next descriptor table is table 3 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB2_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH8[3].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH8[3].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB3;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB3==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH8[3].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB3 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB3 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB3 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB3 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB3 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB3_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB3;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH8[3].u32Src = (uint32_t)NUCODEGEN_PDMA_CH8_SRC_ADDR_TB3;

    /* Configure destination address */
    DMA_DESC_CH8[3].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH8_DES_ADDR_TB3;

#if(NUCODEGEN_PDMA_CH8_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_BASIC)
    /* Configure next descriptor table address */
    DMA_DESC_CH8[3].u32Offset = 0; /* No next operation table. No effect in basic mode */
#else
    /* Configure next descriptor table address */
    DMA_DESC_CH8[3].u32Offset = (uint32_t)&DMA_DESC_CH8[4] - (PDMA->SCATBA); /* next descriptor table is table 4 */
#endif
#endif
#if(NUCODEGEN_PDMA_CH8_OPMODE_TB3_S==NUCODEGEN_PDMA_OP_SCATTER)
#if (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_8)
    DMA_DESC_CH8[4].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_8 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_16)
    DMA_DESC_CH8[4].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_16 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB4;  /* Set operation mode */
#elif (NUCODEGEN_PDMA_CH8_WIDTH_TB4==NUCODEGEN_PDMA_WIDTH_32)
    DMA_DESC_CH8[4].u32Ctl =
        (((uint32_t)PDMA_CH8_DATA_LENGTH_TB4 - 1) << PDMA_DSCT_CTL_TXCNT_Pos) | /* Set transfer count */
        PDMA_WIDTH_32 |   /* Set transfer width */
        NUCODEGEN_PDMA_CH8_SRC_TYPE_TB4 |    /* Set source increment type */
        NUCODEGEN_PDMA_CH8_DES_TYPE_TB4 |    /* Set destination increment type */
        NUCODEGEN_PDMA_CH8_MODE_TB4 |  /* Set transfer type */
        NUCODEGEN_PDMA_CH8_BURST_SIZE_TB4 |  /* Set burst size */
        NUCODEGEN_PDMA_CH8_TB4_INT_EN |   /* Set table empty interrupt */
        NUCODEGEN_PDMA_CH8_OPMODE_TB4;  /* Set operation mode */
#endif
    /* Configure source address */
    DMA_DESC_CH8[4].u32Src = (uint32_t)NUCODEGEN_PDMA_CH8_SRC_ADDR_TB4;

    /* Configure destination address */
    DMA_DESC_CH8[4].u32Dest = (uint32_t)NUCODEGEN_PDMA_CH8_DES_ADDR_TB4;

    /* Configure next descriptor table address */
    DMA_DESC_CH8[4].u32Offset = (uint32_t)&DMA_DESC_CH8[5] - (PDMA->SCATBA); /* next descriptor table is table 5 */
#endif

#if(NUCODEGEN_PDMA_CH8_TMOUT)
    /* Enable timeout function and set timeout counter */
    PDMA_SetTimeOut(PDMA, 8, NUCODEGEN_PDMA_CH8_TMOUT, NUCODEGEN_PDMA_CH8_TMOUT_CNT);
#endif

    /* Request source is NUCODEGEN_PDMA_CH8_SRC_DES_SEL */
    PDMA_SetTransferMode(PDMA, 8, NUCODEGEN_PDMA_CH8_SRC_DES_SEL, 1, (uint32_t)&DMA_DESC_CH8[0]);
#endif  //NUCODEGEN_PDMA_CH8_OPMODE == PDMA_OP_BASIC
#endif  //NUCODEGEN_PDMA_CH8

#if NUCODEGEN_PDMA_CH0_INT
#if NUCODEGEN_PDMA_CH0_INT_TXDONE
    PDMA_EnableInt(PDMA, 0, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH0_INT_TBDIS
    PDMA_DisableInt(PDMA, 0, PDMA_INT_TEMPTY);
#endif
#if NUCODEGEN_PDMA_CH0_INT_TIMEOUT
    PDMA_EnableInt(PDMA, 0, PDMA_INT_TIMEOUT);
#endif
#endif
#if NUCODEGEN_PDMA_CH1_INT
#if NUCODEGEN_PDMA_CH1_INT_TXDONE
    PDMA_EnableInt(PDMA, 1, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH1_INT_TBDIS
    PDMA_DisableInt(PDMA, 1, PDMA_INT_TEMPTY);
#endif
#if NUCODEGEN_PDMA_CH1_INT_TIMEOUT
    PDMA_EnableInt(PDMA, 1, PDMA_INT_TIMEOUT);
#endif
#endif
#if NUCODEGEN_PDMA_CH2_INT
#if NUCODEGEN_PDMA_CH2_INT_TXDONE
    PDMA_EnableInt(PDMA, 2, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH2_INT_TBDIS
    PDMA_DisableInt(PDMA, 2, PDMA_INT_TEMPTY);
#endif
#endif
#if NUCODEGEN_PDMA_CH3_INT
#if NUCODEGEN_PDMA_CH3_INT_TXDONE
    PDMA_EnableInt(PDMA, 3, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH3_INT_TBDIS
    PDMA_DisableInt(PDMA, 3, PDMA_INT_TEMPTY);
#endif
#endif
#if NUCODEGEN_PDMA_CH4_INT
#if NUCODEGEN_PDMA_CH4_INT_TXDONE
    PDMA_EnableInt(PDMA, 4, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH4_INT_TBDIS
    PDMA_DisableInt(PDMA, 4, PDMA_INT_TEMPTY);
#endif
#endif
#if NUCODEGEN_PDMA_CH5_INT
#if NUCODEGEN_PDMA_CH5_INT_TXDONE
    PDMA_EnableInt(PDMA, 5, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH5_INT_TBDIS
    PDMA_DisableInt(PDMA, 5, PDMA_INT_TEMPTY);
#endif
#endif
#if NUCODEGEN_PDMA_CH6_INT
#if NUCODEGEN_PDMA_CH6_INT_TXDONE
    PDMA_EnableInt(PDMA, 6, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH6_INT_TBDIS
    PDMA_DisableInt(PDMA, 6, PDMA_INT_TEMPTY);
#endif
#endif
#if NUCODEGEN_PDMA_CH7_INT
#if NUCODEGEN_PDMA_CH7_INT_TXDONE
    PDMA_EnableInt(PDMA, 7, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH7_INT_TBDIS
    PDMA_DisableInt(PDMA, 7, PDMA_INT_TEMPTY);
#endif
#endif
#if NUCODEGEN_PDMA_CH8_INT
#if NUCODEGEN_PDMA_CH8_INT_TXDONE
    PDMA_EnableInt(PDMA, 8, PDMA_INT_TRANS_DONE);
#endif
#if NUCODEGEN_PDMA_CH8_INT_TBDIS
    PDMA_DisableInt(PDMA, 8, PDMA_INT_TEMPTY);
#endif
#endif


#if (NUCODEGEN_PDMA_CH0_INT || NUCODEGEN_PDMA_CH1_INT || NUCODEGEN_PDMA_CH2_INT || NUCODEGEN_PDMA_CH3_INT || NUCODEGEN_PDMA_CH4_INT || NUCODEGEN_PDMA_CH5_INT \
    || NUCODEGEN_PDMA_CH6_INT || NUCODEGEN_PDMA_CH7_INT || NUCODEGEN_PDMA_CH8_INT )
    NVIC_EnableIRQ(PDMA_IRQn);
#endif
}
#endif
