| MINI58_BSP V3.01.003 The Board Support Package for Mini58 Series MCU

spi.c
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1/**************************************************************************/
12#include "Mini58Series.h"
39uint32_t SPI_Open(SPI_T *spi,
40 uint32_t u32MasterSlave,
41 uint32_t u32SPIMode,
42 uint32_t u32DataWidth,
43 uint32_t u32BusClock)
44{
45 if(u32DataWidth == 32)
46 u32DataWidth = 0;
47
48 spi->CTL = u32MasterSlave | (u32DataWidth << SPI_CTL_DWIDTH_Pos) | (u32SPIMode);
49
50 if(u32MasterSlave == SPI_SLAVE)
51 spi->SSCTL = SPI_SSCTL_SSLTEN_Msk;
52
53 return ( SPI_SetBusClock(spi, u32BusClock) );
54}
55
61 void SPI_Close(SPI_T *spi)
62{
63 /* Reset SPI */
64 SYS->IPRST1 |= SYS_IPRST1_SPI0RST_Msk;
65 SYS->IPRST1 &= ~SYS_IPRST1_SPI0RST_Msk;
66}
67
73 void SPI_ClearRxFIFO(SPI_T *spi)
74{
75 spi->FIFOCTL |= SPI_FIFOCTL_RXRST_Msk;
76}
77
83 void SPI_ClearTxFIFO(SPI_T *spi)
84{
85 spi->FIFOCTL |= SPI_FIFOCTL_TXRST_Msk;
86}
87
93 void SPI_DisableAutoSS(SPI_T *spi)
94{
95 spi->SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
96}
97
105 void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
106{
107 spi->SSCTL = (spi->SSCTL & ~(SPI_SSCTL_SSACTPOL_Msk | SPI_SSCTL_SS_Msk)) | (u32SSPinMask | u32ActiveLevel) | SPI_SSCTL_AUTOSS_Msk;
108}
109
116uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock)
117{
118 uint32_t u32Div = 0;
119 uint32_t u32ClkSrc;
120
121 if((CLK->CLKSEL1 & CLK_CLKSEL1_SPISEL_Msk) == CLK_CLKSEL1_SPISEL_XTAL)
122 {
123 if((u32ClkSrc = CLK_GetHXTFreq()) == 0)
124 u32ClkSrc = CLK_GetLXTFreq();
125 }
126 else if((CLK->CLKSEL1 & CLK_CLKSEL1_SPISEL_Msk) == CLK_CLKSEL1_SPISEL_PLL)
127 u32ClkSrc = CLK_GetPLLClockFreq();
128 else
129 u32ClkSrc = CLK_GetHCLKFreq();
130
131 if(u32BusClock > u32ClkSrc)
132 u32BusClock = u32ClkSrc;
133
134 if(u32BusClock != 0)
135 {
136 u32Div = (((u32ClkSrc / u32BusClock) + 1) >> 1) - 1;
137 if(u32Div > SPI_CLKDIV_DIVIDER_Msk)
138 u32Div = SPI_CLKDIV_DIVIDER_Msk;
139 }
140 else
141 return 0;
142
143 spi->CLKDIV = (spi->CLKDIV & ~SPI_CLKDIV_DIVIDER_Msk) | u32Div;
144
145 return ( u32ClkSrc / ((u32Div+1)*2) );
146}
147
155 void SPI_EnableFIFO(SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
156{
157 spi->FIFOCTL = (spi->FIFOCTL & ~(SPI_FIFOCTL_TXTH_Msk | SPI_FIFOCTL_RXTH_Msk) |
158 (u32TxThreshold << SPI_FIFOCTL_TXTH_Pos) |
159 (u32RxThreshold << SPI_FIFOCTL_RXTH_Pos));
160
161 spi->CTL |= SPI_CTL_FIFOEN_Msk;
162}
163
169 void SPI_DisableFIFO(SPI_T *spi)
170{
171 spi->CTL &= ~SPI_CTL_FIFOEN_Msk;
172}
173
179uint32_t SPI_GetBusClock(SPI_T *spi)
180{
181 uint32_t u32Div;
182 uint32_t u32ClkSrc;
183
184 if((CLK->CLKSEL1 & CLK_CLKSEL1_SPISEL_Msk) == CLK_CLKSEL1_SPISEL_XTAL)
185 {
186 if((u32ClkSrc = CLK_GetHXTFreq()) == 0)
187 u32ClkSrc = CLK_GetLXTFreq();
188 }
189 else if((CLK->CLKSEL1 & CLK_CLKSEL1_SPISEL_Msk) == CLK_CLKSEL1_SPISEL_PLL)
190 u32ClkSrc = CLK_GetPLLClockFreq();
191 else
192 u32ClkSrc = CLK_GetHCLKFreq();
193
194 u32Div = spi->CLKDIV & SPI_CLKDIV_DIVIDER_Msk;
195
196 return ( u32ClkSrc / ((u32Div + 1)*2) );
197}
198
209 void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask)
210{
211 if((u32Mask & SPI_IE_MASK) == SPI_IE_MASK)
212 spi->CTL |= SPI_CTL_UNITIEN_Msk;
213
214 if((u32Mask & SPI_SSTA_INTEN_MASK) == SPI_SSTA_INTEN_MASK)
215 spi->SLVCTL |= SPI_SLVCTL_SLVSTIEN_Msk;
216
217 if((u32Mask & SPI_FIFO_TX_INTEN_MASK) == SPI_FIFO_TX_INTEN_MASK)
218 spi->FIFOCTL |= SPI_FIFOCTL_TXTHIEN_Msk;
219
220 if((u32Mask & SPI_FIFO_RX_INTEN_MASK) == SPI_FIFO_RX_INTEN_MASK)
221 spi->FIFOCTL |= SPI_FIFOCTL_RXTHIEN_Msk;
222
223 if((u32Mask & SPI_FIFO_RXOV_INTEN_MASK) == SPI_FIFO_RXOV_INTEN_MASK)
224 spi->FIFOCTL |= SPI_FIFOCTL_RXOVIEN_Msk;
225
226 if((u32Mask & SPI_FIFO_TIMEOUT_INTEN_MASK) == SPI_FIFO_TIMEOUT_INTEN_MASK)
227 spi->FIFOCTL |= SPI_FIFOCTL_RXTOIEN_Msk;
228}
229
240 void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask)
241{
242 if((u32Mask & SPI_IE_MASK) == SPI_IE_MASK)
243 spi->CTL &= ~SPI_CTL_UNITIEN_Msk;
244
245 if((u32Mask & SPI_SSTA_INTEN_MASK) == SPI_SSTA_INTEN_MASK)
246 spi->SLVCTL &= ~SPI_SLVCTL_SLVSTIEN_Msk;
247
248 if((u32Mask & SPI_FIFO_TX_INTEN_MASK) == SPI_FIFO_TX_INTEN_MASK)
249 spi->FIFOCTL &= ~SPI_FIFOCTL_TXTHIEN_Msk;
250
251 if((u32Mask & SPI_FIFO_RX_INTEN_MASK) == SPI_FIFO_RX_INTEN_MASK)
252 spi->FIFOCTL &= ~SPI_FIFOCTL_RXTHIEN_Msk;
253
254 if((u32Mask & SPI_FIFO_RXOV_INTEN_MASK) == SPI_FIFO_RXOV_INTEN_MASK)
255 spi->FIFOCTL &= ~SPI_FIFOCTL_RXOVIEN_Msk;
256
257 if((u32Mask & SPI_FIFO_TIMEOUT_INTEN_MASK) == SPI_FIFO_TIMEOUT_INTEN_MASK)
258 spi->FIFOCTL &= ~SPI_FIFOCTL_RXTOIEN_Msk;
259}
260 /* end of group Mini58_SPI_EXPORTED_FUNCTIONS */
262 /* end of group Mini58_SPI_Driver */
264 /* end of group Mini58_Device_Driver */
266
267/*** (C) COPYRIGHT 2022 Nuvoton Technology Corp. ***/
Mini58Series.h
Mini58 series peripheral access layer header file. This file contains all the peripheral register's d...
SPI_SSCTL_SSACTPOL_Msk
#define SPI_SSCTL_SSACTPOL_Msk
Definition: Mini58Series.h:9359
SPI_FIFOCTL_RXOVIEN_Msk
#define SPI_FIFOCTL_RXOVIEN_Msk
Definition: Mini58Series.h:9407
SPI_CTL_FIFOEN_Msk
#define SPI_CTL_FIFOEN_Msk
Definition: Mini58Series.h:9338
SPI_SSCTL_SS_Msk
#define SPI_SSCTL_SS_Msk
Definition: Mini58Series.h:9356
SPI_CTL_UNITIEN_Msk
#define SPI_CTL_UNITIEN_Msk
Definition: Mini58Series.h:9329
SPI_FIFOCTL_RXTH_Pos
#define SPI_FIFOCTL_RXTH_Pos
Definition: Mini58Series.h:9412
SPI_FIFOCTL_TXTH_Msk
#define SPI_FIFOCTL_TXTH_Msk
Definition: Mini58Series.h:9416
SPI_CTL_DWIDTH_Pos
#define SPI_CTL_DWIDTH_Pos
Definition: Mini58Series.h:9313
SPI_SSCTL_SSLTEN_Msk
#define SPI_SSCTL_SSLTEN_Msk
Definition: Mini58Series.h:9365
SPI_FIFOCTL_RXRST_Msk
#define SPI_FIFOCTL_RXRST_Msk
Definition: Mini58Series.h:9395
SPI_FIFOCTL_TXRST_Msk
#define SPI_FIFOCTL_TXRST_Msk
Definition: Mini58Series.h:9398
SYS_IPRST1_SPI0RST_Msk
#define SYS_IPRST1_SPI0RST_Msk
Definition: Mini58Series.h:10110
SPI_CLKDIV_DIVIDER_Msk
#define SPI_CLKDIV_DIVIDER_Msk
Definition: Mini58Series.h:9353
SPI_FIFOCTL_TXTH_Pos
#define SPI_FIFOCTL_TXTH_Pos
Definition: Mini58Series.h:9415
SPI_FIFOCTL_RXTOIEN_Msk
#define SPI_FIFOCTL_RXTOIEN_Msk
Definition: Mini58Series.h:9410
SPI_FIFOCTL_RXTHIEN_Msk
#define SPI_FIFOCTL_RXTHIEN_Msk
Definition: Mini58Series.h:9401
SPI_FIFOCTL_RXTH_Msk
#define SPI_FIFOCTL_RXTH_Msk
Definition: Mini58Series.h:9413
SPI_FIFOCTL_TXTHIEN_Msk
#define SPI_FIFOCTL_TXTHIEN_Msk
Definition: Mini58Series.h:9404
SPI_SSCTL_AUTOSS_Msk
#define SPI_SSCTL_AUTOSS_Msk
Definition: Mini58Series.h:9362
SPI_SLVCTL_SLVSTIEN_Msk
#define SPI_SLVCTL_SLVSTIEN_Msk
Definition: Mini58Series.h:9383
CLK_CLKSEL1_SPISEL_XTAL
#define CLK_CLKSEL1_SPISEL_XTAL
Definition: clk.h:78
CLK_CLKSEL1_SPISEL_PLL
#define CLK_CLKSEL1_SPISEL_PLL
Definition: clk.h:80
CLK_GetHCLKFreq
uint32_t CLK_GetHCLKFreq(void)
This function get HCLK frequency. The frequency unit is Hz.
Definition: clk.c:115
CLK_GetLXTFreq
uint32_t CLK_GetLXTFreq(void)
This function get external low frequency crystal frequency. The frequency unit is Hz.
Definition: clk.c:103
CLK_GetPLLClockFreq
__STATIC_INLINE uint32_t CLK_GetPLLClockFreq(void)
Get PLL clock frequency.
Definition: clk.h:197
CLK_GetHXTFreq
uint32_t CLK_GetHXTFreq(void)
This function get external high frequency crystal frequency. The frequency unit is Hz.
Definition: clk.c:91
CLK_CLKSEL1_SPISEL_Msk
#define CLK_CLKSEL1_SPISEL_Msk
Definition: Mini58Series.h:1272
CLK
#define CLK
Pointer to CLK register structure.
Definition: Mini58Series.h:11730
SYS
#define SYS
Pointer to SYS register structure.
Definition: Mini58Series.h:11729
SPI_FIFO_TIMEOUT_INTEN_MASK
#define SPI_FIFO_TIMEOUT_INTEN_MASK
Definition: spi.h:50
SPI_FIFO_RX_INTEN_MASK
#define SPI_FIFO_RX_INTEN_MASK
Definition: spi.h:48
SPI_SSTA_INTEN_MASK
#define SPI_SSTA_INTEN_MASK
Definition: spi.h:46
SPI_SLAVE
#define SPI_SLAVE
Definition: spi.h:38
SPI_FIFO_TX_INTEN_MASK
#define SPI_FIFO_TX_INTEN_MASK
Definition: spi.h:47
SPI_FIFO_RXOV_INTEN_MASK
#define SPI_FIFO_RXOV_INTEN_MASK
Definition: spi.h:49
SPI_IE_MASK
#define SPI_IE_MASK
Definition: spi.h:45
SPI_DisableInt
void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask)
Disable FIFO related interrupts specified by u32Mask parameter.
Definition: spi.c:240
SPI_DisableFIFO
void SPI_DisableFIFO(SPI_T *spi)
Disable FIFO mode.
Definition: spi.c:169
SPI_EnableInt
void SPI_EnableInt(SPI_T *spi, uint32_t u32Mask)
Enable FIFO related interrupts specified by u32Mask parameter.
Definition: spi.c:209
SPI_EnableAutoSS
void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
Enable the automatic slave select function. Only available in Master mode.
Definition: spi.c:105
SPI_EnableFIFO
void SPI_EnableFIFO(SPI_T *spi, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
Enable FIFO mode with user-specified Tx FIFO threshold and Rx FIFO threshold configurations.
Definition: spi.c:155
SPI_DisableAutoSS
void SPI_DisableAutoSS(SPI_T *spi)
Disable the automatic slave select function.
Definition: spi.c:93
SPI_SetBusClock
uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock)
Set the SPI bus clock. Only available in Master mode.
Definition: spi.c:116
SPI_Close
void SPI_Close(SPI_T *spi)
Reset SPI module and disable SPI peripheral clock.
Definition: spi.c:61
SPI_ClearTxFIFO
void SPI_ClearTxFIFO(SPI_T *spi)
Clear Tx FIFO buffer.
Definition: spi.c:83
SPI_Open
uint32_t SPI_Open(SPI_T *spi, uint32_t u32MasterSlave, uint32_t u32SPIMode, uint32_t u32DataWidth, uint32_t u32BusClock)
This function make SPI module be ready to transfer. By default, the SPI transfer sequence is MSB firs...
Definition: spi.c:39
SPI_GetBusClock
uint32_t SPI_GetBusClock(SPI_T *spi)
Get the actual frequency of SPI bus clock. Only available in Master mode.
Definition: spi.c:179
SPI_ClearRxFIFO
void SPI_ClearRxFIFO(SPI_T *spi)
Clear Rx FIFO buffer.
Definition: spi.c:73
SPI_T::CTL
__IO uint32_t CTL
Definition: Mini58Series.h:9061
SPI_T::CLKDIV
__IO uint32_t CLKDIV
Definition: Mini58Series.h:9078
SPI_T::FIFOCTL
__IO uint32_t FIFOCTL
Definition: Mini58Series.h:9235
SPI_T::SSCTL
__IO uint32_t SSCTL
Definition: Mini58Series.h:9114
SPI_T::SLVCTL
__IO uint32_t SLVCTL
Definition: Mini58Series.h:9199
SPI_T
Definition: Mini58Series.h:8972