| NUC029FAE BSP V3.01.002 The Board Support Package for NUC029FAE

Macros | Typedefs | Enumerations
NUC029FAE Device CMSIS Definitions

## Macros
#define | __CM0_REV 0x0201
#define | __NVIC_PRIO_BITS 2
#define | __Vendor_SysTickConfig 0
#define | __MPU_PRESENT 0
#define | __FPU_PRESENT 0

## Typedefs
typedef enum IRQn | IRQn_Type

## Enumerations
enum | IRQn { NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2, SysTick_IRQn = -1, BOD_IRQn = 0, WDT_IRQn = 1, EINT0_IRQn = 2, EINT1_IRQn = 3, GPIO01_IRQn = 4, GPIO234_IRQn = 5, PWM_IRQn = 6, FB_IRQn = 7, TMR0_IRQn = 8, TMR1_IRQn = 9, UART_IRQn = 12, SPI_IRQn = 14, GPIO5_IRQn = 16, HIRC_IRQn = 17, I2C_IRQn = 18, ACMP_IRQn = 25, PDWU_IRQn = 28, ADC_IRQn = 29 }

## Detailed Description

Configuration of the Cortex-M0 Processor and Core Peripherals

## Macro Definition Documentation

## ◆ __CM0_REV

#define __CM0_REV 0x0201

Core Revision r2p1

Definition at line 115 of file NUC029FAE.h.

## ◆ __FPU_PRESENT

#define __FPU_PRESENT 0

FPU present or not

Definition at line 119 of file NUC029FAE.h.

## ◆ __MPU_PRESENT

#define __MPU_PRESENT 0

MPU present or not

Definition at line 118 of file NUC029FAE.h.

## ◆ __NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS 2

Number of Bits used for Priority Levels

Definition at line 116 of file NUC029FAE.h.

## ◆ __Vendor_SysTickConfig

#define __Vendor_SysTickConfig 0

Set to 1 if different SysTick Config is used

Definition at line 117 of file NUC029FAE.h.

## Typedef Documentation

## ◆ IRQn_Type

typedef enum IRQn IRQn_Type

Interrupt Number Definition. The maximum of 32 Specific Interrupts are possible.

## Enumeration Type Documentation

## ◆ IRQn

enum IRQn

Interrupt Number Definition. The maximum of 32 Specific Interrupts are possible.

Enumerator
NonMaskableInt_IRQn | 2 Non Maskable Interrupt
HardFault_IRQn | 3 Cortex-M0 Hard Fault Interrupt
SVCall_IRQn | 11 Cortex-M0 SV Call Interrupt
PendSV_IRQn | 14 Cortex-M0 Pend SV Interrupt
SysTick_IRQn | 15 Cortex-M0 System Tick Interrupt
BOD_IRQn | Brownout low voltage detected interrupt
WDT_IRQn | Watch Dog Timer interrupt
EINT0_IRQn | External signal interrupt from P3.2 pin
EINT1_IRQn | External signal interrupt from P3.3 pin
GPIO01_IRQn | External signal interrupt from P0/P1
GPIO234_IRQn | External interrupt from P2/P3/P4
PWM_IRQn | PWM interrupt
FB_IRQn | Fault brake interrupt
TMR0_IRQn | Timer 0 interrupt
TMR1_IRQn | Timer 1 interrupt
UART_IRQn | UART interrupt
SPI_IRQn | SPI interrupt
GPIO5_IRQn | External interrupt from P5
HIRC_IRQn | HIRC trim interrupt
I2C_IRQn | I2C interrupt
ACMP_IRQn | ACMP interrupt
PDWU_IRQn | Power Down Wake up interrupt
ADC_IRQn | ADC interrupt

Definition at line 73 of file NUC029FAE.h.