NUC029FAE BSP  V3.01.002
The Board Support Package for NUC029FAE
clk.c
Go to the documentation of this file.
1 /**************************************************************************/
12 #include "NUC029FAE.h"
30 void CLK_DisableCKO(void)
31 {
32  /* Disable CKO clock source */
33  CLK->APBCLK &= (~CLK_APBCLK_FDIV_EN_Msk);
34 }
35 
53 void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En)
54 {
55  /* CKO = clock source / 2^(u32ClkDiv + 1) */
56  CLK->FRQDIV = CLK_FRQDIV_DIVIDER_EN_Msk | u32ClkDiv | u32ClkDivBy1En<<CLK_FRQDIV_DIVIDER1_Pos;
57 
58  /* Enable CKO clock source */
59  CLK->APBCLK |= CLK_APBCLK_FDIV_EN_Msk;
60 
61  /* Select CKO clock source */
62  CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_FRQDIV_S_Msk)) | u32ClkSrc;
63 }
64 
69 void CLK_PowerDown(void)
70 {
71  SCB->SCR = SCB_SCR_SLEEPDEEP_Msk;
72  CLK->PWRCON |= (CLK_PWRCON_PWR_DOWN_EN_Msk | CLK_PWRCON_PD_WU_STS_Msk);
73  __WFI();
74 }
75 
80 void CLK_Idle(void)
81 {
82  CLK->PWRCON |= (CLK_PWRCON_PWR_DOWN_EN_Msk | CLK_PWRCON_PD_WU_STS_Msk);
83  __WFI();
84 }
85 
90 uint32_t CLK_GetHXTFreq(void)
91 {
92  if(CLK->PWRCON & CLK_PWRCON_XTL12M )
93  return __XTAL12M;
94  else
95  return 0;
96 }
97 
102 uint32_t CLK_GetLXTFreq(void)
103 {
104  if(CLK->PWRCON & CLK_PWRCON_LXT )
105  return __XTAL32K;
106  else
107  return 0;
108 }
109 
114 uint32_t CLK_GetHCLKFreq(void)
115 {
117  return SystemCoreClock;
118 }
119 
120 
125 uint32_t CLK_GetCPUFreq(void)
126 {
128  return SystemCoreClock;
129 }
130 
141 void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv)
142 {
143  CLK->CLKSEL0 = (CLK->CLKSEL0 & ~CLK_CLKSEL0_HCLK_S_Msk) | u32ClkSrc;
144  CLK->CLKDIV = (CLK->CLKDIV & ~CLK_CLKDIV_HCLK_N_Msk) | u32ClkDiv;
145 }
146 
185 void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
186 {
187  uint32_t u32tmp=0,u32sel=0,u32div=0;
188 
189  if(MODULE_CLKSEL_Msk(u32ModuleIdx)!=MODULE_NoMsk)
190  {
191  u32sel = (uint32_t)&CLK->CLKSEL0+((MODULE_CLKSEL(u32ModuleIdx))*4);
192  u32tmp = *(volatile uint32_t *)(u32sel);
193  u32tmp = ( u32tmp & ~(MODULE_CLKSEL_Msk(u32ModuleIdx)<<MODULE_CLKSEL_Pos(u32ModuleIdx)) ) | u32ClkSrc;
194  *(volatile uint32_t *)(u32sel) = u32tmp;
195  }
196 
197  if(MODULE_CLKDIV_Msk(u32ModuleIdx)!=MODULE_NoMsk)
198  {
199  u32div =(uint32_t)&CLK->CLKDIV+((MODULE_CLKDIV(u32ModuleIdx))*4);
200  u32tmp = *(volatile uint32_t *)(u32div);
201  u32tmp = ( u32tmp & ~(MODULE_CLKDIV_Msk(u32ModuleIdx)<<MODULE_CLKDIV_Pos(u32ModuleIdx)) ) | u32ClkDiv;
202  *(volatile uint32_t *)(u32div) = u32tmp;
203  }
204 }
205 
215 void CLK_SetSysTickClockSrc(uint32_t u32ClkSrc)
216 {
217  CLK->CLKSEL0 = (CLK->CLKSEL0 & ~CLK_CLKSEL0_STCLK_S_Msk) | u32ClkSrc;
218 }
219 
228 void CLK_EnableXtalRC(uint32_t u32ClkMask)
229 {
230  CLK->PWRCON |=u32ClkMask;
231 }
232 
241 void CLK_DisableXtalRC(uint32_t u32ClkMask)
242 {
243  CLK->PWRCON &=~u32ClkMask;
244 }
245 
263 void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
264 {
265  *(volatile uint32_t *)((uint32_t)&CLK->APBCLK+(MODULE_APBCLK(u32ModuleIdx)*4)) |= 1<<MODULE_IP_EN_Pos(u32ModuleIdx);
266 }
267 
285 void CLK_DisableModuleClock(uint32_t u32ModuleIdx)
286 {
287  *(volatile uint32_t *)((uint32_t)&CLK->APBCLK+(MODULE_APBCLK(u32ModuleIdx)*4)) &= ~(1<<MODULE_IP_EN_Pos(u32ModuleIdx));
288 }
289 
298 void CLK_SysTickDelay(uint32_t us)
299 {
300  SysTick->LOAD = us * CyclesPerUs;
301  SysTick->VAL = (0x00);
302  SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
303 
304  /* Waiting for down-count to zero */
305  while((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0);
306  SysTick->CTRL = 0;
307 }
308 
322 uint32_t CLK_WaitClockReady(uint32_t u32ClkMask)
323 {
324  int32_t i32TimeOutCnt;
325 
326  i32TimeOutCnt = __HSI / 200; /* About 5ms */
327 
328  while((CLK->CLKSTATUS & u32ClkMask) != u32ClkMask)
329  {
330  if(i32TimeOutCnt-- <= 0)
331  return 0;
332  }
333  return 1;
334 }
335 
336  /* end of group NUC029FAE_CLK_EXPORTED_FUNCTIONS */
338  /* end of group NUC029FAE_CLK_Driver */
340  /* end of group NUC029FAE_Device_Driver */
342 
343 /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
#define MODULE_NoMsk
Definition: clk.h:120
NUC029FAE peripheral access layer header file. This file contains all the peripheral register's defin...
#define MODULE_CLKDIV(x)
Definition: clk.h:116
void CLK_DisableCKO(void)
This function disable frequency output function.
Definition: clk.c:30
#define MODULE_IP_EN_Pos(x)
Definition: clk.h:119
uint32_t CLK_GetHCLKFreq(void)
This function get HCLK frequency. The frequency unit is Hz.
Definition: clk.c:114
void SystemCoreClockUpdate(void)
Updates the SystemCoreClock with current core Clock retrieved from CPU registers.
void CLK_PowerDown(void)
This function let system enter to Power-down mode.
Definition: clk.c:69
void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
This function enable module clock.
Definition: clk.c:263
#define __HSI
uint32_t CLK_GetCPUFreq(void)
This function get CPU frequency. The frequency unit is Hz.
Definition: clk.c:125
uint32_t CLK_GetHXTFreq(void)
This function get external high frequency crystal frequency. The frequency unit is Hz.
Definition: clk.c:90
uint32_t CLK_GetLXTFreq(void)
This function get external low frequency crystal frequency. The frequency unit is Hz.
Definition: clk.c:102
uint32_t SystemCoreClock
void CLK_SysTickDelay(uint32_t us)
This function execute delay function.
Definition: clk.c:298
void CLK_DisableXtalRC(uint32_t u32ClkMask)
This function disable clock source.
Definition: clk.c:241
#define __XTAL12M
#define __XTAL32K
#define MODULE_APBCLK(x)
Definition: clk.h:112
#define MODULE_CLKSEL_Pos(x)
Definition: clk.h:115
void CLK_EnableXtalRC(uint32_t u32ClkMask)
This function enable clock source.
Definition: clk.c:228
#define CLK
Pointer to CLK register structure.
Definition: NUC029FAE.h:3228
void CLK_Idle(void)
This function let system enter to Idle mode.
Definition: clk.c:80
#define MODULE_CLKSEL_Msk(x)
Definition: clk.h:114
#define CLK_PWRCON_XTL12M
Definition: clk.h:38
void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En)
This function enable frequency divider module clock, enable frequency divider clock function and conf...
Definition: clk.c:53
#define MODULE_CLKDIV_Msk(x)
Definition: clk.h:117
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set selected module clock source and module clock divider.
Definition: clk.c:185
#define MODULE_CLKDIV_Pos(x)
Definition: clk.h:118
#define CLK_PWRCON_LXT
Definition: clk.h:41
#define MODULE_CLKSEL(x)
Definition: clk.h:113
void CLK_SetSysTickClockSrc(uint32_t u32ClkSrc)
This function set SysTick clock source.
Definition: clk.c:215
void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set HCLK clock source and HCLK clock divider.
Definition: clk.c:141
uint32_t CLK_WaitClockReady(uint32_t u32ClkMask)
This function check selected clock source status.
Definition: clk.c:322
void CLK_DisableModuleClock(uint32_t u32ModuleIdx)
This function disable module clock.
Definition: clk.c:285
uint32_t CyclesPerUs