| NUC029FAE BSP V3.01.002 The Board Support Package for NUC029FAE

adc.h
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1 /**************************************************************************/
12 #ifndef __ADC_H__
13 #define __ADC_H__
14
15 #ifdef __cplusplus
16 extern "C"
17 {
18 #endif
19
20
33 #define ADC_CH7_EXT (0UL)
34 #define ADC_CH7_BGP (ADC_ADCHER_PRESEL_Msk)
35 #define ADC_CMP_LESS_THAN (0UL)
36 #define ADC_CMP_GREATER_OR_EQUAL_TO (ADC_ADCMPR_CMPCOND_Msk)
37 #define ADC_TRIGGER_BY_EXT_PIN (0UL)
38 #define ADC_TRIGGER_BY_PWM (ADC_ADCR_TRGS_Msk)
39 #define ADC_FALLING_EDGE_TRIGGER (0UL)
40 #define ADC_RISING_EDGE_TRIGGER (ADC_ADCR_TRGCOND_Msk)
41 #define ADC_ADF_INT (ADC_ADSR_ADF_Msk)
42 #define ADC_CMP0_INT (ADC_ADSR_CMPF0_Msk)
43 #define ADC_CMP1_INT (ADC_ADSR_CMPF1_Msk)
44 #define ADC_SAMPLE_CLOCK_0 (0UL)
45 #define ADC_SAMPLE_CLOCK_1 (1UL)
46 #define ADC_SAMPLE_CLOCK_2 (2UL)
47 #define ADC_SAMPLE_CLOCK_4 (3UL)
48 #define ADC_SAMPLE_CLOCK_8 (4UL)
49 #define ADC_SAMPLE_CLOCK_16 (5UL)
50 #define ADC_SAMPLE_CLOCK_32 (6UL)
51 #define ADC_SAMPLE_CLOCK_64 (7UL)
52 #define ADC_SAMPLE_CLOCK_128 (8UL)
53 #define ADC_SAMPLE_CLOCK_256 (9UL)
54 #define ADC_SAMPLE_CLOCK_512 (10UL)
55 #define ADC_SAMPLE_CLOCK_1024 (11UL)
57 /* end of group NUC029FAE_ADC_EXPORTED_CONSTANTS */
58
59
75 #define ADC_CONFIG_CH7(adc, u32Source) (ADC->ADCHER = (ADC->ADCHER & ~ADC_ADCHER_PRESEL_Msk) | (u32Source))
76
84 #define ADC_GET_CONVERSION_DATA(adc, u32ChNum) (ADC->ADDR & ADC_ADDR_RSLT_Msk)
85
96 #define ADC_GET_INT_FLAG(adc, u32Mask) (ADC->ADSR & (u32Mask))
97
108 #define ADC_CLR_INT_FLAG(adc, u32Mask) (ADC->ADSR = (ADC->ADSR & ~(ADC_ADSR_ADF_Msk | \
109 ADC_ADSR_CMPF0_Msk | \
110 ADC_ADSR_CMPF1_Msk)) | (u32Mask))
111
120 #define ADC_IS_BUSY(adc) (ADC->ADSR & ADC_ADSR_BUSY_Msk ? 1 : 0)
121
131 #define ADC_IS_DATA_OVERRUN(adc, u32ChNum) (ADC->ADSR & ADC_ADSR_OVERRUN_Msk ? 1 : 0)
132
142 #define ADC_IS_DATA_VALID(adc, u32ChNum) (ADC->ADSR & ADC_ADSR_VALID_Msk ? 1 : 0)
143
150 #define ADC_POWER_DOWN(adc) (ADC->ADCR &= ~ADC_ADCR_ADEN_Msk)
151
158 #define ADC_POWER_ON(adc) (ADC->ADCR |= ADC_ADCR_ADEN_Msk)
159
175 #define ADC_ENABLE_CMP0(adc, \
176 u32ChNum, \
177 u32Condition, \
178 u32Data, \
179 u32MatchCount) (ADC->ADCMPR[0] = ((u32ChNum) << ADC_ADCMPR_CMPCH_Pos) | \
180 (u32Condition) | \
181 ((u32Data) << ADC_ADCMPR_CMPD_Pos) | \
182 (((u32MatchCount) - 1) << ADC_ADCMPR_CMPMATCNT_Pos) |\
183 ADC_ADCMPR_CMPEN_Msk)
184
190 #define ADC_DISABLE_CMP0(adc) (ADC->ADCMPR[0] = 0)
191
207 #define ADC_ENABLE_CMP1(adc, \
208 u32ChNum, \
209 u32Condition, \
210 u32Data, \
211 u32MatchCount) (ADC->ADCMPR[1] = ((u32ChNum) << ADC_ADCMPR_CMPCH_Pos) | \
212 (u32Condition) | \
213 ((u32Data) << ADC_ADCMPR_CMPD_Pos) | \
214 ((u32MatchCount - 1) << ADC_ADCMPR_CMPMATCNT_Pos) |\
215 ADC_ADCMPR_CMPEN_Msk)
216
222 #define ADC_DISABLE_CMP1(adc) (ADC->ADCMPR[1] = 0)
223
233 #define ADC_SET_INPUT_CHANNEL(adc, u32Mask) (ADC->ADCHER = (ADC->ADCHER & ~ADC_ADCHER_CHEN_Msk) | (u32Mask))
234
241 #define ADC_START_CONV(adc) (ADC->ADCR |= ADC_ADCR_ADST_Msk)
242
249 #define ADC_STOP_CONV(adc) (ADC->ADCR &= ~ADC_ADCR_ADST_Msk)
250
251 void ADC_Open(ADC_T *adc,
252 uint32_t u32InputMode,
253 uint32_t u32OpMode,
254 uint32_t u32ChMask);
255 void ADC_Close(ADC_T *adc);
256 void ADC_EnableHWTrigger(ADC_T *adc,
257 uint32_t u32Source,
258 uint32_t u32Param);
259 void ADC_DisableHWTrigger(ADC_T *adc);
260 void ADC_SetExtraSampleTime(ADC_T *adc,
261 uint32_t u32ChNum,
262 uint32_t u32SampleTime);
263 void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask);
264 void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask);
265
266
267 /* end of group NUC029FAE_ADC_EXPORTED_FUNCTIONS */
269 /* end of group NUC029FAE_ADC_Driver */
271 /* end of group NUC029FAE_Device_Driver */
273
274 #ifdef __cplusplus
275 }
276 #endif
277
278 #endif //__ADC_H__
279
280 /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/
ADC_EnableHWTrigger
void ADC_EnableHWTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32Param)
Configure the hardware trigger condition and enable hardware trigger.
Definition: adc.c:76
ADC_DisableHWTrigger
void ADC_DisableHWTrigger(ADC_T *adc)
Disable hardware trigger ADC function.
Definition: adc.c:98
ADC_DisableInt
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
Disable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:164
ADC_Open
void ADC_Open(ADC_T *adc, uint32_t u32InputMode, uint32_t u32OpMode, uint32_t u32ChMask)
This API configures ADC module to be ready for convert the input from selected channel.
Definition: adc.c:38
ADC_Close
void ADC_Close(ADC_T *adc)
Disable ADC module.
Definition: adc.c:54
ADC_SetExtraSampleTime
void ADC_SetExtraSampleTime(ADC_T *adc, uint32_t u32ChNum, uint32_t u32SampleTime)
Set ADC sample time for designated channel.
Definition: adc.c:123
ADC_T
Definition: NUC029FAE.h:642
ADC_EnableInt
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
Enable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:141