| Nano100AN Series BSP V3.02.002 The Board Support Package for Nano100AN Series

i2s.c
Go to the documentation of this file.
1 /**************************************************************************/
13 #include <stdio.h>
14 #include "Nano100Series.h"
15
33 static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
34 {
35 uint32_t u32Freq, u32ClkSrcSel;
36
37 // get I2S selection clock source
38 u32ClkSrcSel = CLK->CLKSEL2 & CLK_CLKSEL2_I2S_S_Msk;
39
40 switch (u32ClkSrcSel)
41 {
42 case CLK_CLKSEL2_I2S_S_HXT:
43 u32Freq = __HXT;
44 break;
45
46 case CLK_CLKSEL2_I2S_S_PLL:
47 u32Freq = CLK_GetPLLClockFreq();
48 break;
49
50 case CLK_CLKSEL2_I2S_S_HIRC:
51 u32Freq = __HIRC;
52 break;
53
54 default:
55 u32Freq = __HIRC;
56 break;
57 }
58
59 return u32Freq;
60 }
61
86 uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
87 {
88 uint8_t u8Divider;
89 uint32_t u32BitRate, u32SrcClk;
90
91 SYS->IPRST_CTL2 |= SYS_IPRST_CTL2_I2S_RST_Msk;
92 SYS->IPRST_CTL2 &= ~SYS_IPRST_CTL2_I2S_RST_Msk;
93
94 i2s->CTRL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat | u32AudioInterface | I2S_FIFO_TX_LEVEL_WORD_4 | I2S_FIFO_RX_LEVEL_WORD_4;
95
96 u32SrcClk = I2S_GetSourceClockFreq(i2s);
97
98 u32BitRate = u32SampleRate * (((u32WordWidth>>4) & 0x3) + 1) * 16;
99 u8Divider = ((u32SrcClk/u32BitRate) >> 1) - 1;
100 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLK_DIV_Msk) | (u8Divider << 8);
101
102 //calculate real sample rate
103 u32BitRate = u32SrcClk / (2*(u8Divider+1));
104 u32SampleRate = u32BitRate / ((((u32WordWidth>>4) & 0x3) + 1) * 16);
105
106 i2s->CTRL |= I2S_CTRL_I2SEN_Msk;
107
108 return u32SampleRate;
109 }
110
116 void I2S_Close(I2S_T *i2s)
117 {
118 i2s->CTRL &= ~I2S_CTRL_I2SEN_Msk;
119 }
120
128 void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
129 {
130 i2s->INTEN |= u32Mask;
131 }
132
140 void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
141 {
142 i2s->INTEN &= ~u32Mask;
143 }
144
151 uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
152 {
153 uint8_t u8Divider;
154 uint32_t u32SrcClk, u32Reg;
155
156 u32SrcClk = I2S_GetSourceClockFreq(i2s);
157 if (u32BusClock == u32SrcClk)
158 u8Divider = 0;
159 else
160 u8Divider = (u32SrcClk/u32BusClock) >> 1;
161
162 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLK_DIV_Msk) | u8Divider;
163
164 i2s->CTRL |= I2S_CTRL_MCLKEN_Msk;
165
166 u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLK_DIV_Msk;
167
168 if (u32Reg == 0)
169 return u32SrcClk;
170 else
171 return ((u32SrcClk >> 1) / u32Reg);
172 }
173
179 void I2S_DisableMCLK(I2S_T *i2s)
180 {
181 i2s->CTRL &= ~I2S_CTRL_MCLKEN_Msk;
182 } /* end of group NANO100_I2S_EXPORTED_FUNCTIONS */
184 /* end of group NANO100_I2S_Driver */
186 /* end of group NANO100_Device_Driver */
188
189 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
I2S_T::CTRL
__IO uint32_t CTRL
Definition: Nano100Series.h:4928
CLK
#define CLK
Pointer to CLK register structure.
Definition: Nano100Series.h:10121
I2S_CTRL_MCLKEN_Msk
#define I2S_CTRL_MCLKEN_Msk
Definition: Nano100Series.h:5160
I2S_Open
uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
This function configures some parameters of I2S interface for general purpose use....
Definition: i2s.c:86
I2S_GetSourceClockFreq
static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
This function is used to get I2S source clock frequency.
Definition: i2s.c:33
CLK_CLKSEL2_I2S_S_HIRC
#define CLK_CLKSEL2_I2S_S_HIRC
Definition: clk.h:132
Nano100Series.h
Nano100 series peripheral access layer header file. This file contains all the peripheral register's ...
CLK_CLKSEL2_I2S_S_PLL
#define CLK_CLKSEL2_I2S_S_PLL
Definition: clk.h:131
CLK_GetPLLClockFreq
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
Definition: clk.c:144
I2S_FIFO_TX_LEVEL_WORD_4
#define I2S_FIFO_TX_LEVEL_WORD_4
Definition: i2s.h:56
I2S_T::INTEN
__IO uint32_t INTEN
Definition: Nano100Series.h:4989
I2S_CTRL_I2SEN_Msk
#define I2S_CTRL_I2SEN_Msk
Definition: Nano100Series.h:5130
CLK_CLKSEL2_I2S_S_Msk
#define CLK_CLKSEL2_I2S_S_Msk
Definition: Nano100Series.h:1210
__HIRC
#define __HIRC
Definition: system_Nano100Series.h:30
I2S_EnableInt
void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
This function enables the interrupt according to the mask parameter.
Definition: i2s.c:128
CLK_CLKSEL2_I2S_S_HXT
#define CLK_CLKSEL2_I2S_S_HXT
Definition: clk.h:130
I2S_CLKDIV_MCLK_DIV_Msk
#define I2S_CLKDIV_MCLK_DIV_Msk
Definition: Nano100Series.h:5181
I2S_T
Definition: Nano100Series.h:4838
I2S_Close
void I2S_Close(I2S_T *i2s)
Disable I2S function and I2S clock.
Definition: i2s.c:116
__HXT
#define __HXT
Definition: system_Nano100Series.h:26
I2S_FIFO_RX_LEVEL_WORD_4
#define I2S_FIFO_RX_LEVEL_WORD_4
Definition: i2s.h:64
I2S_DisableInt
void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
This function disables the interrupt according to the mask parameter.
Definition: i2s.c:140
I2S_DisableMCLK
void I2S_DisableMCLK(I2S_T *i2s)
Disable MCLK .
Definition: i2s.c:179
I2S_T::CLKDIV
__IO uint32_t CLKDIV
Definition: Nano100Series.h:4947
SYS_IPRST_CTL2_I2S_RST_Msk
#define SYS_IPRST_CTL2_I2S_RST_Msk
Definition: Nano100Series.h:3391
I2S_CLKDIV_BCLK_DIV_Msk
#define I2S_CLKDIV_BCLK_DIV_Msk
Definition: Nano100Series.h:5184
I2S_EnableMCLK
uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
Enable MCLK .
Definition: i2s.c:151
SYS
#define SYS
Pointer to SYS register structure.
Definition: Nano100Series.h:10120