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Nano100AN Series BSP
V3.02.002
The Board Support Package for Nano100AN Series
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Macros | |
| #define | ADC_CH_0_MASK |
| #define | ADC_CH_1_MASK |
| #define | ADC_CH_2_MASK |
| #define | ADC_CH_3_MASK |
| #define | ADC_CH_4_MASK |
| #define | ADC_CH_5_MASK |
| #define | ADC_CH_6_MASK |
| #define | ADC_CH_7_MASK |
| #define | ADC_CH_10_MASK |
| #define | ADC_CH10_VTEMP (0UL) |
| #define | ADC_CH10_AVDD (2 << ADC_CHEN_CH10SEL_Pos) |
| #define | ADC_CH10_AVSS (3 << ADC_CHEN_CH10SEL_Pos) |
| #define | ADC_CHEN_Msk |
| #define | ADC_PDMADATA_AD_PDMA_Msk |
| #define | ADC_CMP_LESS_THAN |
| #define | ADC_CMP_GREATER_OR_EQUAL_TO |
| #define | ADC_TRIGGER_BY_EXT_PIN |
| #define | ADC_LOW_LEVEL_TRIGGER |
| #define | ADC_HIGH_LEVEL_TRIGGER |
| #define | ADC_FALLING_EDGE_TRIGGER |
| #define | ADC_RISING_EDGE_TRIGGER |
| #define | ADC_ADF_INT |
| #define | ADC_CMP0_INT |
| #define | ADC_CMP1_INT |
| #define | ADC_OPERATION_MODE_SINGLE |
| #define | ADC_OPERATION_MODE_SINGLE_CYCLE |
| #define | ADC_OPERATION_MODE_CONTINUOUS |
| #define | ADC_REFSEL_POWER |
| #define | ADC_REFSEL_INT_VREF |
| #define | ADC_REFSEL_VREF |
| #define | ADC_REFSEL_CH7 |
| #define ADC_CH10_AVDD (2 << ADC_CHEN_CH10SEL_Pos) |
| #define ADC_CH10_AVSS (3 << ADC_CHEN_CH10SEL_Pos) |
| #define ADC_CH10_VTEMP (0UL) |
| #define ADC_CMP_GREATER_OR_EQUAL_TO |
| #define ADC_FALLING_EDGE_TRIGGER |
| #define ADC_HIGH_LEVEL_TRIGGER |
| #define ADC_LOW_LEVEL_TRIGGER |
| #define ADC_OPERATION_MODE_CONTINUOUS |
| #define ADC_OPERATION_MODE_SINGLE |
| #define ADC_OPERATION_MODE_SINGLE_CYCLE |
| #define ADC_PDMADATA_AD_PDMA_Msk |
| #define ADC_REFSEL_CH7 |
| #define ADC_REFSEL_INT_VREF |
| #define ADC_REFSEL_POWER |
| #define ADC_REFSEL_VREF |
| #define ADC_RISING_EDGE_TRIGGER |
1.8.15