![]() |
Nano100AN Series BSP
V3.02.002
The Board Support Package for Nano100AN Series
|
Data Structures | |
| struct | ADC_T |
| #define | ADC_RESULT_RSLT_Pos (0) |
| #define | ADC_RESULT_RSLT_Msk (0xffful << ADC_RESULT_RSLT_Pos) |
| #define | ADC_CR_ADEN_Pos (0) |
| #define | ADC_CR_ADEN_Msk (0x1ul << ADC_CR_ADEN_Pos) |
| #define | ADC_CR_ADIE_Pos (1) |
| #define | ADC_CR_ADIE_Msk (0x1ul << ADC_CR_ADIE_Pos) |
| #define | ADC_CR_ADMD_Pos (2) |
| #define | ADC_CR_ADMD_Msk (0x3ul << ADC_CR_ADMD_Pos) |
| #define | ADC_CR_TRGS_Pos (4) |
| #define | ADC_CR_TRGS_Msk (0x3ul << ADC_CR_TRGS_Pos) |
| #define | ADC_CR_TRGCOND_Pos (6) |
| #define | ADC_CR_TRGCOND_Msk (0x3ul << ADC_CR_TRGCOND_Pos) |
| #define | ADC_CR_TRGE_Pos (8) |
| #define | ADC_CR_TRGE_Msk (0x1ul << ADC_CR_TRGE_Pos) |
| #define | ADC_CR_PTEN_Pos (9) |
| #define | ADC_CR_PTEN_Msk (0x1ul << ADC_CR_PTEN_Pos) |
| #define | ADC_CR_ADST_Pos (11) |
| #define | ADC_CR_ADST_Msk (0x1ul << ADC_CR_ADST_Pos) |
| #define | ADC_CR_TMSEL_Pos (12) |
| #define | ADC_CR_TMSEL_Msk (0x3ul << ADC_CR_TMSEL_Pos) |
| #define | ADC_CR_TMTRGMOD_Pos (15) |
| #define | ADC_CR_TMTRGMOD_Msk (0x1ul << ADC_CR_TMTRGMOD_Pos) |
| #define | ADC_CR_REFSEL_Pos (16) |
| #define | ADC_CR_REFSEL_Msk (0x3ul << ADC_CR_REFSEL_Pos) |
| #define | ADC_CHEN_CHEN0_Pos (0) |
| #define | ADC_CHEN_CHEN0_Msk (0x1ul << ADC_CHEN_CHEN0_Pos) |
| #define | ADC_CHEN_CHEN1_Pos (1) |
| #define | ADC_CHEN_CHEN1_Msk (0x1ul << ADC_CHEN_CHEN1_Pos) |
| #define | ADC_CHEN_CHEN2_Pos (2) |
| #define | ADC_CHEN_CHEN2_Msk (0x1ul << ADC_CHEN_CHEN2_Pos) |
| #define | ADC_CHEN_CHEN3_Pos (3) |
| #define | ADC_CHEN_CHEN3_Msk (0x1ul << ADC_CHEN_CHEN3_Pos) |
| #define | ADC_CHEN_CHEN4_Pos (4) |
| #define | ADC_CHEN_CHEN4_Msk (0x1ul << ADC_CHEN_CHEN4_Pos) |
| #define | ADC_CHEN_CHEN5_Pos (5) |
| #define | ADC_CHEN_CHEN5_Msk (0x1ul << ADC_CHEN_CHEN5_Pos) |
| #define | ADC_CHEN_CHEN6_Pos (6) |
| #define | ADC_CHEN_CHEN6_Msk (0x1ul << ADC_CHEN_CHEN6_Pos) |
| #define | ADC_CHEN_CHEN7_Pos (7) |
| #define | ADC_CHEN_CHEN7_Msk (0x1ul << ADC_CHEN_CHEN7_Pos) |
| #define | ADC_CHEN_CHEN10_Pos (10) |
| #define | ADC_CHEN_CHEN10_Msk (0x1ul << ADC_CHEN_CHEN10_Pos) |
| #define | ADC_CHEN_CH10SEL_Pos (11) |
| #define | ADC_CHEN_CH10SEL_Msk (0x3ul << ADC_CHEN_CH10SEL_Pos) |
| #define | ADC_CMPR0_CMPEN_Pos (0) |
| #define | ADC_CMPR0_CMPEN_Msk (0x1ul << ADC_CMPR0_CMPEN_Pos) |
| #define | ADC_CMPR0_CMPIE_Pos (1) |
| #define | ADC_CMPR0_CMPIE_Msk (0x1ul << ADC_CMPR0_CMPIE_Pos) |
| #define | ADC_CMPR0_CMPCOND_Pos (2) |
| #define | ADC_CMPR0_CMPCOND_Msk (0x1ul << ADC_CMPR0_CMPCOND_Pos) |
| #define | ADC_CMPR0_CMPCH_Pos (3) |
| #define | ADC_CMPR0_CMPCH_Msk (0xful << ADC_CMPR0_CMPCH_Pos) |
| #define | ADC_CMPR0_CMPMATCNT_Pos (8) |
| #define | ADC_CMPR0_CMPMATCNT_Msk (0xful << ADC_CMPR0_CMPMATCNT_Pos) |
| #define | ADC_CMPR0_CMPD_Pos (16) |
| #define | ADC_CMPR0_CMPD_Msk (0xffful << ADC_CMPR0_CMPD_Pos) |
| #define | ADC_CMPR1_CMPEN_Pos (0) |
| #define | ADC_CMPR1_CMPEN_Msk (0x1ul << ADC_CMPR1_CMPEN_Pos) |
| #define | ADC_CMPR1_CMPIE_Pos (1) |
| #define | ADC_CMPR1_CMPIE_Msk (0x1ul << ADC_CMPR1_CMPIE_Pos) |
| #define | ADC_CMPR1_CMPCOND_Pos (2) |
| #define | ADC_CMPR1_CMPCOND_Msk (0x1ul << ADC_CMPR1_CMPCOND_Pos) |
| #define | ADC_CMPR1_CMPCH_Pos (3) |
| #define | ADC_CMPR1_CMPCH_Msk (0xful << ADC_CMPR1_CMPCH_Pos) |
| #define | ADC_CMPR1_CMPMATCNT_Pos (8) |
| #define | ADC_CMPR1_CMPMATCNT_Msk (0xful << ADC_CMPR1_CMPMATCNT_Pos) |
| #define | ADC_CMPR1_CMPD_Pos (16) |
| #define | ADC_CMPR1_CMPD_Msk (0xffful << ADC_CMPR1_CMPD_Pos) |
| #define | ADC_SR_ADF_Pos (0) |
| #define | ADC_SR_ADF_Msk (0x1ul << ADC_SR_ADF_Pos) |
| #define | ADC_SR_CMPF0_Pos (1) |
| #define | ADC_SR_CMPF0_Msk (0x1ul << ADC_SR_CMPF0_Pos) |
| #define | ADC_SR_CMPF1_Pos (2) |
| #define | ADC_SR_CMPF1_Msk (0x1ul << ADC_SR_CMPF1_Pos) |
| #define | ADC_SR_BUSY_Pos (3) |
| #define | ADC_SR_BUSY_Msk (0x1ul << ADC_SR_BUSY_Pos) |
| #define | ADC_SR_CHANNEL_Pos (4) |
| #define | ADC_SR_CHANNEL_Msk (0xful << ADC_SR_CHANNEL_Pos) |
| #define | ADC_SR_VALID_Pos (8) |
| #define | ADC_SR_VALID_Msk (0x4fful << ADC_SR_VALID_Pos) |
| #define | ADC_SR_OVERRUN_Pos (20) |
| #define | ADC_SR_OVERRUN_Msk (0x4fful << ADC_SR_OVERRUN_Pos) |
| #define | ADC_PDMA_AD_PDMA_Pos (0) |
| #define | ADC_PDMA_AD_PDMA_Msk (0xffful << ADC_PDMA_AD_PDMA_Pos) |
| #define | ADC_DELSEL_En2StDelay_Pos (0) |
| #define | ADC_DELSEL_En2StDelay_Msk (0xfful << ADC_DELSEL_En2StDelay_Pos) |
| #define | ADC_DELSEL_TMPDMACNT_Pos (8) |
| #define | ADC_DELSEL_TMPDMACNT_Msk (0xfful << ADC_DELSEL_TMPDMACNT_Pos) |
| #define | ADC_DELSEL_ADCSTHOLDCNT_Pos (16) |
| #define | ADC_DELSEL_ADCSTHOLDCNT_Msk (0xfful << ADC_DELSEL_ADCSTHOLDCNT_Pos) |
NANO100 Device Specific Peripheral registers structures
| #define ADC_CHEN_CH10SEL_Msk (0x3ul << ADC_CHEN_CH10SEL_Pos) |
ADC_T::CHEN: CH10SEL Mask
Definition at line 527 of file Nano100Series.h.
| #define ADC_CHEN_CH10SEL_Pos (11) |
ADC_T::CHEN: CH10SEL Position
Definition at line 526 of file Nano100Series.h.
| #define ADC_CHEN_CHEN0_Msk (0x1ul << ADC_CHEN_CHEN0_Pos) |
ADC_T::CHEN: CHEN0 Mask
Definition at line 500 of file Nano100Series.h.
| #define ADC_CHEN_CHEN0_Pos (0) |
ADC_T::CHEN: CHEN0 Position
Definition at line 499 of file Nano100Series.h.
| #define ADC_CHEN_CHEN10_Msk (0x1ul << ADC_CHEN_CHEN10_Pos) |
ADC_T::CHEN: CHEN10 Mask
Definition at line 524 of file Nano100Series.h.
| #define ADC_CHEN_CHEN10_Pos (10) |
ADC_T::CHEN: CHEN10 Position
Definition at line 523 of file Nano100Series.h.
| #define ADC_CHEN_CHEN1_Msk (0x1ul << ADC_CHEN_CHEN1_Pos) |
ADC_T::CHEN: CHEN1 Mask
Definition at line 503 of file Nano100Series.h.
| #define ADC_CHEN_CHEN1_Pos (1) |
ADC_T::CHEN: CHEN1 Position
Definition at line 502 of file Nano100Series.h.
| #define ADC_CHEN_CHEN2_Msk (0x1ul << ADC_CHEN_CHEN2_Pos) |
ADC_T::CHEN: CHEN2 Mask
Definition at line 506 of file Nano100Series.h.
| #define ADC_CHEN_CHEN2_Pos (2) |
ADC_T::CHEN: CHEN2 Position
Definition at line 505 of file Nano100Series.h.
| #define ADC_CHEN_CHEN3_Msk (0x1ul << ADC_CHEN_CHEN3_Pos) |
ADC_T::CHEN: CHEN3 Mask
Definition at line 509 of file Nano100Series.h.
| #define ADC_CHEN_CHEN3_Pos (3) |
ADC_T::CHEN: CHEN3 Position
Definition at line 508 of file Nano100Series.h.
| #define ADC_CHEN_CHEN4_Msk (0x1ul << ADC_CHEN_CHEN4_Pos) |
ADC_T::CHEN: CHEN4 Mask
Definition at line 512 of file Nano100Series.h.
| #define ADC_CHEN_CHEN4_Pos (4) |
ADC_T::CHEN: CHEN4 Position
Definition at line 511 of file Nano100Series.h.
| #define ADC_CHEN_CHEN5_Msk (0x1ul << ADC_CHEN_CHEN5_Pos) |
ADC_T::CHEN: CHEN5 Mask
Definition at line 515 of file Nano100Series.h.
| #define ADC_CHEN_CHEN5_Pos (5) |
ADC_T::CHEN: CHEN5 Position
Definition at line 514 of file Nano100Series.h.
| #define ADC_CHEN_CHEN6_Msk (0x1ul << ADC_CHEN_CHEN6_Pos) |
ADC_T::CHEN: CHEN6 Mask
Definition at line 518 of file Nano100Series.h.
| #define ADC_CHEN_CHEN6_Pos (6) |
ADC_T::CHEN: CHEN6 Position
Definition at line 517 of file Nano100Series.h.
| #define ADC_CHEN_CHEN7_Msk (0x1ul << ADC_CHEN_CHEN7_Pos) |
ADC_T::CHEN: CHEN7 Mask
Definition at line 521 of file Nano100Series.h.
| #define ADC_CHEN_CHEN7_Pos (7) |
ADC_T::CHEN: CHEN7 Position
Definition at line 520 of file Nano100Series.h.
| #define ADC_CMPR0_CMPCH_Msk (0xful << ADC_CMPR0_CMPCH_Pos) |
ADC_T::CMPR0: CMPCH Mask
Definition at line 539 of file Nano100Series.h.
| #define ADC_CMPR0_CMPCH_Pos (3) |
ADC_T::CMPR0: CMPCH Position
Definition at line 538 of file Nano100Series.h.
| #define ADC_CMPR0_CMPCOND_Msk (0x1ul << ADC_CMPR0_CMPCOND_Pos) |
ADC_T::CMPR0: CMPCOND Mask
Definition at line 536 of file Nano100Series.h.
| #define ADC_CMPR0_CMPCOND_Pos (2) |
ADC_T::CMPR0: CMPCOND Position
Definition at line 535 of file Nano100Series.h.
| #define ADC_CMPR0_CMPD_Msk (0xffful << ADC_CMPR0_CMPD_Pos) |
ADC_T::CMPR0: CMPD Mask
Definition at line 545 of file Nano100Series.h.
| #define ADC_CMPR0_CMPD_Pos (16) |
ADC_T::CMPR0: CMPD Position
Definition at line 544 of file Nano100Series.h.
| #define ADC_CMPR0_CMPEN_Msk (0x1ul << ADC_CMPR0_CMPEN_Pos) |
ADC_T::CMPR0: CMPEN Mask
Definition at line 530 of file Nano100Series.h.
| #define ADC_CMPR0_CMPEN_Pos (0) |
ADC_T::CMPR0: CMPEN Position
Definition at line 529 of file Nano100Series.h.
| #define ADC_CMPR0_CMPIE_Msk (0x1ul << ADC_CMPR0_CMPIE_Pos) |
ADC_T::CMPR0: CMPIE Mask
Definition at line 533 of file Nano100Series.h.
| #define ADC_CMPR0_CMPIE_Pos (1) |
ADC_T::CMPR0: CMPIE Position
Definition at line 532 of file Nano100Series.h.
| #define ADC_CMPR0_CMPMATCNT_Msk (0xful << ADC_CMPR0_CMPMATCNT_Pos) |
ADC_T::CMPR0: CMPMATCNT Mask
Definition at line 542 of file Nano100Series.h.
| #define ADC_CMPR0_CMPMATCNT_Pos (8) |
ADC_T::CMPR0: CMPMATCNT Position
Definition at line 541 of file Nano100Series.h.
| #define ADC_CMPR1_CMPCH_Msk (0xful << ADC_CMPR1_CMPCH_Pos) |
ADC_T::CMPR1: CMPCH Mask
Definition at line 557 of file Nano100Series.h.
| #define ADC_CMPR1_CMPCH_Pos (3) |
ADC_T::CMPR1: CMPCH Position
Definition at line 556 of file Nano100Series.h.
| #define ADC_CMPR1_CMPCOND_Msk (0x1ul << ADC_CMPR1_CMPCOND_Pos) |
ADC_T::CMPR1: CMPCOND Mask
Definition at line 554 of file Nano100Series.h.
| #define ADC_CMPR1_CMPCOND_Pos (2) |
ADC_T::CMPR1: CMPCOND Position
Definition at line 553 of file Nano100Series.h.
| #define ADC_CMPR1_CMPD_Msk (0xffful << ADC_CMPR1_CMPD_Pos) |
ADC_T::CMPR1: CMPD Mask
Definition at line 563 of file Nano100Series.h.
| #define ADC_CMPR1_CMPD_Pos (16) |
ADC_T::CMPR1: CMPD Position
Definition at line 562 of file Nano100Series.h.
| #define ADC_CMPR1_CMPEN_Msk (0x1ul << ADC_CMPR1_CMPEN_Pos) |
ADC_T::CMPR1: CMPEN Mask
Definition at line 548 of file Nano100Series.h.
| #define ADC_CMPR1_CMPEN_Pos (0) |
ADC_T::CMPR1: CMPEN Position
Definition at line 547 of file Nano100Series.h.
| #define ADC_CMPR1_CMPIE_Msk (0x1ul << ADC_CMPR1_CMPIE_Pos) |
ADC_T::CMPR1: CMPIE Mask
Definition at line 551 of file Nano100Series.h.
| #define ADC_CMPR1_CMPIE_Pos (1) |
ADC_T::CMPR1: CMPIE Position
Definition at line 550 of file Nano100Series.h.
| #define ADC_CMPR1_CMPMATCNT_Msk (0xful << ADC_CMPR1_CMPMATCNT_Pos) |
ADC_T::CMPR1: CMPMATCNT Mask
Definition at line 560 of file Nano100Series.h.
| #define ADC_CMPR1_CMPMATCNT_Pos (8) |
ADC_T::CMPR1: CMPMATCNT Position
Definition at line 559 of file Nano100Series.h.
| #define ADC_CR_ADEN_Msk (0x1ul << ADC_CR_ADEN_Pos) |
ADC_T::CR: ADEN Mask
Definition at line 467 of file Nano100Series.h.
| #define ADC_CR_ADEN_Pos (0) |
ADC_T::CR: ADEN Position
Definition at line 466 of file Nano100Series.h.
| #define ADC_CR_ADIE_Msk (0x1ul << ADC_CR_ADIE_Pos) |
ADC_T::CR: ADIE Mask
Definition at line 470 of file Nano100Series.h.
| #define ADC_CR_ADIE_Pos (1) |
ADC_T::CR: ADIE Position
Definition at line 469 of file Nano100Series.h.
| #define ADC_CR_ADMD_Msk (0x3ul << ADC_CR_ADMD_Pos) |
ADC_T::CR: ADMD Mask
Definition at line 473 of file Nano100Series.h.
| #define ADC_CR_ADMD_Pos (2) |
ADC_T::CR: ADMD Position
Definition at line 472 of file Nano100Series.h.
| #define ADC_CR_ADST_Msk (0x1ul << ADC_CR_ADST_Pos) |
ADC_T::CR: ADST Mask
Definition at line 488 of file Nano100Series.h.
| #define ADC_CR_ADST_Pos (11) |
ADC_T::CR: ADST Position
Definition at line 487 of file Nano100Series.h.
| #define ADC_CR_PTEN_Msk (0x1ul << ADC_CR_PTEN_Pos) |
ADC_T::CR: PTEN Mask
Definition at line 485 of file Nano100Series.h.
| #define ADC_CR_PTEN_Pos (9) |
ADC_T::CR: PTEN Position
Definition at line 484 of file Nano100Series.h.
| #define ADC_CR_REFSEL_Msk (0x3ul << ADC_CR_REFSEL_Pos) |
ADC_T::CR: REFSEL Mask
Definition at line 497 of file Nano100Series.h.
| #define ADC_CR_REFSEL_Pos (16) |
ADC_T::CR: REFSEL Position
Definition at line 496 of file Nano100Series.h.
| #define ADC_CR_TMSEL_Msk (0x3ul << ADC_CR_TMSEL_Pos) |
ADC_T::CR: TMSEL Mask
Definition at line 491 of file Nano100Series.h.
| #define ADC_CR_TMSEL_Pos (12) |
ADC_T::CR: TMSEL Position
Definition at line 490 of file Nano100Series.h.
| #define ADC_CR_TMTRGMOD_Msk (0x1ul << ADC_CR_TMTRGMOD_Pos) |
ADC_T::CR: TMTRGMOD Mask
Definition at line 494 of file Nano100Series.h.
| #define ADC_CR_TMTRGMOD_Pos (15) |
ADC_T::CR: TMTRGMOD Position
Definition at line 493 of file Nano100Series.h.
| #define ADC_CR_TRGCOND_Msk (0x3ul << ADC_CR_TRGCOND_Pos) |
ADC_T::CR: TRGCOND Mask
Definition at line 479 of file Nano100Series.h.
| #define ADC_CR_TRGCOND_Pos (6) |
ADC_T::CR: TRGCOND Position
Definition at line 478 of file Nano100Series.h.
| #define ADC_CR_TRGE_Msk (0x1ul << ADC_CR_TRGE_Pos) |
ADC_T::CR: TRGE Mask
Definition at line 482 of file Nano100Series.h.
| #define ADC_CR_TRGE_Pos (8) |
ADC_T::CR: TRGE Position
Definition at line 481 of file Nano100Series.h.
| #define ADC_CR_TRGS_Msk (0x3ul << ADC_CR_TRGS_Pos) |
ADC_T::CR: TRGS Mask
Definition at line 476 of file Nano100Series.h.
| #define ADC_CR_TRGS_Pos (4) |
ADC_T::CR: TRGS Position
Definition at line 475 of file Nano100Series.h.
| #define ADC_DELSEL_ADCSTHOLDCNT_Msk (0xfful << ADC_DELSEL_ADCSTHOLDCNT_Pos) |
ADC_T::DELSEL: ADCSTHOLDCNT Mask
Definition at line 596 of file Nano100Series.h.
| #define ADC_DELSEL_ADCSTHOLDCNT_Pos (16) |
ADC_T::DELSEL: ADCSTHOLDCNT Position
Definition at line 595 of file Nano100Series.h.
| #define ADC_DELSEL_En2StDelay_Msk (0xfful << ADC_DELSEL_En2StDelay_Pos) |
ADC_T::DELSEL: En2StDelay Mask
Definition at line 590 of file Nano100Series.h.
| #define ADC_DELSEL_En2StDelay_Pos (0) |
ADC_T::DELSEL: En2StDelay Position
Definition at line 589 of file Nano100Series.h.
| #define ADC_DELSEL_TMPDMACNT_Msk (0xfful << ADC_DELSEL_TMPDMACNT_Pos) |
ADC_T::DELSEL: TMPDMACNT Mask
Definition at line 593 of file Nano100Series.h.
| #define ADC_DELSEL_TMPDMACNT_Pos (8) |
ADC_T::DELSEL: TMPDMACNT Position
Definition at line 592 of file Nano100Series.h.
| #define ADC_PDMA_AD_PDMA_Msk (0xffful << ADC_PDMA_AD_PDMA_Pos) |
ADC_T::PDMA: AD_PDMA Mask
Definition at line 587 of file Nano100Series.h.
| #define ADC_PDMA_AD_PDMA_Pos (0) |
ADC_T::PDMA: AD_PDMA Position
Definition at line 586 of file Nano100Series.h.
| #define ADC_RESULT_RSLT_Msk (0xffful << ADC_RESULT_RSLT_Pos) |
ADC_T::RESULT: RSLT Mask
Definition at line 464 of file Nano100Series.h.
| #define ADC_RESULT_RSLT_Pos (0) |
@addtogroup ADC_CONST ADC Bit Field Definition Constant Definitions for ADC Controller
ADC_T::RESULT: RSLT Position
Definition at line 463 of file Nano100Series.h.
| #define ADC_SR_ADF_Msk (0x1ul << ADC_SR_ADF_Pos) |
ADC_T::SR: ADF Mask
Definition at line 566 of file Nano100Series.h.
| #define ADC_SR_ADF_Pos (0) |
ADC_T::SR: ADF Position
Definition at line 565 of file Nano100Series.h.
| #define ADC_SR_BUSY_Msk (0x1ul << ADC_SR_BUSY_Pos) |
ADC_T::SR: BUSY Mask
Definition at line 575 of file Nano100Series.h.
| #define ADC_SR_BUSY_Pos (3) |
ADC_T::SR: BUSY Position
Definition at line 574 of file Nano100Series.h.
| #define ADC_SR_CHANNEL_Msk (0xful << ADC_SR_CHANNEL_Pos) |
ADC_T::SR: CHANNEL Mask
Definition at line 578 of file Nano100Series.h.
| #define ADC_SR_CHANNEL_Pos (4) |
ADC_T::SR: CHANNEL Position
Definition at line 577 of file Nano100Series.h.
| #define ADC_SR_CMPF0_Msk (0x1ul << ADC_SR_CMPF0_Pos) |
ADC_T::SR: CMPF0 Mask
Definition at line 569 of file Nano100Series.h.
| #define ADC_SR_CMPF0_Pos (1) |
ADC_T::SR: CMPF0 Position
Definition at line 568 of file Nano100Series.h.
| #define ADC_SR_CMPF1_Msk (0x1ul << ADC_SR_CMPF1_Pos) |
ADC_T::SR: CMPF1 Mask
Definition at line 572 of file Nano100Series.h.
| #define ADC_SR_CMPF1_Pos (2) |
ADC_T::SR: CMPF1 Position
Definition at line 571 of file Nano100Series.h.
| #define ADC_SR_OVERRUN_Msk (0x4fful << ADC_SR_OVERRUN_Pos) |
ADC_T::SR: OVERRUN Mask
Definition at line 584 of file Nano100Series.h.
| #define ADC_SR_OVERRUN_Pos (20) |
ADC_T::SR: OVERRUN Position
Definition at line 583 of file Nano100Series.h.
| #define ADC_SR_VALID_Msk (0x4fful << ADC_SR_VALID_Pos) |
ADC_T::SR: VALID Mask
Definition at line 581 of file Nano100Series.h.
| #define ADC_SR_VALID_Pos (8) |
ADC_T::SR: VALID Position
Definition at line 580 of file Nano100Series.h.
1.8.15