| Nano100AN Series BSP V3.02.002 The Board Support Package for Nano100AN Series

adc.c
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1 /**************************************************************************/
12 #include "Nano100Series.h"
13
39 void ADC_Open(ADC_T *adc,
40 uint32_t u32InputMode,
41 uint32_t u32OpMode,
42 uint32_t u32ChMask)
43 {
44 ADC->CR = (ADC->CR & ~ADC_CR_ADMD_Msk) | u32OpMode;
45 ADC->CR = (ADC->CR & ~ADC_CR_REFSEL_Msk);
46 ADC->CHEN = u32ChMask;
47 return;
48 }
49
55 void ADC_Close(ADC_T *adc)
56 {
57 SYS->IPRST_CTL2 |= SYS_IPRST_CTL2_ADC_RST_Msk;
58 SYS->IPRST_CTL2 &= ~SYS_IPRST_CTL2_ADC_RST_Msk;
59 return;
60
61 }
62
76 void ADC_EnableHWTrigger(ADC_T *adc,
77 uint32_t u32Source,
78 uint32_t u32Param)
79 {
80 ADC->CR &= ~(ADC_CR_TRGE_Msk | ADC_CR_TRGCOND_Msk | ADC_CR_TRGS_Msk);
81 ADC->CR |= u32Source | u32Param | ADC_CR_TRGE_Msk;
82 return;
83 }
84
90 void ADC_DisableHWTrigger(ADC_T *adc)
91 {
92 ADC->CR &= ~(ADC_CR_TRGS_Msk | ADC_CR_TRGCOND_Msk | ADC_CR_TRGE_Msk);
93 return;
94 }
95
103 void ADC_EnableTimerTrigger(ADC_T *adc,
104 uint32_t u32Source,
105 uint32_t u32PDMACnt)
106 {
107 ADC->CR &= ~ADC_CR_TMSEL_Msk;
108 ADC->DELSEL &= ~ADC_DELSEL_TMPDMACNT_Msk;
109 ADC->CR |= (u32Source << ADC_CR_TMSEL_Pos) | ADC_CR_TMTRGMOD_Msk;
110 ADC->DELSEL |= (u32PDMACnt << ADC_DELSEL_TMPDMACNT_Pos);
111
112 return;
113 }
114
120 void ADC_DisableTimerTrigger(ADC_T *adc)
121 {
122 ADC->CR &= ~ADC_CR_TMTRGMOD_Msk;
123
124 return;
125 }
126
134 void ADC_SetExtraSampleTime(ADC_T *adc,
135 uint32_t u32ChNum,
136 uint32_t u32SampleTime)
137 {
138 ADC->DELSEL &= ~ADC_DELSEL_ADCSTHOLDCNT_Msk;
139 ADC->DELSEL |= (u32SampleTime << ADC_DELSEL_ADCSTHOLDCNT_Pos);
140
141 return;
142 }
143
155 void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
156 {
157 if(u32Mask & ADC_ADF_INT)
158 ADC->CR |= ADC_CR_ADIE_Msk;
159 if(u32Mask & ADC_CMP0_INT)
160 ADC->CMPR0 |= ADC_CMPR0_CMPIE_Msk;
161 if(u32Mask & ADC_CMP1_INT)
162 ADC->CMPR1 |= ADC_CMPR1_CMPIE_Msk;
163
164 return;
165 }
166
178 void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
179 {
180 if(u32Mask & ADC_ADF_INT)
181 ADC->CR &= ~ADC_CR_ADIE_Msk;
182 if(u32Mask & ADC_CMP0_INT)
183 ADC->CMPR0 &= ~ADC_CMPR0_CMPIE_Msk;
184 if(u32Mask & ADC_CMP1_INT)
185 ADC->CMPR1 &= ~ADC_CMPR1_CMPIE_Msk;
186
187 return;
188 }
189
190
191 /* end of group NANO100_ADC_EXPORTED_FUNCTIONS */
193 /* end of group NANO100_ADC_Driver */
195 /* end of group NANO100_Device_Driver */
197
198 /*** (C) COPYRIGHT 2013-2014 Nuvoton Technology Corp. ***/
ADC_CMPR1_CMPIE_Msk
#define ADC_CMPR1_CMPIE_Msk
Definition: Nano100Series.h:551
ADC_ADF_INT
#define ADC_ADF_INT
Definition: adc.h:54
ADC_EnableTimerTrigger
void ADC_EnableTimerTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32PDMACnt)
Config and enable timer trigger.
Definition: adc.c:103
ADC_CR_TRGS_Msk
#define ADC_CR_TRGS_Msk
Definition: Nano100Series.h:476
ADC_Close
void ADC_Close(ADC_T *adc)
Disable ADC module.
Definition: adc.c:55
ADC_CR_ADIE_Msk
#define ADC_CR_ADIE_Msk
Definition: Nano100Series.h:470
ADC_DELSEL_TMPDMACNT_Pos
#define ADC_DELSEL_TMPDMACNT_Pos
Definition: Nano100Series.h:592
ADC_CR_TRGE_Msk
#define ADC_CR_TRGE_Msk
Definition: Nano100Series.h:482
ADC_Open
void ADC_Open(ADC_T *adc, uint32_t u32InputMode, uint32_t u32OpMode, uint32_t u32ChMask)
This API configures ADC module to be ready for convert the input from selected channel.
Definition: adc.c:39
ADC_DisableHWTrigger
void ADC_DisableHWTrigger(ADC_T *adc)
Disable hardware trigger ADC function.
Definition: adc.c:90
ADC_CR_TRGCOND_Msk
#define ADC_CR_TRGCOND_Msk
Definition: Nano100Series.h:479
Nano100Series.h
Nano100 series peripheral access layer header file. This file contains all the peripheral register's ...
ADC_DELSEL_ADCSTHOLDCNT_Msk
#define ADC_DELSEL_ADCSTHOLDCNT_Msk
Definition: Nano100Series.h:596
ADC_DisableTimerTrigger
void ADC_DisableTimerTrigger(ADC_T *adc)
Disable timer trigger ADC function.
Definition: adc.c:120
ADC_DELSEL_TMPDMACNT_Msk
#define ADC_DELSEL_TMPDMACNT_Msk
Definition: Nano100Series.h:593
ADC_CR_REFSEL_Msk
#define ADC_CR_REFSEL_Msk
Definition: Nano100Series.h:497
SYS_IPRST_CTL2_ADC_RST_Msk
#define SYS_IPRST_CTL2_ADC_RST_Msk
Definition: Nano100Series.h:3388
ADC_DELSEL_ADCSTHOLDCNT_Pos
#define ADC_DELSEL_ADCSTHOLDCNT_Pos
Definition: Nano100Series.h:595
ADC_T
Definition: Nano100Series.h:159
ADC_CMP1_INT
#define ADC_CMP1_INT
Definition: adc.h:56
ADC_EnableInt
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
Enable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:155
ADC_CR_TMSEL_Msk
#define ADC_CR_TMSEL_Msk
Definition: Nano100Series.h:491
ADC_CR_ADMD_Msk
#define ADC_CR_ADMD_Msk
Definition: Nano100Series.h:473
ADC
#define ADC
Pointer to ADC register structure.
Definition: Nano100Series.h:10114
ADC_CR_TMTRGMOD_Msk
#define ADC_CR_TMTRGMOD_Msk
Definition: Nano100Series.h:494
ADC_CMPR0_CMPIE_Msk
#define ADC_CMPR0_CMPIE_Msk
Definition: Nano100Series.h:533
ADC_CR_TMSEL_Pos
#define ADC_CR_TMSEL_Pos
Definition: Nano100Series.h:490
ADC_EnableHWTrigger
void ADC_EnableHWTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32Param)
Configure the hardware trigger condition and enable hardware trigger.
Definition: adc.c:76
ADC_SetExtraSampleTime
void ADC_SetExtraSampleTime(ADC_T *adc, uint32_t u32ChNum, uint32_t u32SampleTime)
Configure the extend sampling counter.
Definition: adc.c:134
ADC_CMP0_INT
#define ADC_CMP0_INT
Definition: adc.h:55
ADC_DisableInt
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
Disable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:178
SYS
#define SYS
Pointer to SYS register structure.
Definition: Nano100Series.h:10120