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Nano100AN Series BSP
V3.02.002
The Board Support Package for Nano100AN Series
|
Modules | |
| Device CMSIS Definitions | |
| NANO100 Peripherals | |
Data Structures | |
| struct | CLK_T |
| #define | CLK_PWRCTL_HXT_EN_Pos (0) |
| #define | CLK_PWRCTL_HXT_EN_Msk (0x1ul << CLK_PWRCTL_HXT_EN_Pos) |
| #define | CLK_PWRCTL_LXT_EN_Pos (1) |
| #define | CLK_PWRCTL_LXT_EN_Msk (0x1ul << CLK_PWRCTL_LXT_EN_Pos) |
| #define | CLK_PWRCTL_HIRC_EN_Pos (2) |
| #define | CLK_PWRCTL_HIRC_EN_Msk (0x1ul << CLK_PWRCTL_HIRC_EN_Pos) |
| #define | CLK_PWRCTL_LIRC_EN_Pos (3) |
| #define | CLK_PWRCTL_LIRC_EN_Msk (0x1ul << CLK_PWRCTL_LIRC_EN_Pos) |
| #define | CLK_PWRCTL_WK_DLY_Pos (4) |
| #define | CLK_PWRCTL_WK_DLY_Msk (0x1ul << CLK_PWRCTL_WK_DLY_Pos) |
| #define | CLK_PWRCTL_PD_WK_IE_Pos (5) |
| #define | CLK_PWRCTL_PD_WK_IE_Msk (0x1ul << CLK_PWRCTL_PD_WK_IE_Pos) |
| #define | CLK_PWRCTL_PD_EN_Pos (6) |
| #define | CLK_PWRCTL_PD_EN_Msk (0x1ul << CLK_PWRCTL_PD_EN_Pos) |
| #define | CLK_PWRCTL_HXT_SELXT_Pos (8) |
| #define | CLK_PWRCTL_HXT_SELXT_Msk (0x1ul << CLK_PWRCTL_HXT_SELXT_Pos) |
| #define | CLK_PWRCTL_HXT_GAIN_Pos (9) |
| #define | CLK_PWRCTL_HXT_GAIN_Msk (0x1ul << CLK_PWRCTL_HXT_GAIN_Pos) |
| #define | CLK_PWRCTL_LXT_SCNT_Pos (10) |
| #define | CLK_PWRCTL_LXT_SCNT_Msk (0x1ul << CLK_PWRCTL_LXT_SCNT_Pos) |
| #define | CLK_AHBCLK_GPIO_EN_Pos (0) |
| #define | CLK_AHBCLK_GPIO_EN_Msk (0x1ul << CLK_AHBCLK_GPIO_EN_Pos) |
| #define | CLK_AHBCLK_DMA_EN_Pos (1) |
| #define | CLK_AHBCLK_DMA_EN_Msk (0x1ul << CLK_AHBCLK_DMA_EN_Pos) |
| #define | CLK_AHBCLK_ISP_EN_Pos (2) |
| #define | CLK_AHBCLK_ISP_EN_Msk (0x1ul << CLK_AHBCLK_ISP_EN_Pos) |
| #define | CLK_AHBCLK_EBI_EN_Pos (3) |
| #define | CLK_AHBCLK_EBI_EN_Msk (0x1ul << CLK_AHBCLK_EBI_EN_Pos) |
| #define | CLK_AHBCLK_SRAM_EN_Pos (4) |
| #define | CLK_AHBCLK_SRAM_EN_Msk (0x1ul << CLK_AHBCLK_SRAM_EN_Pos) |
| #define | CLK_AHBCLK_TICK_EN_Pos (5) |
| #define | CLK_AHBCLK_TICK_EN_Msk (0x1ul << CLK_AHBCLK_TICK_EN_Pos) |
| #define | CLK_APBCLK_WDT_EN_Pos (0) |
| #define | CLK_APBCLK_WDT_EN_Msk (0x1ul << CLK_APBCLK_WDT_EN_Pos) |
| #define | CLK_APBCLK_RTC_EN_Pos (1) |
| #define | CLK_APBCLK_RTC_EN_Msk (0x1ul << CLK_APBCLK_RTC_EN_Pos) |
| #define | CLK_APBCLK_TMR0_EN_Pos (2) |
| #define | CLK_APBCLK_TMR0_EN_Msk (0x1ul << CLK_APBCLK_TMR0_EN_Pos) |
| #define | CLK_APBCLK_TMR1_EN_Pos (3) |
| #define | CLK_APBCLK_TMR1_EN_Msk (0x1ul << CLK_APBCLK_TMR1_EN_Pos) |
| #define | CLK_APBCLK_TMR2_EN_Pos (4) |
| #define | CLK_APBCLK_TMR2_EN_Msk (0x1ul << CLK_APBCLK_TMR2_EN_Pos) |
| #define | CLK_APBCLK_TMR3_EN_Pos (5) |
| #define | CLK_APBCLK_TMR3_EN_Msk (0x1ul << CLK_APBCLK_TMR3_EN_Pos) |
| #define | CLK_APBCLK_FDIV_EN_Pos (6) |
| #define | CLK_APBCLK_FDIV_EN_Msk (0x1ul << CLK_APBCLK_FDIV_EN_Pos) |
| #define | CLK_APBCLK_I2C0_EN_Pos (8) |
| #define | CLK_APBCLK_I2C0_EN_Msk (0x1ul << CLK_APBCLK_I2C0_EN_Pos) |
| #define | CLK_APBCLK_I2C1_EN_Pos (9) |
| #define | CLK_APBCLK_I2C1_EN_Msk (0x1ul << CLK_APBCLK_I2C1_EN_Pos) |
| #define | CLK_APBCLK_SPI0_EN_Pos (12) |
| #define | CLK_APBCLK_SPI0_EN_Msk (0x1ul << CLK_APBCLK_SPI0_EN_Pos) |
| #define | CLK_APBCLK_SPI1_EN_Pos (13) |
| #define | CLK_APBCLK_SPI1_EN_Msk (0x1ul << CLK_APBCLK_SPI1_EN_Pos) |
| #define | CLK_APBCLK_SPI2_EN_Pos (14) |
| #define | CLK_APBCLK_SPI2_EN_Msk (0x1ul << CLK_APBCLK_SPI2_EN_Pos) |
| #define | CLK_APBCLK_UART0_EN_Pos (16) |
| #define | CLK_APBCLK_UART0_EN_Msk (0x1ul << CLK_APBCLK_UART0_EN_Pos) |
| #define | CLK_APBCLK_UART1_EN_Pos (17) |
| #define | CLK_APBCLK_UART1_EN_Msk (0x1ul << CLK_APBCLK_UART1_EN_Pos) |
| #define | CLK_APBCLK_PWM0_CH01_EN_Pos (20) |
| #define | CLK_APBCLK_PWM0_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH01_EN_Pos) |
| #define | CLK_APBCLK_PWM0_CH23_EN_Pos (21) |
| #define | CLK_APBCLK_PWM0_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH23_EN_Pos) |
| #define | CLK_APBCLK_PWM1_CH01_EN_Pos (22) |
| #define | CLK_APBCLK_PWM1_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM1_CH01_EN_Pos) |
| #define | CLK_APBCLK_PWM1_CH23_EN_Pos (23) |
| #define | CLK_APBCLK_PWM1_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM1_CH23_EN_Pos) |
| #define | CLK_APBCLK_USBD_EN_Pos (27) |
| #define | CLK_APBCLK_USBD_EN_Msk (0x1ul << CLK_APBCLK_USBD_EN_Pos) |
| #define | CLK_APBCLK_ADC_EN_Pos (28) |
| #define | CLK_APBCLK_ADC_EN_Msk (0x1ul << CLK_APBCLK_ADC_EN_Pos) |
| #define | CLK_APBCLK_I2S_EN_Pos (29) |
| #define | CLK_APBCLK_I2S_EN_Msk (0x1ul << CLK_APBCLK_I2S_EN_Pos) |
| #define | CLK_APBCLK_SC0_EN_Pos (30) |
| #define | CLK_APBCLK_SC0_EN_Msk (0x1ul << CLK_APBCLK_SC0_EN_Pos) |
| #define | CLK_APBCLK_SC1_EN_Pos (31) |
| #define | CLK_APBCLK_SC1_EN_Msk (0x1ul << CLK_APBCLK_SC1_EN_Pos) |
| #define | CLK_CLKSTATUS_HXT_STB_Pos (0) |
| #define | CLK_CLKSTATUS_HXT_STB_Msk (0x1ul << CLK_CLKSTATUS_HXT_STB_Pos) |
| #define | CLK_CLKSTATUS_LXT_STB_Pos (1) |
| #define | CLK_CLKSTATUS_LXT_STB_Msk (0x1ul << CLK_CLKSTATUS_LXT_STB_Pos) |
| #define | CLK_CLKSTATUS_PLL_STB_Pos (2) |
| #define | CLK_CLKSTATUS_PLL_STB_Msk (0x1ul << CLK_CLKSTATUS_PLL_STB_Pos) |
| #define | CLK_CLKSTATUS_LIRC_STB_Pos (3) |
| #define | CLK_CLKSTATUS_LIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_LIRC_STB_Pos) |
| #define | CLK_CLKSTATUS_HIRC_STB_Pos (4) |
| #define | CLK_CLKSTATUS_HIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_HIRC_STB_Pos) |
| #define | CLK_CLKSTATUS_CLK_SW_FAIL_Pos (7) |
| #define | CLK_CLKSTATUS_CLK_SW_FAIL_Msk (0x1ul << CLK_CLKSTATUS_CLK_SW_FAIL_Pos) |
| #define | CLK_CLKSEL0_HCLK_S_Pos (0) |
| #define | CLK_CLKSEL0_HCLK_S_Msk (0x7ul << CLK_CLKSEL0_HCLK_S_Pos) |
| #define | CLK_CLKSEL1_UART_S_Pos (0) |
| #define | CLK_CLKSEL1_UART_S_Msk (0x3ul << CLK_CLKSEL1_UART_S_Pos) |
| #define | CLK_CLKSEL1_ADC_S_Pos (2) |
| #define | CLK_CLKSEL1_ADC_S_Msk (0x3ul << CLK_CLKSEL1_ADC_S_Pos) |
| #define | CLK_CLKSEL1_PWM0_CH01_S_Pos (4) |
| #define | CLK_CLKSEL1_PWM0_CH01_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH01_S_Pos) |
| #define | CLK_CLKSEL1_PWM0_CH23_S_Pos (6) |
| #define | CLK_CLKSEL1_PWM0_CH23_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH23_S_Pos) |
| #define | CLK_CLKSEL1_TMR0_S_Pos (8) |
| #define | CLK_CLKSEL1_TMR0_S_Msk (0x7ul << CLK_CLKSEL1_TMR0_S_Pos) |
| #define | CLK_CLKSEL1_TMR1_S_Pos (12) |
| #define | CLK_CLKSEL1_TMR1_S_Msk (0x7ul << CLK_CLKSEL1_TMR1_S_Pos) |
| #define | CLK_CLKSEL2_FRQDIV_S_Pos (2) |
| #define | CLK_CLKSEL2_FRQDIV_S_Msk (0x3ul << CLK_CLKSEL2_FRQDIV_S_Pos) |
| #define | CLK_CLKSEL2_PWM1_CH01_S_Pos (4) |
| #define | CLK_CLKSEL2_PWM1_CH01_S_Msk (0x3ul << CLK_CLKSEL2_PWM1_CH01_S_Pos) |
| #define | CLK_CLKSEL2_PWM1_CH23_S_Pos (6) |
| #define | CLK_CLKSEL2_PWM1_CH23_S_Msk (0x3ul << CLK_CLKSEL2_PWM1_CH23_S_Pos) |
| #define | CLK_CLKSEL2_TMR2_S_Pos (8) |
| #define | CLK_CLKSEL2_TMR2_S_Msk (0x7ul << CLK_CLKSEL2_TMR2_S_Pos) |
| #define | CLK_CLKSEL2_TMR3_S_Pos (12) |
| #define | CLK_CLKSEL2_TMR3_S_Msk (0x7ul << CLK_CLKSEL2_TMR3_S_Pos) |
| #define | CLK_CLKSEL2_I2S_S_Pos (16) |
| #define | CLK_CLKSEL2_I2S_S_Msk (0x3ul << CLK_CLKSEL2_I2S_S_Pos) |
| #define | CLK_CLKSEL2_SC_S_Pos (18) |
| #define | CLK_CLKSEL2_SC_S_Msk (0x3ul << CLK_CLKSEL2_SC_S_Pos) |
| #define | CLK_CLKDIV0_HCLK_N_Pos (0) |
| #define | CLK_CLKDIV0_HCLK_N_Msk (0xful << CLK_CLKDIV0_HCLK_N_Pos) |
| #define | CLK_CLKDIV0_USB_N_Pos (4) |
| #define | CLK_CLKDIV0_USB_N_Msk (0xful << CLK_CLKDIV0_USB_N_Pos) |
| #define | CLK_CLKDIV0_UART_N_Pos (8) |
| #define | CLK_CLKDIV0_UART_N_Msk (0xful << CLK_CLKDIV0_UART_N_Pos) |
| #define | CLK_CLKDIV0_I2S_N_Pos (12) |
| #define | CLK_CLKDIV0_I2S_N_Msk (0xful << CLK_CLKDIV0_I2S_N_Pos) |
| #define | CLK_CLKDIV0_ADC_N_Pos (16) |
| #define | CLK_CLKDIV0_ADC_N_Msk (0xfful << CLK_CLKDIV0_ADC_N_Pos) |
| #define | CLK_CLKDIV0_SC0_N_Pos (28) |
| #define | CLK_CLKDIV0_SC0_N_Msk (0xful << CLK_CLKDIV0_SC0_N_Pos) |
| #define | CLK_CLKDIV1_SC1_N_Pos (0) |
| #define | CLK_CLKDIV1_SC1_N_Msk (0xful << CLK_CLKDIV1_SC1_N_Pos) |
| #define | CLK_PLLCTL_FB_DV_Pos (0) |
| #define | CLK_PLLCTL_FB_DV_Msk (0x3ful << CLK_PLLCTL_FB_DV_Pos) |
| #define | CLK_PLLCTL_IN_DV_Pos (8) |
| #define | CLK_PLLCTL_IN_DV_Msk (0x3ul << CLK_PLLCTL_IN_DV_Pos) |
| #define | CLK_PLLCTL_OUT_DV_Pos (12) |
| #define | CLK_PLLCTL_OUT_DV_Msk (0x1ul << CLK_PLLCTL_OUT_DV_Pos) |
| #define | CLK_PLLCTL_PD_Pos (16) |
| #define | CLK_PLLCTL_PD_Msk (0x1ul << CLK_PLLCTL_PD_Pos) |
| #define | CLK_PLLCTL_PLL_SRC_Pos (17) |
| #define | CLK_PLLCTL_PLL_SRC_Msk (0x1ul << CLK_PLLCTL_PLL_SRC_Pos) |
| #define | CLK_FRQDIV_FSEL_Pos (0) |
| #define | CLK_FRQDIV_FSEL_Msk (0xful << CLK_FRQDIV_FSEL_Pos) |
| #define | CLK_FRQDIV_FDIV_EN_Pos (4) |
| #define | CLK_FRQDIV_FDIV_EN_Msk (0x1ul << CLK_FRQDIV_FDIV_EN_Pos) |
| #define | CLK_PD_WK_IS_PD_WK_IS_Pos (0) |
| #define | CLK_PD_WK_IS_PD_WK_IS_Msk (0x1ul << CLK_PD_WK_IS_PD_WK_IS_Pos) |
This file defines all structures and symbols for Nano100:
| #define CLK_AHBCLK_DMA_EN_Msk (0x1ul << CLK_AHBCLK_DMA_EN_Pos) |
CLK_T::AHBCLK: DMA_EN Mask
Definition at line 1072 of file Nano100Series.h.
| #define CLK_AHBCLK_DMA_EN_Pos (1) |
CLK_T::AHBCLK: DMA_EN Position
Definition at line 1071 of file Nano100Series.h.
| #define CLK_AHBCLK_EBI_EN_Msk (0x1ul << CLK_AHBCLK_EBI_EN_Pos) |
CLK_T::AHBCLK: EBI_EN Mask
Definition at line 1078 of file Nano100Series.h.
| #define CLK_AHBCLK_EBI_EN_Pos (3) |
CLK_T::AHBCLK: EBI_EN Position
Definition at line 1077 of file Nano100Series.h.
| #define CLK_AHBCLK_GPIO_EN_Msk (0x1ul << CLK_AHBCLK_GPIO_EN_Pos) |
CLK_T::AHBCLK: GPIO_EN Mask
Definition at line 1069 of file Nano100Series.h.
| #define CLK_AHBCLK_GPIO_EN_Pos (0) |
CLK_T::AHBCLK: GPIO_EN Position
Definition at line 1068 of file Nano100Series.h.
| #define CLK_AHBCLK_ISP_EN_Msk (0x1ul << CLK_AHBCLK_ISP_EN_Pos) |
CLK_T::AHBCLK: ISP_EN Mask
Definition at line 1075 of file Nano100Series.h.
| #define CLK_AHBCLK_ISP_EN_Pos (2) |
CLK_T::AHBCLK: ISP_EN Position
Definition at line 1074 of file Nano100Series.h.
| #define CLK_AHBCLK_SRAM_EN_Msk (0x1ul << CLK_AHBCLK_SRAM_EN_Pos) |
CLK_T::AHBCLK: SRAM_EN Mask
Definition at line 1081 of file Nano100Series.h.
| #define CLK_AHBCLK_SRAM_EN_Pos (4) |
CLK_T::AHBCLK: SRAM_EN Position
Definition at line 1080 of file Nano100Series.h.
| #define CLK_AHBCLK_TICK_EN_Msk (0x1ul << CLK_AHBCLK_TICK_EN_Pos) |
CLK_T::AHBCLK: TICK_EN Mask
Definition at line 1084 of file Nano100Series.h.
| #define CLK_AHBCLK_TICK_EN_Pos (5) |
CLK_T::AHBCLK: TICK_EN Position
Definition at line 1083 of file Nano100Series.h.
| #define CLK_APBCLK_ADC_EN_Msk (0x1ul << CLK_APBCLK_ADC_EN_Pos) |
CLK_T::APBCLK: ADC_EN Mask
Definition at line 1144 of file Nano100Series.h.
| #define CLK_APBCLK_ADC_EN_Pos (28) |
CLK_T::APBCLK: ADC_EN Position
Definition at line 1143 of file Nano100Series.h.
| #define CLK_APBCLK_FDIV_EN_Msk (0x1ul << CLK_APBCLK_FDIV_EN_Pos) |
CLK_T::APBCLK: FDIV_EN Mask
Definition at line 1105 of file Nano100Series.h.
| #define CLK_APBCLK_FDIV_EN_Pos (6) |
CLK_T::APBCLK: FDIV_EN Position
Definition at line 1104 of file Nano100Series.h.
| #define CLK_APBCLK_I2C0_EN_Msk (0x1ul << CLK_APBCLK_I2C0_EN_Pos) |
CLK_T::APBCLK: I2C0_EN Mask
Definition at line 1108 of file Nano100Series.h.
| #define CLK_APBCLK_I2C0_EN_Pos (8) |
CLK_T::APBCLK: I2C0_EN Position
Definition at line 1107 of file Nano100Series.h.
| #define CLK_APBCLK_I2C1_EN_Msk (0x1ul << CLK_APBCLK_I2C1_EN_Pos) |
CLK_T::APBCLK: I2C1_EN Mask
Definition at line 1111 of file Nano100Series.h.
| #define CLK_APBCLK_I2C1_EN_Pos (9) |
CLK_T::APBCLK: I2C1_EN Position
Definition at line 1110 of file Nano100Series.h.
| #define CLK_APBCLK_I2S_EN_Msk (0x1ul << CLK_APBCLK_I2S_EN_Pos) |
CLK_T::APBCLK: I2S_EN Mask
Definition at line 1147 of file Nano100Series.h.
| #define CLK_APBCLK_I2S_EN_Pos (29) |
CLK_T::APBCLK: I2S_EN Position
Definition at line 1146 of file Nano100Series.h.
| #define CLK_APBCLK_PWM0_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH01_EN_Pos) |
CLK_T::APBCLK: PWM0_CH01_EN Mask
Definition at line 1129 of file Nano100Series.h.
| #define CLK_APBCLK_PWM0_CH01_EN_Pos (20) |
CLK_T::APBCLK: PWM0_CH01_EN Position
Definition at line 1128 of file Nano100Series.h.
| #define CLK_APBCLK_PWM0_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM0_CH23_EN_Pos) |
CLK_T::APBCLK: PWM0_CH23_EN Mask
Definition at line 1132 of file Nano100Series.h.
| #define CLK_APBCLK_PWM0_CH23_EN_Pos (21) |
CLK_T::APBCLK: PWM0_CH23_EN Position
Definition at line 1131 of file Nano100Series.h.
| #define CLK_APBCLK_PWM1_CH01_EN_Msk (0x1ul << CLK_APBCLK_PWM1_CH01_EN_Pos) |
CLK_T::APBCLK: PWM1_CH01_EN Mask
Definition at line 1135 of file Nano100Series.h.
| #define CLK_APBCLK_PWM1_CH01_EN_Pos (22) |
CLK_T::APBCLK: PWM1_CH01_EN Position
Definition at line 1134 of file Nano100Series.h.
| #define CLK_APBCLK_PWM1_CH23_EN_Msk (0x1ul << CLK_APBCLK_PWM1_CH23_EN_Pos) |
CLK_T::APBCLK: PWM1_CH23_EN Mask
Definition at line 1138 of file Nano100Series.h.
| #define CLK_APBCLK_PWM1_CH23_EN_Pos (23) |
CLK_T::APBCLK: PWM1_CH23_EN Position
Definition at line 1137 of file Nano100Series.h.
| #define CLK_APBCLK_RTC_EN_Msk (0x1ul << CLK_APBCLK_RTC_EN_Pos) |
CLK_T::APBCLK: RTC_EN Mask
Definition at line 1090 of file Nano100Series.h.
| #define CLK_APBCLK_RTC_EN_Pos (1) |
CLK_T::APBCLK: RTC_EN Position
Definition at line 1089 of file Nano100Series.h.
| #define CLK_APBCLK_SC0_EN_Msk (0x1ul << CLK_APBCLK_SC0_EN_Pos) |
CLK_T::APBCLK: SC0_EN Mask
Definition at line 1150 of file Nano100Series.h.
| #define CLK_APBCLK_SC0_EN_Pos (30) |
CLK_T::APBCLK: SC0_EN Position
Definition at line 1149 of file Nano100Series.h.
| #define CLK_APBCLK_SC1_EN_Msk (0x1ul << CLK_APBCLK_SC1_EN_Pos) |
CLK_T::APBCLK: SC1_EN Mask
Definition at line 1153 of file Nano100Series.h.
| #define CLK_APBCLK_SC1_EN_Pos (31) |
CLK_T::APBCLK: SC1_EN Position
Definition at line 1152 of file Nano100Series.h.
| #define CLK_APBCLK_SPI0_EN_Msk (0x1ul << CLK_APBCLK_SPI0_EN_Pos) |
CLK_T::APBCLK: SPI0_EN Mask
Definition at line 1114 of file Nano100Series.h.
| #define CLK_APBCLK_SPI0_EN_Pos (12) |
CLK_T::APBCLK: SPI0_EN Position
Definition at line 1113 of file Nano100Series.h.
| #define CLK_APBCLK_SPI1_EN_Msk (0x1ul << CLK_APBCLK_SPI1_EN_Pos) |
CLK_T::APBCLK: SPI1_EN Mask
Definition at line 1117 of file Nano100Series.h.
| #define CLK_APBCLK_SPI1_EN_Pos (13) |
CLK_T::APBCLK: SPI1_EN Position
Definition at line 1116 of file Nano100Series.h.
| #define CLK_APBCLK_SPI2_EN_Msk (0x1ul << CLK_APBCLK_SPI2_EN_Pos) |
CLK_T::APBCLK: SPI2_EN Mask
Definition at line 1120 of file Nano100Series.h.
| #define CLK_APBCLK_SPI2_EN_Pos (14) |
CLK_T::APBCLK: SPI2_EN Position
Definition at line 1119 of file Nano100Series.h.
| #define CLK_APBCLK_TMR0_EN_Msk (0x1ul << CLK_APBCLK_TMR0_EN_Pos) |
CLK_T::APBCLK: TMR0_EN Mask
Definition at line 1093 of file Nano100Series.h.
| #define CLK_APBCLK_TMR0_EN_Pos (2) |
CLK_T::APBCLK: TMR0_EN Position
Definition at line 1092 of file Nano100Series.h.
| #define CLK_APBCLK_TMR1_EN_Msk (0x1ul << CLK_APBCLK_TMR1_EN_Pos) |
CLK_T::APBCLK: TMR1_EN Mask
Definition at line 1096 of file Nano100Series.h.
| #define CLK_APBCLK_TMR1_EN_Pos (3) |
CLK_T::APBCLK: TMR1_EN Position
Definition at line 1095 of file Nano100Series.h.
| #define CLK_APBCLK_TMR2_EN_Msk (0x1ul << CLK_APBCLK_TMR2_EN_Pos) |
CLK_T::APBCLK: TMR2_EN Mask
Definition at line 1099 of file Nano100Series.h.
| #define CLK_APBCLK_TMR2_EN_Pos (4) |
CLK_T::APBCLK: TMR2_EN Position
Definition at line 1098 of file Nano100Series.h.
| #define CLK_APBCLK_TMR3_EN_Msk (0x1ul << CLK_APBCLK_TMR3_EN_Pos) |
CLK_T::APBCLK: TMR3_EN Mask
Definition at line 1102 of file Nano100Series.h.
| #define CLK_APBCLK_TMR3_EN_Pos (5) |
CLK_T::APBCLK: TMR3_EN Position
Definition at line 1101 of file Nano100Series.h.
| #define CLK_APBCLK_UART0_EN_Msk (0x1ul << CLK_APBCLK_UART0_EN_Pos) |
CLK_T::APBCLK: UART0_EN Mask
Definition at line 1123 of file Nano100Series.h.
| #define CLK_APBCLK_UART0_EN_Pos (16) |
CLK_T::APBCLK: UART0_EN Position
Definition at line 1122 of file Nano100Series.h.
| #define CLK_APBCLK_UART1_EN_Msk (0x1ul << CLK_APBCLK_UART1_EN_Pos) |
CLK_T::APBCLK: UART1_EN Mask
Definition at line 1126 of file Nano100Series.h.
| #define CLK_APBCLK_UART1_EN_Pos (17) |
CLK_T::APBCLK: UART1_EN Position
Definition at line 1125 of file Nano100Series.h.
| #define CLK_APBCLK_USBD_EN_Msk (0x1ul << CLK_APBCLK_USBD_EN_Pos) |
CLK_T::APBCLK: USBD_EN Mask
Definition at line 1141 of file Nano100Series.h.
| #define CLK_APBCLK_USBD_EN_Pos (27) |
CLK_T::APBCLK: USBD_EN Position
Definition at line 1140 of file Nano100Series.h.
| #define CLK_APBCLK_WDT_EN_Msk (0x1ul << CLK_APBCLK_WDT_EN_Pos) |
CLK_T::APBCLK: WDT_EN Mask
Definition at line 1087 of file Nano100Series.h.
| #define CLK_APBCLK_WDT_EN_Pos (0) |
CLK_T::APBCLK: WDT_EN Position
Definition at line 1086 of file Nano100Series.h.
| #define CLK_CLKDIV0_ADC_N_Msk (0xfful << CLK_CLKDIV0_ADC_N_Pos) |
CLK_T::CLKDIV0: ADC_N Mask
Definition at line 1228 of file Nano100Series.h.
| #define CLK_CLKDIV0_ADC_N_Pos (16) |
CLK_T::CLKDIV0: ADC_N Position
Definition at line 1227 of file Nano100Series.h.
| #define CLK_CLKDIV0_HCLK_N_Msk (0xful << CLK_CLKDIV0_HCLK_N_Pos) |
CLK_T::CLKDIV0: HCLK_N Mask
Definition at line 1216 of file Nano100Series.h.
| #define CLK_CLKDIV0_HCLK_N_Pos (0) |
CLK_T::CLKDIV0: HCLK_N Position
Definition at line 1215 of file Nano100Series.h.
| #define CLK_CLKDIV0_I2S_N_Msk (0xful << CLK_CLKDIV0_I2S_N_Pos) |
CLK_T::CLKDIV0: I2S_N Mask
Definition at line 1225 of file Nano100Series.h.
| #define CLK_CLKDIV0_I2S_N_Pos (12) |
CLK_T::CLKDIV0: I2S_N Position
Definition at line 1224 of file Nano100Series.h.
| #define CLK_CLKDIV0_SC0_N_Msk (0xful << CLK_CLKDIV0_SC0_N_Pos) |
CLK_T::CLKDIV0: SC0_N Mask
Definition at line 1231 of file Nano100Series.h.
| #define CLK_CLKDIV0_SC0_N_Pos (28) |
CLK_T::CLKDIV0: SC0_N Position
Definition at line 1230 of file Nano100Series.h.
| #define CLK_CLKDIV0_UART_N_Msk (0xful << CLK_CLKDIV0_UART_N_Pos) |
CLK_T::CLKDIV0: UART_N Mask
Definition at line 1222 of file Nano100Series.h.
| #define CLK_CLKDIV0_UART_N_Pos (8) |
CLK_T::CLKDIV0: UART_N Position
Definition at line 1221 of file Nano100Series.h.
| #define CLK_CLKDIV0_USB_N_Msk (0xful << CLK_CLKDIV0_USB_N_Pos) |
CLK_T::CLKDIV0: USB_N Mask
Definition at line 1219 of file Nano100Series.h.
| #define CLK_CLKDIV0_USB_N_Pos (4) |
CLK_T::CLKDIV0: USB_N Position
Definition at line 1218 of file Nano100Series.h.
| #define CLK_CLKDIV1_SC1_N_Msk (0xful << CLK_CLKDIV1_SC1_N_Pos) |
CLK_T::CLKDIV1: SC1_N Mask
Definition at line 1234 of file Nano100Series.h.
| #define CLK_CLKDIV1_SC1_N_Pos (0) |
CLK_T::CLKDIV1: SC1_N Position
Definition at line 1233 of file Nano100Series.h.
| #define CLK_CLKSEL0_HCLK_S_Msk (0x7ul << CLK_CLKSEL0_HCLK_S_Pos) |
CLK_T::CLKSEL0: HCLK_S Mask
Definition at line 1174 of file Nano100Series.h.
| #define CLK_CLKSEL0_HCLK_S_Pos (0) |
CLK_T::CLKSEL0: HCLK_S Position
Definition at line 1173 of file Nano100Series.h.
| #define CLK_CLKSEL1_ADC_S_Msk (0x3ul << CLK_CLKSEL1_ADC_S_Pos) |
CLK_T::CLKSEL1: ADC_S Mask
Definition at line 1180 of file Nano100Series.h.
| #define CLK_CLKSEL1_ADC_S_Pos (2) |
CLK_T::CLKSEL1: ADC_S Position
Definition at line 1179 of file Nano100Series.h.
| #define CLK_CLKSEL1_PWM0_CH01_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH01_S_Pos) |
CLK_T::CLKSEL1: PWM0_CH01_S Mask
Definition at line 1183 of file Nano100Series.h.
| #define CLK_CLKSEL1_PWM0_CH01_S_Pos (4) |
CLK_T::CLKSEL1: PWM0_CH01_S Position
Definition at line 1182 of file Nano100Series.h.
| #define CLK_CLKSEL1_PWM0_CH23_S_Msk (0x3ul << CLK_CLKSEL1_PWM0_CH23_S_Pos) |
CLK_T::CLKSEL1: PWM0_CH23_S Mask
Definition at line 1186 of file Nano100Series.h.
| #define CLK_CLKSEL1_PWM0_CH23_S_Pos (6) |
CLK_T::CLKSEL1: PWM0_CH23_S Position
Definition at line 1185 of file Nano100Series.h.
| #define CLK_CLKSEL1_TMR0_S_Msk (0x7ul << CLK_CLKSEL1_TMR0_S_Pos) |
CLK_T::CLKSEL1: TMR0_S Mask
Definition at line 1189 of file Nano100Series.h.
| #define CLK_CLKSEL1_TMR0_S_Pos (8) |
CLK_T::CLKSEL1: TMR0_S Position
Definition at line 1188 of file Nano100Series.h.
| #define CLK_CLKSEL1_TMR1_S_Msk (0x7ul << CLK_CLKSEL1_TMR1_S_Pos) |
CLK_T::CLKSEL1: TMR1_S Mask
Definition at line 1192 of file Nano100Series.h.
| #define CLK_CLKSEL1_TMR1_S_Pos (12) |
CLK_T::CLKSEL1: TMR1_S Position
Definition at line 1191 of file Nano100Series.h.
| #define CLK_CLKSEL1_UART_S_Msk (0x3ul << CLK_CLKSEL1_UART_S_Pos) |
CLK_T::CLKSEL1: UART_S Mask
Definition at line 1177 of file Nano100Series.h.
| #define CLK_CLKSEL1_UART_S_Pos (0) |
CLK_T::CLKSEL1: UART_S Position
Definition at line 1176 of file Nano100Series.h.
| #define CLK_CLKSEL2_FRQDIV_S_Msk (0x3ul << CLK_CLKSEL2_FRQDIV_S_Pos) |
CLK_T::CLKSEL2: FRQDIV_S Mask
Definition at line 1195 of file Nano100Series.h.
| #define CLK_CLKSEL2_FRQDIV_S_Pos (2) |
CLK_T::CLKSEL2: FRQDIV_S Position
Definition at line 1194 of file Nano100Series.h.
| #define CLK_CLKSEL2_I2S_S_Msk (0x3ul << CLK_CLKSEL2_I2S_S_Pos) |
CLK_T::CLKSEL2: I2S_S Mask
Definition at line 1210 of file Nano100Series.h.
| #define CLK_CLKSEL2_I2S_S_Pos (16) |
CLK_T::CLKSEL2: I2S_S Position
Definition at line 1209 of file Nano100Series.h.
| #define CLK_CLKSEL2_PWM1_CH01_S_Msk (0x3ul << CLK_CLKSEL2_PWM1_CH01_S_Pos) |
CLK_T::CLKSEL2: PWM1_CH01_S Mask
Definition at line 1198 of file Nano100Series.h.
| #define CLK_CLKSEL2_PWM1_CH01_S_Pos (4) |
CLK_T::CLKSEL2: PWM1_CH01_S Position
Definition at line 1197 of file Nano100Series.h.
| #define CLK_CLKSEL2_PWM1_CH23_S_Msk (0x3ul << CLK_CLKSEL2_PWM1_CH23_S_Pos) |
CLK_T::CLKSEL2: PWM1_CH23_S Mask
Definition at line 1201 of file Nano100Series.h.
| #define CLK_CLKSEL2_PWM1_CH23_S_Pos (6) |
CLK_T::CLKSEL2: PWM1_CH23_S Position
Definition at line 1200 of file Nano100Series.h.
| #define CLK_CLKSEL2_SC_S_Msk (0x3ul << CLK_CLKSEL2_SC_S_Pos) |
CLK_T::CLKSEL2: SC_S Mask
Definition at line 1213 of file Nano100Series.h.
| #define CLK_CLKSEL2_SC_S_Pos (18) |
CLK_T::CLKSEL2: SC_S Position
Definition at line 1212 of file Nano100Series.h.
| #define CLK_CLKSEL2_TMR2_S_Msk (0x7ul << CLK_CLKSEL2_TMR2_S_Pos) |
CLK_T::CLKSEL2: TMR2_S Mask
Definition at line 1204 of file Nano100Series.h.
| #define CLK_CLKSEL2_TMR2_S_Pos (8) |
CLK_T::CLKSEL2: TMR2_S Position
Definition at line 1203 of file Nano100Series.h.
| #define CLK_CLKSEL2_TMR3_S_Msk (0x7ul << CLK_CLKSEL2_TMR3_S_Pos) |
CLK_T::CLKSEL2: TMR3_S Mask
Definition at line 1207 of file Nano100Series.h.
| #define CLK_CLKSEL2_TMR3_S_Pos (12) |
CLK_T::CLKSEL2: TMR3_S Position
Definition at line 1206 of file Nano100Series.h.
| #define CLK_CLKSTATUS_CLK_SW_FAIL_Msk (0x1ul << CLK_CLKSTATUS_CLK_SW_FAIL_Pos) |
CLK_T::CLKSTATUS: CLK_SW_FAIL Mask
Definition at line 1171 of file Nano100Series.h.
| #define CLK_CLKSTATUS_CLK_SW_FAIL_Pos (7) |
CLK_T::CLKSTATUS: CLK_SW_FAIL Position
Definition at line 1170 of file Nano100Series.h.
| #define CLK_CLKSTATUS_HIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_HIRC_STB_Pos) |
CLK_T::CLKSTATUS: HIRC_STB Mask
Definition at line 1168 of file Nano100Series.h.
| #define CLK_CLKSTATUS_HIRC_STB_Pos (4) |
CLK_T::CLKSTATUS: HIRC_STB Position
Definition at line 1167 of file Nano100Series.h.
| #define CLK_CLKSTATUS_HXT_STB_Msk (0x1ul << CLK_CLKSTATUS_HXT_STB_Pos) |
CLK_T::CLKSTATUS: HXT_STB Mask
Definition at line 1156 of file Nano100Series.h.
| #define CLK_CLKSTATUS_HXT_STB_Pos (0) |
CLK_T::CLKSTATUS: HXT_STB Position
Definition at line 1155 of file Nano100Series.h.
| #define CLK_CLKSTATUS_LIRC_STB_Msk (0x1ul << CLK_CLKSTATUS_LIRC_STB_Pos) |
CLK_T::CLKSTATUS: LIRC_STB Mask
Definition at line 1165 of file Nano100Series.h.
| #define CLK_CLKSTATUS_LIRC_STB_Pos (3) |
CLK_T::CLKSTATUS: LIRC_STB Position
Definition at line 1164 of file Nano100Series.h.
| #define CLK_CLKSTATUS_LXT_STB_Msk (0x1ul << CLK_CLKSTATUS_LXT_STB_Pos) |
CLK_T::CLKSTATUS: LXT_STB Mask
Definition at line 1159 of file Nano100Series.h.
| #define CLK_CLKSTATUS_LXT_STB_Pos (1) |
CLK_T::CLKSTATUS: LXT_STB Position
Definition at line 1158 of file Nano100Series.h.
| #define CLK_CLKSTATUS_PLL_STB_Msk (0x1ul << CLK_CLKSTATUS_PLL_STB_Pos) |
CLK_T::CLKSTATUS: PLL_STB Mask
Definition at line 1162 of file Nano100Series.h.
| #define CLK_CLKSTATUS_PLL_STB_Pos (2) |
CLK_T::CLKSTATUS: PLL_STB Position
Definition at line 1161 of file Nano100Series.h.
| #define CLK_FRQDIV_FDIV_EN_Msk (0x1ul << CLK_FRQDIV_FDIV_EN_Pos) |
CLK_T::FRQDIV: FDIV_EN Mask
Definition at line 1255 of file Nano100Series.h.
| #define CLK_FRQDIV_FDIV_EN_Pos (4) |
CLK_T::FRQDIV: FDIV_EN Position
Definition at line 1254 of file Nano100Series.h.
| #define CLK_FRQDIV_FSEL_Msk (0xful << CLK_FRQDIV_FSEL_Pos) |
CLK_T::FRQDIV: FSEL Mask
Definition at line 1252 of file Nano100Series.h.
| #define CLK_FRQDIV_FSEL_Pos (0) |
CLK_T::FRQDIV: FSEL Position
Definition at line 1251 of file Nano100Series.h.
| #define CLK_PD_WK_IS_PD_WK_IS_Msk (0x1ul << CLK_PD_WK_IS_PD_WK_IS_Pos) |
CLK_T::WK_IS: PD_WK_IS Mask
Definition at line 1258 of file Nano100Series.h.
| #define CLK_PD_WK_IS_PD_WK_IS_Pos (0) |
CLK_T::WK_IS: PD_WK_IS Position
Definition at line 1257 of file Nano100Series.h.
| #define CLK_PLLCTL_FB_DV_Msk (0x3ful << CLK_PLLCTL_FB_DV_Pos) |
CLK_T::PLLCTL: FB_DV Mask
Definition at line 1237 of file Nano100Series.h.
| #define CLK_PLLCTL_FB_DV_Pos (0) |
CLK_T::PLLCTL: FB_DV Position
Definition at line 1236 of file Nano100Series.h.
| #define CLK_PLLCTL_IN_DV_Msk (0x3ul << CLK_PLLCTL_IN_DV_Pos) |
CLK_T::PLLCTL: IN_DV Mask
Definition at line 1240 of file Nano100Series.h.
| #define CLK_PLLCTL_IN_DV_Pos (8) |
CLK_T::PLLCTL: IN_DV Position
Definition at line 1239 of file Nano100Series.h.
| #define CLK_PLLCTL_OUT_DV_Msk (0x1ul << CLK_PLLCTL_OUT_DV_Pos) |
CLK_T::PLLCTL: OUT_DV Mask
Definition at line 1243 of file Nano100Series.h.
| #define CLK_PLLCTL_OUT_DV_Pos (12) |
CLK_T::PLLCTL: OUT_DV Position
Definition at line 1242 of file Nano100Series.h.
| #define CLK_PLLCTL_PD_Msk (0x1ul << CLK_PLLCTL_PD_Pos) |
CLK_T::PLLCTL: PD Mask
Definition at line 1246 of file Nano100Series.h.
| #define CLK_PLLCTL_PD_Pos (16) |
CLK_T::PLLCTL: PD Position
Definition at line 1245 of file Nano100Series.h.
| #define CLK_PLLCTL_PLL_SRC_Msk (0x1ul << CLK_PLLCTL_PLL_SRC_Pos) |
CLK_T::PLLCTL: PLL_SRC Mask
Definition at line 1249 of file Nano100Series.h.
| #define CLK_PLLCTL_PLL_SRC_Pos (17) |
CLK_T::PLLCTL: PLL_SRC Position
Definition at line 1248 of file Nano100Series.h.
| #define CLK_PWRCTL_HIRC_EN_Msk (0x1ul << CLK_PWRCTL_HIRC_EN_Pos) |
CLK_T::PWRCTL: HIRC_EN Mask
Definition at line 1045 of file Nano100Series.h.
| #define CLK_PWRCTL_HIRC_EN_Pos (2) |
CLK_T::PWRCTL: HIRC_EN Position
Definition at line 1044 of file Nano100Series.h.
| #define CLK_PWRCTL_HXT_EN_Msk (0x1ul << CLK_PWRCTL_HXT_EN_Pos) |
CLK_T::PWRCTL: HXT_EN Mask
Definition at line 1039 of file Nano100Series.h.
| #define CLK_PWRCTL_HXT_EN_Pos (0) |
@addtogroup CLK_CONST CLK Bit Field Definition Constant Definitions for CLK Controller
CLK_T::PWRCTL: HXT_EN Position
Definition at line 1038 of file Nano100Series.h.
| #define CLK_PWRCTL_HXT_GAIN_Msk (0x1ul << CLK_PWRCTL_HXT_GAIN_Pos) |
CLK_T::PWRCTL: HXT_GAIN Mask
Definition at line 1063 of file Nano100Series.h.
| #define CLK_PWRCTL_HXT_GAIN_Pos (9) |
CLK_T::PWRCTL: HXT_GAIN Position
Definition at line 1062 of file Nano100Series.h.
| #define CLK_PWRCTL_HXT_SELXT_Msk (0x1ul << CLK_PWRCTL_HXT_SELXT_Pos) |
CLK_T::PWRCTL: HXT_SELXT Mask
Definition at line 1060 of file Nano100Series.h.
| #define CLK_PWRCTL_HXT_SELXT_Pos (8) |
CLK_T::PWRCTL: HXT_SELXT Position
Definition at line 1059 of file Nano100Series.h.
| #define CLK_PWRCTL_LIRC_EN_Msk (0x1ul << CLK_PWRCTL_LIRC_EN_Pos) |
CLK_T::PWRCTL: LIRC_EN Mask
Definition at line 1048 of file Nano100Series.h.
| #define CLK_PWRCTL_LIRC_EN_Pos (3) |
CLK_T::PWRCTL: LIRC_EN Position
Definition at line 1047 of file Nano100Series.h.
| #define CLK_PWRCTL_LXT_EN_Msk (0x1ul << CLK_PWRCTL_LXT_EN_Pos) |
CLK_T::PWRCTL: LXT_EN Mask
Definition at line 1042 of file Nano100Series.h.
| #define CLK_PWRCTL_LXT_EN_Pos (1) |
CLK_T::PWRCTL: LXT_EN Position
Definition at line 1041 of file Nano100Series.h.
| #define CLK_PWRCTL_LXT_SCNT_Msk (0x1ul << CLK_PWRCTL_LXT_SCNT_Pos) |
CLK_T::PWRCTL: LXT_SCNT Mask
Definition at line 1066 of file Nano100Series.h.
| #define CLK_PWRCTL_LXT_SCNT_Pos (10) |
CLK_T::PWRCTL: LXT_SCNT Position
Definition at line 1065 of file Nano100Series.h.
| #define CLK_PWRCTL_PD_EN_Msk (0x1ul << CLK_PWRCTL_PD_EN_Pos) |
CLK_T::PWRCTL: PD_EN Mask
Definition at line 1057 of file Nano100Series.h.
| #define CLK_PWRCTL_PD_EN_Pos (6) |
CLK_T::PWRCTL: PD_EN Position
Definition at line 1056 of file Nano100Series.h.
| #define CLK_PWRCTL_PD_WK_IE_Msk (0x1ul << CLK_PWRCTL_PD_WK_IE_Pos) |
CLK_T::PWRCTL: PD_WK_IE Mask
Definition at line 1054 of file Nano100Series.h.
| #define CLK_PWRCTL_PD_WK_IE_Pos (5) |
CLK_T::PWRCTL: PD_WK_IE Position
Definition at line 1053 of file Nano100Series.h.
| #define CLK_PWRCTL_WK_DLY_Msk (0x1ul << CLK_PWRCTL_WK_DLY_Pos) |
CLK_T::PWRCTL: WK_DLY Mask
Definition at line 1051 of file Nano100Series.h.
| #define CLK_PWRCTL_WK_DLY_Pos (4) |
CLK_T::PWRCTL: WK_DLY Position
Definition at line 1050 of file Nano100Series.h.
1.8.15