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Nano100BN Series BSP
V3.03.002
The Board Support Package for Nano100BN Series
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#include <Nano100Series.h>
Data Fields | |
| __IO uint32_t | CTL |
| __I uint32_t | BUSSTS |
| __IO uint32_t | INTEN |
| __IO uint32_t | INTSTS |
| __IO uint32_t | FADDR |
| __I uint32_t | EPSTS |
| __IO uint32_t | BUFSEG |
| __I uint32_t | EPSTS2 |
| USBD_EP_T | EP [8] |
| uint32_t | RESERVE0 |
| __IO uint32_t | PDMA |
Definition at line 10915 of file Nano100Series.h.
| __IO uint32_t USBD_T::BUFSEG |
| Bits | Field | Descriptions |
|---|---|---|
| [8:3] | BUFSEG | This Register Is Used For Setup Token Only |
| It is used to define the offset address for the Setup Token with the USB SRAM starting address. | ||
| Its physical address is USB_SRAM address + {BUFSEG[5:0], 000} where the USB_SRAM = USB_BASE + 0x100h. |
Definition at line 11107 of file Nano100Series.h.
| __I uint32_t USBD_T::BUSSTS |
| Bits | Field | Descriptions |
|---|---|---|
| [0] | USBRST | USB Reset Status |
| 1 = Bus reset when SE0 (single-ended 0) more than 2.5uS. It is read only. | ||
| [1] | SUSPEND | Suspend Status |
| 1 = Bus idle more than 3 ms, either cable is plugged off or host is sleeping. It is read only. | ||
| [2] | RESUME | Resume Status |
| 1 = Resume from suspend. It is read only. | ||
| [3] | TIMEOUT | Time-Out Flag |
| 1 = Bus no any response more than 18 bits time. It is read only. | ||
| [4] | FLDET | Device Floating Detection |
| 0 = The controller didn't attach into the USB. | ||
| 1 = When the controller is attached into the USB, this bit will be set as "1". |
Definition at line 10971 of file Nano100Series.h.
| __IO uint32_t USBD_T::CTL |
| Bits | Field | Descriptions |
|---|---|---|
| [0] | USB_EN | USB Function Enable |
| 0 = USB Disabled. | ||
| 1 = USB Enabled. | ||
| [1] | PHY_EN | PHY Transceiver Enable |
| 0 = PHY transceiver Disabled. | ||
| 1 = PHY transceiver Enabled. | ||
| [2] | PWRDB | Power Down PHY Transceiver, Low Active |
| 0 = Power-down related circuit of PHY transceiver. | ||
| 1 = Turn-on related circuit of PHY transceiver. | ||
| [3] | DPPU_EN | Pull-Up Resistor On USB_DP Enable |
| 0 = Pull-up resistor in USB_DP bus Disabled. | ||
| 1 = Pull-up resistor in USB_DP bus will be active. | ||
| [4] | DRVSE0 | Force USB PHY Transceiver To Drive SE0 (Single Ended Zero) |
| The Single Ended Zero is present when both lines (USB_DP, USB_DM) are being pulled low. | ||
| 0 = None. | ||
| 1 = Force USB PHY transceiver to drive SE0. | ||
| The default value is "1". | ||
| [8] | RWAKEUP | Remote Wake-Up |
| 0 = Don't force USB bus to K state. | ||
| 1 = Force USB bus to K (USB_DP low, USB_DM: high) state, used for remote wake-up. | ||
| [9] | WAKEUP_EN | Wake-Up Function Enable |
| 0 = USB wake-up function Disabled. | ||
| 1 = USB wake-up function Enabled. |
Definition at line 10950 of file Nano100Series.h.
| USBD_EP_T USBD_T::EP[8] |
Definition at line 11126 of file Nano100Series.h.
| __I uint32_t USBD_T::EPSTS |
| Bits | Field | Descriptions |
|---|---|---|
| [7] | OVERRUN | Overrun |
| It means the received data is over the maximum payload number or not. | ||
| 0 = No overrun. | ||
| 1 = Out Data more than the Max Payload in MXPLD register or the Setup Data more than 8 Bytes. | ||
| [11:8] | EPSTS0 | Endpoint 0 Bus Status |
| These bits are used to show the current status of this endpoint. | ||
| Definition is the same with EPSTS5(USB_EPSTS[27:24]). | ||
| [15:12] | EPSTS1 | Endpoint 1 Bus Status |
| These bits are used to show the current status of this endpoint. | ||
| Definition is the same with EPSTS5(USB_EPSTS[27:24]). | ||
| [19:16] | EPSTS2 | Endpoint 2 Bus Status |
| These bits are used to show the current status of this endpoint. | ||
| Definition is the same with EPSTS5(USB_EPSTS[27:24]). | ||
| [23:20] | EPSTS3 | Endpoint 3 Bus Status |
| These bits are used to show the current status of this endpoint. | ||
| Definition is the same with EPSTS5(USB_EPSTS[27:24]). | ||
| [27:24] | EPSTS4 | Endpoint 4 Bus Status |
| These bits are used to show the current status of this endpoint. | ||
| Definition is the same with EPSTS5(USB_EPSTS[27:24]). | ||
| [31:28] | EPSTS5 | Endpoint 5 Bus Status |
| These bits are used to show the current status of this endpoint. | ||
| 0000 = INACK. | ||
| 0001 = IN NAK (INTERNAL ONLY). | ||
| 0010 = OUT Packet Data0 ACK. | ||
| 0011 = Setup ACK | ||
| 0110 = OUT Packet Data1 ACK. | ||
| 0111 = Isochronous transfer end. |
Definition at line 11094 of file Nano100Series.h.
| __I uint32_t USBD_T::EPSTS2 |
| Bits | Field | Descriptions |
|---|---|---|
| [2:0] | EPSTS6 | Endpoint 6 Bus Status |
| These bits are used to show the current status of this endpoint. | ||
| Definition is the same with EPSTS5(USB_EPSTS[27:24]). | ||
| [6:4] | EPSTS7 | Endpoint 7 Bus Status |
| These bits are used to show the current status of this endpoint. | ||
| Definition is the same with EPSTS5(USB_EPSTS[27:24]). |
Definition at line 11123 of file Nano100Series.h.
| __IO uint32_t USBD_T::FADDR |
| Bits | Field | Descriptions |
|---|---|---|
| [6:0] | FADDR | USB device's function address |
Definition at line 11057 of file Nano100Series.h.
| __IO uint32_t USBD_T::INTEN |
| Bits | Field | Descriptions |
|---|---|---|
| [0] | BUSEVT_IE | Bus Event Interrupt Enable |
| 0 = BUS event interrupt Disabled. | ||
| 1 = BUS event interrupt Enabled. | ||
| [1] | USBEVT_IE | USB Event Interrupt Enable |
| 0 = USB event interrupt Disabled. | ||
| 1 = USB event interrupt Enabled. | ||
| [2] | FLDET_IE | Floating Detect Interrupt Enable |
| 0 = Floating detect Interrupt Disabled. | ||
| 1 = Floating detect Interrupt Enabled. | ||
| [3] | WAKEUP_IE | USB Wake-Up Interrupt Enable |
| 0 = Wake-up Interrupt Disabled. | ||
| 1 = Wake-up Interrupt Enabled. |
Definition at line 10993 of file Nano100Series.h.
| __IO uint32_t USBD_T::INTSTS |
| Bits | Field | Descriptions |
|---|---|---|
| [0] | BUS_STS | BUS Interrupt Status |
| The BUS event means there is bus suspense or bus resume in the bus. | ||
| This bit is used to indicate that there is one of events in the bus. | ||
| 0 = No BUS event is occurred. | ||
| 1 = BUS event occurred; check USB_BUSSTS [3:0] to know which kind of bus event was occurred, cleared by write "1" to USB_INTSTS [0]. | ||
| [1] | USB_STS | USB Interrupt Status |
| The USB event means that there is Setup Token, IN token, OUT ACK, ISO IN, or ISO OUT event in the bus. | ||
| This bit is used to indicate that there is one of events in the bus. | ||
| 0 = No USB event is occurred. | ||
| 1 = USB event occurred, check EPSTS0~7[3:0] in USB_EPSTS [31:8] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [1] or USB_INTSTS[31] or EPEVT0~7. | ||
| [2] | FLD_STS | Floating Interrupt Status |
| 0 = There is not attached event in the USB. | ||
| 1 = There is attached event in the USB and it is cleared by write "1" to USB_INTSTS [2]. | ||
| [3] | WKEUP_STS | Wake-Up Interrupt Status |
| 0 = No wake-up event is occurred. | ||
| 1 = Wake-up event occurred, cleared by write 1 to USB_INTSTS [3]. | ||
| [16] | EPEVT0 | USB Event Status On EP0 |
| 0 = No event occurred in Endpoint 0. | ||
| 1 = USB event occurred on Endpoint 0, check USB_EPSTS[11:8] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [16] or USB_INTSTS [1]. | ||
| [17] | EPEVT1 | USB Event Status On EP1 |
| 0 = No event occurred in Endpoint 1. | ||
| 1 = USB event occurred on Endpoint 1, check USB_EPSTS[15:12] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [17] or USB_INTSTS [1]. | ||
| [18] | EPEVT2 | USB Event Status On EP2 |
| 0 = No event occurred in Endpoint 2. | ||
| 1 = USB event occurred on Endpoint 2, check USB_EPSTS[19:16] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [18] or USB_INTSTS [1]. | ||
| [19] | EPEVT3 | USB Event Status On EP3 |
| 0 = No event occurred in Endpoint 3. | ||
| 1 = USB event occurred on Endpoint 3, check USB_EPSTS[23:20] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [19] or USB_INTSTS [1]. | ||
| [20] | EPEVT4 | USB Event Status On EP4 |
| 0 = No event occurred in Endpoint 4. | ||
| 1 = USB event occurred on Endpoint 4, check USB_EPSTS[27:24] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [20] or USB_INTSTS [1]. | ||
| [21] | EPEVT5 | USB Event Status On EP5 |
| 0 = No event occurred in Endpoint 5. | ||
| 1 = USB event occurred on Endpoint 5, check USB_EPSTS[31:28] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [21] or USB_INTSTS [1]. | ||
| [22] | EPEVT6 | USB Event Status On EP6 |
| 0 = No event occurred in Endpoint 6. | ||
| 1 = USB event occurred on Endpoint 6, check USB_EPSTS2[2:0] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [22] or USB_INTSTS [1]. | ||
| [23] | EPEVT7 | USB Event Status On EP7 |
| 0 = No event occurred in Endpoint 7. | ||
| 1 = USB event occurred on Endpoint 7, check USB_EPSTS2[6:4] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [23] or USB_INTSTS [1]. | ||
| [31] | SETUP | Setup Event Status |
| 0 = No Setup event. | ||
| 1 = Setup event occurred, cleared by write "1" to USB_INTSTS[31]. |
Definition at line 11046 of file Nano100Series.h.
| __IO uint32_t USBD_T::PDMA |
| Bits | Field | Descriptions |
|---|---|---|
| [0] | PDMA_RW | PDMA_RW |
| 0 = The PDMA will read data from memory to USB buffer. | ||
| 1 = The PDMA will read data from USB buffer to memory. | ||
| [1] | PDMA_TRG | Active PDMA Function |
| 0 = The PDMA function is not active. | ||
| 1 = The PDMA function in USB is active. | ||
| This bit will be automatically cleared after PDMA transfer done. | ||
| [2] | BYTEM | CPU Access USB SRAM Size Mode Select |
| 0 = Word Mode: The size of the transfer from CPU to USB SRAM is Word order. | ||
| 1 = Byte Mode: The size of the transfer from CPU to USB SRAM is Byte order. | ||
| [3] | PDMA_RST | PDMA Reset |
| It is used to reset the USB PDMA function into default state. | ||
| 0 = No Reset PDMA Reset Disable. | ||
| 1 = Reset the PDMA function in this controller. | ||
| Note: it is auto cleared to 0 after the reset function done. |
Definition at line 11153 of file Nano100Series.h.
| uint32_t USBD_T::RESERVE0 |
Definition at line 11128 of file Nano100Series.h.
1.8.15