45 #define USBD_BUF_BASE (USBD_BASE+0x100) 58 extern volatile uint32_t g_usbd_UsbConfig; 62 #define REQ_STANDARD 0x00 63 #define REQ_CLASS 0x20 64 #define REQ_VENDOR 0x40 67 #define GET_STATUS 0x00 68 #define CLEAR_FEATURE 0x01 69 #define SET_FEATURE 0x03 70 #define SET_ADDRESS 0x05 71 #define GET_DESCRIPTOR 0x06 72 #define SET_DESCRIPTOR 0x07 73 #define GET_CONFIGURATION 0x08 74 #define SET_CONFIGURATION 0x09 75 #define GET_INTERFACE 0x0A 76 #define SET_INTERFACE 0x0B 77 #define SYNC_FRAME 0x0C 80 #define DESC_DEVICE 0x01 81 #define DESC_CONFIG 0x02 82 #define DESC_STRING 0x03 83 #define DESC_INTERFACE 0x04 84 #define DESC_ENDPOINT 0x05 85 #define DESC_QUALIFIER 0x06 86 #define DESC_OTHERSPEED 0x07 90 #define DESC_HID_RPT 0x22 95 #define LEN_INTERFACE 9 96 #define LEN_ENDPOINT 7 105 #define EP_INPUT 0x80 106 #define EP_OUTPUT 0x00 109 #define FEATURE_DEVICE_REMOTE_WAKEUP 0x01 110 #define FEATURE_ENDPOINT_HALT 0x00 114 #define USBD_WAKEUP_EN USBD_CTL_WAKEUP_EN_Msk 115 #define USBD_DRVSE0 USBD_CTL_DRVSE0_Msk 117 #define USBD_DPPU_EN USBD_CTL_DPPU_EN_Msk 118 #define USBD_PWRDN USBD_CTL_PWRDB_Msk 119 #define USBD_PHY_EN USBD_CTL_PHY_EN_Msk 120 #define USBD_USB_EN USBD_CTL_USB_EN_Msk 122 #define USBD_INT_BUS USBD_INTEN_BUSEVT_IE_Msk 123 #define USBD_INT_USB USBD_INTEN_USBEVT_IE_Msk 124 #define USBD_INT_FLDET USBD_INTEN_FLDET_IE_Msk 125 #define USBD_INT_WAKEUP USBD_INTEN_WAKEUP_IE_Msk 127 #define USBD_INTSTS_WAKEUP USBD_INTSTS_WKEUP_STS_Msk 128 #define USBD_INTSTS_FLDET USBD_INTSTS_FLD_STS_Msk 129 #define USBD_INTSTS_BUS USBD_INTSTS_BUS_STS_Msk 130 #define USBD_INTSTS_USB USBD_INTSTS_USB_STS_Msk 131 #define USBD_INTSTS_SETUP USBD_INTSTS_SETUP_Msk 132 #define USBD_INTSTS_EP0 USBD_INTSTS_EPEVT0_Msk 133 #define USBD_INTSTS_EP1 USBD_INTSTS_EPEVT1_Msk 134 #define USBD_INTSTS_EP2 USBD_INTSTS_EPEVT2_Msk 135 #define USBD_INTSTS_EP3 USBD_INTSTS_EPEVT3_Msk 136 #define USBD_INTSTS_EP4 USBD_INTSTS_EPEVT4_Msk 137 #define USBD_INTSTS_EP5 USBD_INTSTS_EPEVT5_Msk 138 #define USBD_INTSTS_EP6 USBD_INTSTS_EPEVT6_Msk 139 #define USBD_INTSTS_EP7 USBD_INTSTS_EPEVT7_Msk 141 #define USBD_STATE_USBRST USBD_BUSSTS_USBRST_Msk 142 #define USBD_STATE_SUSPEND USBD_BUSSTS_SUSPEND_Msk 143 #define USBD_STATE_RESUME USBD_BUSSTS_RESUME_Msk 144 #define USBD_STATE_TIMEOUT USBD_BUSSTS_TIMEOUT_Msk 146 #define USBD_CFG_SSTALL USBD_CFG_SSTALL_Msk 147 #define USBD_CFG_CSTALL USBD_CFG_CSTALL_Msk 149 #define USBD_CFG_EPMODE_DISABLE (0ul << USBD_CFG_EPMODE_Pos) 150 #define USBD_CFG_EPMODE_OUT (1ul << USBD_CFG_EPMODE_Pos) 151 #define USBD_CFG_EPMODE_IN (2ul << USBD_CFG_EPMODE_Pos) 152 #define USBD_CFG_TYPE_ISO (1ul << USBD_CFG_ISOCH_Pos) 172 #define Maximum(a,b) ((a)>(b) ? (a) : (b)) 185 #define Minimum(a,b) ((a)<(b) ? (a) : (b)) 192 #define USBD_ENABLE_USB() ((uint32_t)(USBD->CTL |= 0xF)) 199 #define USBD_DISABLE_USB() ((uint32_t)(USBD->CTL &= ~USBD_USB_EN)) 206 #define USBD_ENABLE_PHY() ((uint32_t)(USBD->CTL |= USBD_PHY_EN)) 213 #define USBD_DISABLE_PHY() ((uint32_t)(USBD->CTL &= ~USBD_PHY_EN)) 220 #define USBD_SET_SE0() ((uint32_t)(USBD->CTL |= USBD_DRVSE0)) 227 #define USBD_CLR_SE0() ((uint32_t)(USBD->CTL &= ~USBD_DRVSE0)) 234 #define USBD_SET_ADDR(addr) (USBD->FADDR = (addr)) 241 #define USBD_GET_ADDR() ((uint32_t)(USBD->FADDR)) 248 #define USBD_ENABLE_INT(intr) (USBD->INTEN |= (intr)) 255 #define USBD_GET_INT_FLAG() ((uint32_t)(USBD->INTSTS)) 262 #define USBD_CLR_INT_FLAG(flag) (USBD->INTSTS = flag) 269 #define USBD_GET_EP_FLAG() ((uint32_t)(USBD->EPSTS)) 276 #define USBD_GET_BUS_STATE() ((uint32_t)(USBD->BUSSTS & 0xf)) 283 #define USBD_IS_ATTACHED() ((uint32_t)(USBD->BUSSTS & USBD_BUSSTS_FLDET_Msk)) 290 #define USBD_STOP_TRANSACTION(ep) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].CFG + (uint32_t)((ep) << 4))) |= USBD_CFG_CLRRDY_Msk) 297 #define USBD_SET_DATA1(ep) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].CFG + (uint32_t)((ep) << 4))) |= USBD_CFG_DSQ_SYNC_Msk) 304 #define USBD_SET_DATA0(ep) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].CFG + (uint32_t)((ep) << 4))) &= (~USBD_CFG_DSQ_SYNC_Msk)) 312 #define USBD_SET_PAYLOAD_LEN(ep, size) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].MXPLD + (uint32_t)((ep) << 4))) = (size)) 319 #define USBD_GET_PAYLOAD_LEN(ep) ((uint32_t)*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].MXPLD + (uint32_t)((ep) << 4)))) 327 #define USBD_CONFIG_EP(ep, config) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].CFG + (uint32_t)((ep) << 4))) = (config)) 335 #define USBD_SET_EP_BUF_ADDR(ep, offset) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].BUFSEG + (uint32_t)((ep) << 4))) = (offset)) 342 #define USBD_GET_EP_BUF_ADDR(ep) ((uint32_t)*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].BUFSEG + (uint32_t)((ep) << 4)))) 354 #define USBD_SET_EP_STALL(ep) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].CFG + (uint32_t)((ep) << 4))) |= USBD_CFG_SSTALL_Msk) 365 #define USBD_CLR_EP_STALL(ep) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].CFG + (uint32_t)((ep) << 4))) &= ~USBD_CFG_SSTALL_Msk) 378 #define USBD_GET_EP_STALL(ep) (*((__IO uint32_t *) ((uint32_t)&USBD->EP[0].CFG + (uint32_t)((ep) << 4))) & USBD_CFG_SSTALL_Msk) 394 static __INLINE
void USBD_MemCopy(uint8_t *dest, uint8_t *src, int32_t size)
396 while (size--) *dest++ = *src++;
416 u32CfgAddr = (uint32_t)(i << 4) + (uint32_t)&
USBD->EP[0].CFG;
417 u32Cfg = *((__IO uint32_t *) (u32CfgAddr));
419 if((u32Cfg & 0xf) == epnum)
443 u32CfgAddr = (uint32_t)(i << 4) + (uint32_t)&
USBD->EP[0].CFG;
444 u32Cfg = *((__IO uint32_t *) (u32CfgAddr));
446 if((u32Cfg & 0xf) == epnum)
471 u32CfgAddr = (uint32_t)(i << 4) + (uint32_t)&
USBD->EP[0].CFG;
472 u32Cfg = *((__IO uint32_t *) (u32CfgAddr));
474 if((u32Cfg & 0xf) == epnum)
void USBD_StandardRequest(void)
Process USB standard request.
void(* SET_INTERFACE_REQ)(uint32_t u32AltInterface)
#define USBD
Pointer to USBD register structure.
void USBD_Start(void)
USBD Start.
static __INLINE void USBD_ClearStall(uint8_t epnum)
Clear USB endpoint stall state.
void USBD_PrepareCtrlIn(uint8_t *pu8Buf, uint32_t u32Size)
Prepare Control IN transaction.
void USBD_SetConfigCallback(SET_CONFIG_CB pfnSetConfigCallback)
The callback function which called when get SET CONFIGURATION request.
void USBD_Open(S_USBD_INFO_T *param, CLASS_REQ pfnClassReq, SET_INTERFACE_REQ pfnSetInterface)
USBD Initial, Enable clock and reset USB.
volatile uint8_t g_usbd_RemoteWakeupEn
void USBD_SwReset(void)
Clear all software flags.
uint32_t * gu32HidReportSize
uint8_t ** gu8HidReportDesc
static __INLINE void USBD_SetStall(uint8_t epnum)
Set USB endpoint stall state.
void USBD_GetSetupPacket(uint8_t *buf)
Get Setup Packet.
void USBD_CtrlOut(void)
Start Control OUT transfer.
static __INLINE uint32_t USBD_GetStall(uint8_t epnum)
Get USB endpoint stall state.
struct s_usbd_info S_USBD_INFO_T
void USBD_LockEpStall(uint32_t u32EpBitmap)
void USBD_CtrlIn(void)
Start Control IN transfer.
void USBD_ProcessSetupPacket(void)
Process Setup Packet.
void USBD_SetVendorRequest(VENDOR_REQ pfnVendorReq)
USBD Set Vendor Request.
void(* SET_CONFIG_CB)(void)
uint32_t * gu32ConfigHidDescIdx
void USBD_PrepareCtrlOut(uint8_t *pu8Buf, uint32_t u32Size)
Prepare Control OUT transaction.
static __INLINE void USBD_MemCopy(uint8_t *dest, uint8_t *src, int32_t size)
To support byte access between USB SRAM and system SRAM.