Nano100BN Series BSP  V3.03.002
The Board Support Package for Nano100BN Series
Data Fields
INTR_T Struct Reference

#include <Nano100Series.h>

Data Fields

__I uint32_t IRQSRC [32]
 
__IO uint32_t NMI_SEL
 
__IO uint32_t MCU_IRQ
 

Detailed Description

@addtogroup INT Interrupt Controller (INTR)
Memory Mapped Structure for INT Controller

Definition at line 4982 of file Nano100Series.h.

Field Documentation

◆ IRQSRC

__I uint32_t INTR_T::IRQSRC[32]

IRQ0SRC ~ IRQ31SRC

Offset: 0x00 ~0x7C IRQ0~IRQ31 Interrupt Source Identity

Bits Field Descriptions
[3:0] INT_SRC Interrupt Source
Define the interrupt sources for interrupt event.

Definition at line 4996 of file Nano100Series.h.

◆ MCU_IRQ

__IO uint32_t INTR_T::MCU_IRQ

MCU_IRQ

Offset: 0x84 MCU IRQ Number Identity Register

Bits Field Descriptions
[31:0] MCU_IRQ MCU IRQ Source Register
The IRQ collects all the interrupts from the peripherals and generates the synchronous interrupt to Cortex-M0 core.
There are two modes to generate interrupt to Cortex-M0 - the normal mode and test mode.
In Normal mode (control by NMI_SEL register bit [7] = 0) The MCU_IRQ collects all interrupts from each peripheral
and synchronizes them and then interrupts the Cortex-M0.
In Test mode, all the interrupts from peripheral are blocked, and the interrupts sent to
MCU are replaced by set the bit31~bit0.
When the IRQ[n] is 0, setting IRQ[n] to 1 will generate an interrupt to Cortex-M0 NVIC[n].
When the IRQ[n] is 1 (mean an interrupt is assert), setting 1 to the MCU_bit[n] will clear the interrupt and setting IRQ[n] 0 has no effect.

Definition at line 5028 of file Nano100Series.h.

◆ NMI_SEL

__IO uint32_t INTR_T::NMI_SEL

NMI_SEL

Offset: 0x80 NMI Source Interrupt Select Control Register

Bits Field Descriptions
[4:0] NMI_SEL The NMI interrupt to Cortex-M0 can be selected from one of the interrupt[31:0]
The NMI_SEL bit[4:0] used to select the NMI interrupt source

Definition at line 5009 of file Nano100Series.h.


The documentation for this struct was generated from the following file: