Nano100BN Series BSP  V3.03.002
The Board Support Package for Nano100BN Series
adc.c
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1 /**************************************************************************/
12 #include "Nano100Series.h"
13 
41 void ADC_Open(ADC_T *adc,
42  uint32_t u32InputMode,
43  uint32_t u32OpMode,
44  uint32_t u32ChMask)
45 {
46 
47  ADC->CR = (ADC->CR & ~ADC_CR_DIFF_Msk) | u32InputMode;
48  ADC->CR = (ADC->CR & ~ADC_CR_ADMD_Msk) | u32OpMode;
49  ADC->CR = (ADC->CR & ~ADC_CR_REFSEL_Msk);
50  ADC->CHEN = u32ChMask;
51  return;
52 }
53 
59 void ADC_Close(ADC_T *adc)
60 {
61  SYS->IPRST_CTL2 |= SYS_IPRST_CTL2_ADC_RST_Msk;
62  SYS->IPRST_CTL2 &= ~SYS_IPRST_CTL2_ADC_RST_Msk;
63  return;
64 
65 }
66 
81  uint32_t u32Source,
82  uint32_t u32Param)
83 {
85  ADC->CR |= u32Source | u32Param | ADC_CR_TRGE_Msk;
86  return;
87 }
88 
95 {
97  return;
98 }
99 
108  uint32_t u32Source,
109  uint32_t u32PDMACnt)
110 {
112  ADC->CR |= (u32PDMACnt << ADC_CR_TMPDMACNT_Pos) | (u32Source << ADC_CR_TMSEL_Pos) | ADC_CR_TMTRGMOD_Msk;
113 
114  return;
115 }
116 
123 {
124  ADC->CR &= ~ADC_CR_TMTRGMOD_Msk;
125 
126  return;
127 }
128 
137  uint32_t u32ChNum,
138  uint32_t u32SampleTime)
139 {
140 
141  if (u32ChNum < 8)
142  ADC->SMPLCNT0 = (ADC->SMPLCNT0 & ~(ADC_SMPLCNT0_CH0SAMPCNT_Msk << (u32ChNum * 4))) | (u32SampleTime << (u32ChNum * 4));
143  else if (u32ChNum < 12)
144  ADC->SMPLCNT1 = (ADC->SMPLCNT1 & ~(ADC_SMPLCNT1_CH8SAMPCNT_Msk << ((u32ChNum - 8) * 4))) | (u32SampleTime << ((u32ChNum - 8 ) * 4));
145  else
146  ADC->SMPLCNT1 = (ADC->SMPLCNT1 & ~ADC_SMPLCNT1_INTCHSAMPCNT_Msk) | (u32SampleTime << ADC_SMPLCNT1_INTCHSAMPCNT_Pos);
147 }
148 
160 void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
161 {
162  if(u32Mask & ADC_ADF_INT)
163  ADC->CR |= ADC_CR_ADIE_Msk;
164  if(u32Mask & ADC_CMP0_INT)
165  ADC->CMPR0 |= ADC_CMPR_CMPIE_Msk;
166  if(u32Mask & ADC_CMP1_INT)
167  ADC->CMPR1 |= ADC_CMPR_CMPIE_Msk;
168 
169  return;
170 }
171 
183 void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
184 {
185  if(u32Mask & ADC_ADF_INT)
186  ADC->CR &= ~ADC_CR_ADIE_Msk;
187  if(u32Mask & ADC_CMP0_INT)
188  ADC->CMPR0 &= ~ADC_CMPR_CMPIE_Msk;
189  if(u32Mask & ADC_CMP1_INT)
190  ADC->CMPR1 &= ~ADC_CMPR_CMPIE_Msk;
191 
192  return;
193 }
194 
195 
196  /* end of group NANO100_ADC_EXPORTED_FUNCTIONS */
198  /* end of group NANO100_ADC_Driver */
200  /* end of group NANO100_Device_Driver */
202 
203 /*** (C) COPYRIGHT 2013-2014 Nuvoton Technology Corp. ***/
#define ADC_SMPLCNT1_CH8SAMPCNT_Msk
#define ADC_ADF_INT
Definition: adc.h:60
void ADC_EnableTimerTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32PDMACnt)
Config and enable timer trigger.
Definition: adc.c:107
#define ADC_CR_TRGS_Msk
void ADC_Close(ADC_T *adc)
Disable ADC module.
Definition: adc.c:59
#define ADC_CR_ADIE_Msk
#define ADC_CR_TRGE_Msk
#define ADC_SMPLCNT1_INTCHSAMPCNT_Pos
void ADC_Open(ADC_T *adc, uint32_t u32InputMode, uint32_t u32OpMode, uint32_t u32ChMask)
This API configures ADC module to be ready for convert the input from selected channel.
Definition: adc.c:41
void ADC_DisableHWTrigger(ADC_T *adc)
Disable hardware trigger ADC function.
Definition: adc.c:94
#define ADC_CR_TRGCOND_Msk
#define ADC_SMPLCNT1_INTCHSAMPCNT_Msk
Nano100 series peripheral access layer header file. This file contains all the peripheral register's ...
#define ADC_CR_TMPDMACNT_Msk
void ADC_DisableTimerTrigger(ADC_T *adc)
Disable timer trigger ADC function.
Definition: adc.c:122
#define ADC_CR_REFSEL_Msk
#define SYS_IPRST_CTL2_ADC_RST_Msk
#define ADC_CR_TMPDMACNT_Pos
#define ADC_CR_DIFF_Msk
#define ADC_CMP1_INT
Definition: adc.h:62
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
Enable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:160
#define ADC_CR_TMSEL_Msk
#define ADC_CR_ADMD_Msk
#define ADC_CMPR_CMPIE_Msk
#define ADC
Pointer to ADC register structure.
#define ADC_CR_TMTRGMOD_Msk
#define ADC_SMPLCNT0_CH0SAMPCNT_Msk
#define ADC_CR_TMSEL_Pos
void ADC_EnableHWTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32Param)
Configure the hardware trigger condition and enable hardware trigger.
Definition: adc.c:80
void ADC_SetExtraSampleTime(ADC_T *adc, uint32_t u32ChNum, uint32_t u32SampleTime)
Configure the extended sampling time.
Definition: adc.c:136
#define ADC_CMP0_INT
Definition: adc.h:61
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
Disable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:183
#define SYS
Pointer to SYS register structure.