Nano100BN Series BSP  V3.03.002
The Board Support Package for Nano100BN Series
Data Fields
USBD_EP_T Struct Reference

USBD endpoints register. More...

#include <Nano100Series.h>

Data Fields

__IO uint32_t BUFSEG
 
__IO uint32_t MXPLD
 
__IO uint32_t CFG
 
uint32_t RESERVE
 

Detailed Description

USBD endpoints register.

@addtogroup USBD USB Device Controller(USBD)
Memory Mapped Structure for USBD Controller

Definition at line 10839 of file Nano100Series.h.

Field Documentation

◆ BUFSEG

__IO uint32_t USBD_EP_T::BUFSEG

BUFSEGx

Offset: 0x20+x*0x10 Endpoint x Buffer Segmentation Register

Bits Field Descriptions
[8:3] BUFSEG It Is Used To Define The Offset Address For Each Endpoint With The USB SRAM Starting Address Its physical address is USB_SRAM address + {BUFSEG[5:0], 000}; where the USB_SRAM = USB_BASE + 0x100h.
Refer to the section 5.4.3.3 for the endpoint SRAM structure and its description.

Definition at line 10853 of file Nano100Series.h.

◆ CFG

__IO uint32_t USBD_EP_T::CFG

CFGx

Offset: 0x28+x*0x10 Endpoint x Configuration Register

Bits Field Descriptions
[3:0] EP_NUM Endpoint Number
These bits are used to define the endpoint number of the current endpoint
[4] ISOCH Isochronous Endpoint
This bit is used to set the endpoint as Isochronous endpoint, no handshake.
[6:5] EPMODE Endpoint Mode
00 = Endpoint is disabled.
01 = Out endpoint.
10 = IN endpoint.
11 = Undefined.
[7] DSQ_SYNC Data Sequence Synchronization
0 = DATA0 PID.
1 = DATA1 PID.
It is used to specify the DATA0 or DATA1 PID in the current transaction.
It will toggle automatically in IN token after host response ACK.
In the other tokens, the user shall take care of it to confirm the right PID in its transaction.
[8] CSTALL Clear STALL Response
0 = Disable the device to clear the STALL handshake in setup stage.
1 = Clear the device to response STALL handshake in setup stage.
[9] SSTALL Set STALL Response
0 = Disable the device to response STALL.
1 = Set the device to respond STALL automatically.
[15] CLRRDY Clear Ready
When the USBD_MXPLDx register is set by user, it means that the endpoint is ready to transmit or receive data.
If the user wants to disable this transaction before the transaction start, users can set this bit to 1 to disable it and it is auto clear to 0.
For IN token, write '1' to clear the IN token had ready to transmit the data to USB.
For OUT token, write '1' to clear the OUT token had ready to receive the data from USB.
This bit is write 1 only and is always 0 when it is read back.

Definition at line 10910 of file Nano100Series.h.

◆ MXPLD

__IO uint32_t USBD_EP_T::MXPLD

MXPLDx

Offset: 0x24+x*0x10 Endpoint x Maximal Payload Register

Bits Field Descriptions
[8:0] MXPLD Maximal Payload
It is used to define the length of data which is transmitted to host (IN token) or the actual length of data receiving from host (OUT token).
It also used to indicate that the endpoint is ready to be transmitted in IN token or received in OUT token.
(1). When the register is written by CPU,
For IN token, the value of MXPLD is used to define the length of data to be transmitted and indicate the data buffer is ready.
For OUT token, it means that the controller is ready to receive data from host and the value of MXPLD is the maximal data length comes from host.
(2). When the register is read by CPU,
For IN token, the value of MXPLD is indicated the length of data be transmitted to host
For OUT token, the value of MXPLD is indicated the actual length of data receiving from host.
Note: Once MXPLD is written, the data packets will be transmitted/received immediately after IN/OUT token arrived.

Definition at line 10873 of file Nano100Series.h.

◆ RESERVE

uint32_t USBD_EP_T::RESERVE

Definition at line 10911 of file Nano100Series.h.


The documentation for this struct was generated from the following file: