| Nano102_112 Series BSP V3.03.002 The Board Support Package for Nano102_112 Series

sc.c
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1 /**************************************************************************/
12 #include "Nano1X2Series.h"
13
14 // Below are variables used locally by SC driver and does not want to parse by Doxygen unless HIDDEN_SYMBOLS is defined
16 static uint32_t u32CardStateIgnore[SC_INTERFACE_NUM] = {0, 0};
17
19
40 uint32_t SC_IsCardInserted(SC_T *sc)
41 {
42 // put conditions into two variable to remove IAR compilation warning
43 uint32_t cond1 = ((sc->PINCSR & SC_PINCSR_CD_PIN_ST_Msk) >> SC_PINCSR_CD_PIN_ST_Pos);
44 uint32_t cond2 = ((sc->PINCSR & SC_PINCSR_CD_LEV_Msk) >> SC_PINCSR_CD_LEV_Pos);
45
46 if(sc == SC0 && u32CardStateIgnore[0] == 1)
47 return TRUE;
48 else if(sc == SC1 && u32CardStateIgnore[1] == 1)
49 return TRUE;
50 else if(cond1 != cond2)
51 return FALSE;
52 else
53 return TRUE;
54 }
55
61 void SC_ClearFIFO(SC_T *sc)
62 {
63 sc->ALTCTL |= (SC_ALTCTL_TX_RST_Msk | SC_ALTCTL_RX_RST_Msk);
64 }
65
71 void SC_Close(SC_T *sc)
72 {
73 sc->IER = 0;
74 sc->PINCSR = 0;
75 sc->ALTCTL = 0;
76 sc->CTL = 0;
77 }
78
91 void SC_Open(SC_T *sc, uint32_t u32CD, uint32_t u32PWR)
92 {
93 uint32_t u32Reg = 0, u32Intf;
94
95 if(sc == SC0)
96 u32Intf = 0;
97 else
98 u32Intf = 1;
99
100 if(u32CD != SC_PIN_STATE_IGNORE)
101 {
102 u32Reg = u32CD ? 0: SC_PINCSR_CD_LEV_Msk;
103 u32CardStateIgnore[u32Intf] = 0;
104 }
105 else
106 {
107 u32CardStateIgnore[u32Intf] = 1;
108 }
109 u32Reg |= u32PWR ? 0 : SC_PINCSR_POW_INV_Msk;
110 sc->PINCSR = u32Reg;
111 sc->CTL = SC_CTL_SC_CEN_Msk;
112 }
113
119 void SC_ResetReader(SC_T *sc)
120 {
121 uint32_t u32Intf;
122
123 if(sc == SC0)
124 u32Intf = 0;
125 else
126 u32Intf = 1;
127
128 // Reset FIFO
129 sc->ALTCTL |= (SC_ALTCTL_TX_RST_Msk | SC_ALTCTL_RX_RST_Msk);
130 // Set Rx trigger level to 1 character, longest card detect debounce period, disable error retry (EMV ATR does not use error retry)
131 sc->CTL &= ~(SC_CTL_RX_FTRI_LEV_Msk |
132 SC_CTL_CD_DEB_SEL_Msk |
133 SC_CTL_TX_ERETRY_Msk |
134 SC_CTL_TX_ERETRY_EN_Msk |
135 SC_CTL_RX_ERETRY_Msk |
136 SC_CTL_RX_ERETRY_EN_Msk);
137 // Enable auto convention, and all three smartcard internal timers
138 sc->CTL |= SC_CTL_AUTO_CON_EN_Msk | SC_CTL_TMR_SEL_Msk;
139 // Disable Rx timeout
140 sc->RFTMR = 0;
141 // 372 clocks per ETU by default
142 sc->ETUCR = 371;
143 // Enable auto de-activation while card removal
144 sc->PINCSR |= SC_PINCSR_ADAC_CD_EN_Msk;
145
146 /* Enable necessary interrupt for smartcard operation */
147 if(u32CardStateIgnore[u32Intf]) // Do not enable card detect interrupt if card present state ignore
148 sc->IER = (SC_IER_RDA_IE_Msk |
149 SC_IER_TERR_IE_Msk |
150 SC_IER_TMR0_IE_Msk |
151 SC_IER_TMR1_IE_Msk |
152 SC_IER_TMR2_IE_Msk |
153 SC_IER_BGT_IE_Msk |
154 SC_IER_ACON_ERR_IE_Msk);
155 else
156 sc->IER = (SC_IER_RDA_IE_Msk |
157 SC_IER_TERR_IE_Msk |
158 SC_IER_TMR0_IE_Msk |
159 SC_IER_TMR1_IE_Msk |
160 SC_IER_TMR2_IE_Msk |
161 SC_IER_BGT_IE_Msk |
162 SC_IER_CD_IE_Msk |
163 SC_IER_ACON_ERR_IE_Msk);
164
165 return;
166 }
167
174 void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
175 {
176 sc->CTL = (sc->CTL & ~SC_CTL_BGT_Msk) | ((u32BGT - 1) << SC_CTL_BGT_Pos);
177 }
178
185 void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
186 {
187 u32CGT -= sc->CTL & SC_CTL_SLEN_Msk ? 11: 12;
188 sc->EGTR = u32CGT;
189 }
190
197 void SC_StopAllTimer(SC_T *sc)
198 {
199 sc->ALTCTL &= ~(SC_ALTCTL_TMR0_SEN_Msk | SC_ALTCTL_TMR1_SEN_Msk | SC_ALTCTL_TMR2_SEN_Msk);
200 }
201
223 void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
224 {
225 uint32_t reg = u32Mode | (SC_TMR0_CNT_Msk & (u32ETUCount - 1));
226
227 if(u32TimerNum == 0)
228 {
229 sc->TMR0 = reg;
230 sc->ALTCTL |= SC_ALTCTL_TMR0_SEN_Msk;
231 }
232 else if(u32TimerNum == 1)
233 {
234 sc->TMR1 = reg;
235 sc->ALTCTL |= SC_ALTCTL_TMR1_SEN_Msk;
236 }
237 else // timer 2
238 {
239 sc->TMR2 = reg;
240 sc->ALTCTL |= SC_ALTCTL_TMR2_SEN_Msk;
241 }
242 }
243
251 void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
252 {
253 if(u32TimerNum == 0)
254 sc->ALTCTL &= ~SC_ALTCTL_TMR0_SEN_Msk;
255 else if(u32TimerNum == 1)
256 sc->ALTCTL &= ~SC_ALTCTL_TMR1_SEN_Msk;
257 else // timer 2
258 sc->ALTCTL &= ~SC_ALTCTL_TMR2_SEN_Msk;
259 }
260
261
262 /* end of group NANO1X2_SC_EXPORTED_FUNCTIONS */
264 /* end of group NANO1X2_SC_Driver */
266 /* end of group NANO1X2_Device_Driver */
268
269 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
SC0
#define SC0
Pointer to SC0 register structure.
Definition: Nano1X2Series.h:10646
SC_PINCSR_CD_LEV_Msk
#define SC_PINCSR_CD_LEV_Msk
Definition: Nano1X2Series.h:8403
SC_Open
void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR)
This function initialized smartcard module.
Definition: sc.c:91
SC_T::ETUCR
__IO uint32_t ETUCR
Definition: Nano1X2Series.h:7796
SC_T
Definition: Nano1X2Series.h:7543
SC_PIN_STATE_IGNORE
#define SC_PIN_STATE_IGNORE
Definition: sc.h:35
SC_ALTCTL_TMR2_SEN_Msk
#define SC_ALTCTL_TMR2_SEN_Msk
Definition: Nano1X2Series.h:8229
SC_CTL_SLEN_Msk
#define SC_CTL_SLEN_Msk
Definition: Nano1X2Series.h:8190
SC_IER_TERR_IE_Msk
#define SC_IER_TERR_IE_Msk
Definition: Nano1X2Series.h:8265
SC_T::TMR1
__IO uint32_t TMR1
Definition: Nano1X2Series.h:8083
SC_T::ALTCTL
__IO uint32_t ALTCTL
Definition: Nano1X2Series.h:7748
SC_IER_ACON_ERR_IE_Msk
#define SC_IER_ACON_ERR_IE_Msk
Definition: Nano1X2Series.h:8289
SC_IER_CD_IE_Msk
#define SC_IER_CD_IE_Msk
Definition: Nano1X2Series.h:8280
SC_INTERFACE_NUM
#define SC_INTERFACE_NUM
Definition: sc.h:32
SC_IER_TMR0_IE_Msk
#define SC_IER_TMR0_IE_Msk
Definition: Nano1X2Series.h:8268
SC_IsCardInserted
uint32_t SC_IsCardInserted(SC_T *sc)
This function indicates specified smartcard slot status.
Definition: sc.c:40
SC_PINCSR_CD_LEV_Pos
#define SC_PINCSR_CD_LEV_Pos
Definition: Nano1X2Series.h:8402
SC_T::EGTR
__IO uint32_t EGTR
Definition: Nano1X2Series.h:7761
SC_ResetReader
void SC_ResetReader(SC_T *sc)
This function reset specified smartcard module to its default state for activate smartcard.
Definition: sc.c:119
SC_IER_RDA_IE_Msk
#define SC_IER_RDA_IE_Msk
Definition: Nano1X2Series.h:8259
SC_CTL_BGT_Pos
#define SC_CTL_BGT_Pos
Definition: Nano1X2Series.h:8183
SC_CTL_TMR_SEL_Msk
#define SC_CTL_TMR_SEL_Msk
Definition: Nano1X2Series.h:8187
SC_Close
void SC_Close(SC_T *sc)
This function disable specified smartcard module.
Definition: sc.c:71
SC_CTL_AUTO_CON_EN_Msk
#define SC_CTL_AUTO_CON_EN_Msk
Definition: Nano1X2Series.h:8175
TRUE
#define TRUE
Boolean true, define to use in API parameters or return value.
Definition: Nano1X2Series.h:10815
SC_ALTCTL_TMR0_SEN_Msk
#define SC_ALTCTL_TMR0_SEN_Msk
Definition: Nano1X2Series.h:8223
SC_IER_BGT_IE_Msk
#define SC_IER_BGT_IE_Msk
Definition: Nano1X2Series.h:8277
SC_CTL_RX_FTRI_LEV_Msk
#define SC_CTL_RX_FTRI_LEV_Msk
Definition: Nano1X2Series.h:8181
SC_StartTimer
void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
This function configure and start a smartcard timer of specified smartcard module.
Definition: sc.c:223
SC_SetCharGuardTime
void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
This function character guard time (CGT) of specified smartcard module.
Definition: sc.c:185
SC_CTL_BGT_Msk
#define SC_CTL_BGT_Msk
Definition: Nano1X2Series.h:8184
Nano1X2Series.h
Nano102/112 peripheral access layer header file. This file contains all the peripheral register's def...
SC_CTL_RX_ERETRY_Msk
#define SC_CTL_RX_ERETRY_Msk
Definition: Nano1X2Series.h:8193
SC_StopTimer
void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
This function stop a smartcard timer of specified smartcard module.
Definition: sc.c:251
SC_IER_TMR2_IE_Msk
#define SC_IER_TMR2_IE_Msk
Definition: Nano1X2Series.h:8274
SC_PINCSR_CD_PIN_ST_Msk
#define SC_PINCSR_CD_PIN_ST_Msk
Definition: Nano1X2Series.h:8388
SC1
#define SC1
Pointer to SC1 register structure.
Definition: Nano1X2Series.h:10647
SC_ClearFIFO
void SC_ClearFIFO(SC_T *sc)
This function reset both transmit and receive FIFO of specified smartcard module.
Definition: sc.c:61
SC_CTL_RX_ERETRY_EN_Msk
#define SC_CTL_RX_ERETRY_EN_Msk
Definition: Nano1X2Series.h:8196
SC_StopAllTimer
void SC_StopAllTimer(SC_T *sc)
This function stop all smartcard timer of specified smartcard module.
Definition: sc.c:197
SC_SetBlockGuardTime
void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
This function block guard time (BGT) of specified smartcard module.
Definition: sc.c:174
SC_ALTCTL_TMR1_SEN_Msk
#define SC_ALTCTL_TMR1_SEN_Msk
Definition: Nano1X2Series.h:8226
FALSE
#define FALSE
Boolean false, define to use in API parameters or return value.
Definition: Nano1X2Series.h:10816
SC_T::TMR0
__IO uint32_t TMR0
Definition: Nano1X2Series.h:8069
SC_CTL_SC_CEN_Msk
#define SC_CTL_SC_CEN_Msk
Definition: Nano1X2Series.h:8166
SC_CTL_TX_ERETRY_EN_Msk
#define SC_CTL_TX_ERETRY_EN_Msk
Definition: Nano1X2Series.h:8202
SC_PINCSR_POW_INV_Msk
#define SC_PINCSR_POW_INV_Msk
Definition: Nano1X2Series.h:8406
SC_T::TMR2
__IO uint32_t TMR2
Definition: Nano1X2Series.h:8097
SC_ALTCTL_RX_RST_Msk
#define SC_ALTCTL_RX_RST_Msk
Definition: Nano1X2Series.h:8211
SC_T::RFTMR
__IO uint32_t RFTMR
Definition: Nano1X2Series.h:7776
SC_CTL_CD_DEB_SEL_Msk
#define SC_CTL_CD_DEB_SEL_Msk
Definition: Nano1X2Series.h:8205
SC_PINCSR_ADAC_CD_EN_Msk
#define SC_PINCSR_ADAC_CD_EN_Msk
Definition: Nano1X2Series.h:8394
SC_CTL_TX_ERETRY_Msk
#define SC_CTL_TX_ERETRY_Msk
Definition: Nano1X2Series.h:8199
SC_IER_TMR1_IE_Msk
#define SC_IER_TMR1_IE_Msk
Definition: Nano1X2Series.h:8271
SC_ALTCTL_TX_RST_Msk
#define SC_ALTCTL_TX_RST_Msk
Definition: Nano1X2Series.h:8208
SC_T::PINCSR
__IO uint32_t PINCSR
Definition: Nano1X2Series.h:8055
SC_T::CTL
__IO uint32_t CTL
Definition: Nano1X2Series.h:7658
SC_TMR0_CNT_Msk
#define SC_TMR0_CNT_Msk
Definition: Nano1X2Series.h:8412
SC_T::IER
__IO uint32_t IER
Definition: Nano1X2Series.h:7852
SC_PINCSR_CD_PIN_ST_Pos
#define SC_PINCSR_CD_PIN_ST_Pos
Definition: Nano1X2Series.h:8387