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Nano102_112 Series BSP
V3.03.002
The Board Support Package for Nano102_112 Series
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#include <Nano1X2Series.h>
Data Fields | |
| __IO uint32_t | DBNCECON |
Definition at line 4651 of file Nano1X2Series.h.
| __IO uint32_t GP_DB_T::DBNCECON |
| Bits | Field | Descriptions |
|---|---|---|
| [3:0] | DBCLKSEL | De-Bounce Sampling Cycle Selection |
| 0000 = Sample interrupt input once per 1 clock. | ||
| 0001 = Sample interrupt input once per 2 clocks. | ||
| 0010 = Sample interrupt input once per 4 clocks. | ||
| 0011 = Sample interrupt input once per 8 clocks. | ||
| 0100 = Sample interrupt input once per 16 clocks. | ||
| 0101 = Sample interrupt input once per 32 clocks. | ||
| 0110 = Sample interrupt input once per 64 clocks. | ||
| 0111 = Sample interrupt input once per 128 clocks. | ||
| 1000 = Sample interrupt input once per 256 clocks. | ||
| 1001 = Sample interrupt input once per 2*256 clocks. | ||
| 1010 = Sample interrupt input once per 4*256clocks. | ||
| 1011 = Sample interrupt input once per 8*256 clocks. | ||
| 1100 = Sample interrupt input once per 16*256 clocks. | ||
| 1101 = Sample interrupt input once per 32*256 clocks. | ||
| 1110 = Sample interrupt input once per 64*256 clocks. | ||
| 1111 = Sample interrupt input once per 128*256 clocks. | ||
| [4] | DBCLKSRC | De-Bounce Counter Clock Source Selection |
| 0 = De-bounce counter Clock Source is the HCLK. | ||
| 1 = De-bounce counter Clock Source is the internal 10 kHz clock. | ||
| [5] | DBCLK_ON | De-Bounce Clock Enable Control |
| This bit controls if the de-bounce clock is enabled. | ||
| However, if GPI/O pin's interrupt is enabled, the de-bounce clock will be enabled automatically no matter what the DBCLK_ON value is. | ||
| If CPU is in sleep mode, this bit didn't take effect. | ||
| And only the GPI/O pin with interrupt enable could get de-bounce clock. | ||
| 0 = De-bounce clock Disabled. | ||
| 1 = De-bounce clock Enabled. |
Definition at line 4688 of file Nano1X2Series.h.
1.8.15