| Nano103 BSP V3.01.002 The Board Support Package for Nano103 Series

Data Fields
ACMP_T Struct Reference

`#include <Nano103.h>`

## Data Fields
__IO uint32_t | CTL0
__IO uint32_t | STATUS
__IO uint32_t | VREF

## Detailed Description

    @addtogroup ACMP Analog Comparator Controller(ACMP)
    Memory Mapped Structure for ACMP Controller

Definition at line 24621 of file Nano103.h.

## Field Documentation

## ◆ CTL0

ACMP_T::CTL0

[0x0000] Analog Comparator 0 Control Register

CTL0

Offset: 0x00 Analog Comparator 0 Control Register

Bits | Field | Descriptions
[0] | ACMPEN | Comparator Enable Bit 0 = Comparator 0 Disabled. 1 = Comparator 0 Enabled.
[1] | ACMPIE | Comparator Interrupt Enable Bit 0 = Comparator 0 interrupt Disabled. 1 = Comparator 0 interrupt Enabled If WKEN (ACMP_CTL0[31]) is set to 1, the wake-up interrupt function will be enabled as well.
[2] | HYSEN | Comparator Hysteresis Enable Bit 0 = Comparator 0 hysteresis Disabled. 1 = Comparator 0 hysteresis Enabled.
[5:4] | NEGSEL | Comparator Negative Input Selection 00 = ACMP0_N pin. 01 = Internal comparator reference voltage (CRV). 10 = Internal reference voltage (Int_VREF). 11 = AVSS pin.
[31] | WKEN | Power-down Wake-up Enable Bit 0 = Wake-up function Disabled. 1 = Wake-up function Enabled.

Definition at line 24747 of file Nano103.h.

## ◆ STATUS

ACMP_T::STATUS

[0x0004] Analog Comparator Status Register

STATUS

Offset: 0x04 Analog Comparator Status Register

Bits | Field | Descriptions
[0] | ACMPIF | Comparator Interrupt Flag This bit is set by hardware whenever the comparator 0 output changes state This will generate an interrupt if ACMPIE (ACMP_CTL0[1]) is set to 1 Note: Write 1 to clear this bit to 0.
[1] | ACMPO | Comparator Output Synchronized to the PCLK to allow reading by software Cleared when the comparator 0 is disabled, i.e ACMPEN (ACMP_CTL0[0]) is cleared to 0. Note: This bit is read only.

Definition at line 24748 of file Nano103.h.

## ◆ VREF

ACMP_T::VREF

[0x0008] Analog Comparator Reference Voltage Control Register

VREF

Offset: 0x08 Analog Comparator Reference Voltage Control Register

Bits | Field | Descriptions
[3:0] | CRVCTL | Comparator Reference Voltage Setting CRV = CRV source voltage * (1/6+CRVCTL/24).
[4] | CRVEN | CRV Enable Bit 0 = CRV Disabled. 1 = CRV Enabled.
[5] | CRVSSEL | CRV Source Voltage Selection 0 = VDDA is selected as CRV source voltage. 1 = The reference voltage defined by SYS_VREFCTL register is selected as CRV source voltage.

Definition at line 24749 of file Nano103.h.

The documentation for this struct was generated from the following file:

- C:/Users/yachen/workzone/bsp/nano103bsp/Library/Device/Nuvoton/Nano103/Include/Nano103.h