Nano103 BSP  V3.01.002
The Board Support Package for Nano103 Series
scuart.c
Go to the documentation of this file.
1 /**************************************************************************/
12 #include "Nano103.h"
13 
32 void SCUART_Close(SC_T* sc)
33 {
34  sc->INTEN = 0;
35  sc->UARTCTL = 0;
36  sc->CTL = 0;
37 
38 }
39 
41 
46 static uint32_t SCUART_GetClock(SC_T *sc)
47 {
48  uint32_t u32Reg;
49  uint32_t u32Clk;
50 
51 
52  if(sc == (SC_T *)SC0)
53  {
54  u32Reg = (CLK->CLKSEL2 & CLK_CLKSEL2_SC0SEL_Msk) >> CLK_CLKSEL2_SC0SEL_Pos;
55  }
56  else
57  {
58  u32Reg = (CLK->CLKSEL2 & CLK_CLKSEL2_SC1SEL_Msk) >> CLK_CLKSEL2_SC1SEL_Pos;
59  }
60 
62  {
63  u32Clk = __HXT;
64  }
65  else if(u32Reg == (CLK_CLKSEL2_SC0SEL_PLL >> CLK_CLKSEL2_SC0SEL_Pos))
66  {
67  u32Clk = CLK_GetPLLClockFreq();
68  }
69  else if(u32Reg == (CLK_CLKSEL2_SC0SEL_HIRC >> CLK_CLKSEL2_SC0SEL_Pos))
70  {
71  if(CLK->CLKSEL0 & CLK_CLKSEL0_HIRCSEL_Msk)
72  {
73  u32Clk = __HIRC36M;
74  }
75  else
76  {
77  u32Clk = __HIRC12M;
78  }
79  }
80  else if(u32Reg == (CLK_CLKSEL2_SC0SEL_MIRC >> CLK_CLKSEL2_SC0SEL_Pos))
81  {
82  u32Clk = __MIRC;
83  }
84  else
85  u32Clk = SystemCoreClock;
86 
87  if(sc == (SC_T *)SC0)
88  {
89  u32Clk /= (((CLK->CLKDIV0 & CLK_CLKDIV0_SC0DIV_Msk) >> (CLK_CLKDIV0_SC0DIV_Pos)) + 1);
90  }
91  else
92  {
93  u32Clk /= (((CLK->CLKDIV1 & CLK_CLKDIV1_SC1DIV_Msk) >> (CLK_CLKDIV1_SC1DIV_Pos)) + 1);
94  }
95  return u32Clk;
96 }
97 
99 
100 
115 uint32_t SCUART_Open(SC_T* sc, uint32_t u32baudrate)
116 {
117  uint32_t u32Clk = SCUART_GetClock(sc), u32Div;
118 
119  // Calculate divider for target baudrate
120  u32Div = (u32Clk + (u32baudrate >> 1) - 1) / u32baudrate - 1;
121 
122  sc->CTL = SC_CTL_SCEN_Msk | SC_CTL_NSB_Msk; // Enable smartcard interface and stop bit = 1
123  sc->UARTCTL = SCUART_CHAR_LEN_8 | SCUART_PARITY_NONE | SC_UARTCTL_UARTEN_Msk; // Enable UART mode, disable parity and 8 bit per character
124  sc->ETUCTL = u32Div;
125 
126  return(u32Clk / (u32Div + 1));
127 }
128 
137 uint32_t SCUART_Read(SC_T* sc, uint8_t *pu8RxBuf, uint32_t u32ReadBytes)
138 {
139  uint32_t u32Count;
140 
141  for(u32Count = 0; u32Count < u32ReadBytes; u32Count++)
142  {
143  if(SCUART_GET_RX_EMPTY(sc)) // no data available
144  {
145  break;
146  }
147  pu8RxBuf[u32Count] = SCUART_READ(sc); // get data from FIFO
148  }
149 
150  return u32Count;
151 }
152 
177 uint32_t SCUART_SetLineConfig(SC_T* sc, uint32_t u32Baudrate, uint32_t u32DataWidth, uint32_t u32Parity, uint32_t u32StopBits)
178 {
179  uint32_t u32Clk = SCUART_GetClock(sc), u32Div;
180 
181  if(u32Baudrate == 0) // keep original baudrate setting
182  {
183  u32Div = sc->ETUCTL & SC_ETUCTL_ETURDIV_Msk;
184  }
185  else
186  {
187  // Calculate divider for target baudrate
188  u32Div = (u32Clk + (u32Baudrate >> 1) - 1)/ u32Baudrate - 1;
189  sc->ETUCTL = u32Div;
190  }
191 
192  sc->CTL = u32StopBits | SC_CTL_SCEN_Msk; // Set stop bit
193  sc->UARTCTL = u32Parity | u32DataWidth | SC_UARTCTL_UARTEN_Msk; // Set character width and parity
194 
195  return(u32Clk / (u32Div + 1));
196 }
197 
208 void SCUART_SetTimeoutCnt(SC_T* sc, uint32_t u32TOC)
209 {
210  sc->RXTOUT = u32TOC;
211 }
212 
213 
222 void SCUART_Write(SC_T* sc,uint8_t *pu8TxBuf, uint32_t u32WriteBytes)
223 {
224  uint32_t u32Count;
225 
226  for(u32Count = 0; u32Count != u32WriteBytes; u32Count++)
227  {
228  while(SCUART_GET_TX_FULL(sc)); // Wait 'til FIFO not full
229  sc->DAT = pu8TxBuf[u32Count]; // Write 1 byte to FIFO
230  }
231 }
232 
233  /* end of group NANO103_SCUART_EXPORTED_FUNCTIONS */
235  /* end of group NANO103_SCUART_Driver */
237  /* end of group NANO103_Device_Driver */
239 
240 /*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
#define SCUART_CHAR_LEN_8
Definition: scuart.h:35
#define __HXT
#define SCUART_READ(sc)
Read Rx data register.
Definition: scuart.h:120
__IO uint32_t CTL
Definition: Nano103.h:21637
#define CLK_CLKDIV0_SC0DIV_Msk
Definition: Nano103.h:5140
uint32_t SCUART_Read(SC_T *sc, uint8_t *pu8RxBuf, uint32_t u32ReadBytes)
The function is used to read Rx data from RX FIFO.
Definition: scuart.c:137
#define CLK_CLKSEL2_SC0SEL_MIRC
Definition: clk.h:217
uint32_t SystemCoreClock
#define SCUART_GET_RX_EMPTY(sc)
Get RX FIFO empty flag status from register.
Definition: scuart.h:130
void SCUART_SetTimeoutCnt(SC_T *sc, uint32_t u32TOC)
This function use to set receive timeout count.
Definition: scuart.c:208
#define CLK_CLKSEL2_SC1SEL_Msk
Definition: Nano103.h:5119
void SCUART_Write(SC_T *sc, uint8_t *pu8TxBuf, uint32_t u32WriteBytes)
This function is to write data into transmit FIFO to send data out.
Definition: scuart.c:222
uint32_t SCUART_Open(SC_T *sc, uint32_t u32baudrate)
This function use to enable smartcard module UART mode and set baudrate.
Definition: scuart.c:115
#define SC_ETUCTL_ETURDIV_Msk
Definition: Nano103.h:21759
__IO uint32_t ETUCTL
Definition: Nano103.h:21641
#define CLK_CLKSEL2_SC0SEL_PLL
Definition: clk.h:215
__IO uint32_t INTEN
Definition: Nano103.h:21642
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
Definition: clk.c:176
#define SC_UARTCTL_UARTEN_Msk
Definition: Nano103.h:21942
__IO uint32_t DAT
Definition: Nano103.h:21636
#define __MIRC
#define SCUART_GET_TX_FULL(sc)
Get TX FIFO full flag status from register.
Definition: scuart.h:80
#define CLK_CLKSEL2_SC0SEL_HIRC
Definition: clk.h:216
NANO103 peripheral access layer header file. This file contains all the peripheral register's definit...
#define CLK_CLKSEL2_SC1SEL_Pos
Definition: Nano103.h:5118
#define CLK_CLKDIV0_SC0DIV_Pos
Definition: Nano103.h:5139
#define __HIRC36M
#define CLK_CLKSEL0_HIRCSEL_Msk
Definition: Nano103.h:5071
#define SC0
Pointer to SC0 register structure.
Definition: Nano103.h:24879
__IO uint32_t UARTCTL
Definition: Nano103.h:21649
__IO uint32_t RXTOUT
Definition: Nano103.h:21640
void SCUART_Close(SC_T *sc)
The function is used to disable smartcard interface UART mode.
Definition: scuart.c:32
#define CLK_CLKDIV1_SC1DIV_Msk
Definition: Nano103.h:5143
#define __HIRC12M
#define SC_CTL_NSB_Msk
Definition: Nano103.h:21690
#define CLK_CLKDIV1_SC1DIV_Pos
Definition: Nano103.h:5142
#define CLK
Pointer to CLK register structure.
Definition: Nano103.h:24884
#define CLK_CLKSEL2_SC0SEL_Msk
Definition: Nano103.h:5116
#define CLK_CLKSEL2_SC0SEL_Pos
Definition: Nano103.h:5115
uint32_t SCUART_SetLineConfig(SC_T *sc, uint32_t u32Baudrate, uint32_t u32DataWidth, uint32_t u32Parity, uint32_t u32StopBits)
This function use to config smartcard UART mode line setting.
Definition: scuart.c:177
#define SCUART_PARITY_NONE
Definition: scuart.h:37
#define SC_CTL_SCEN_Msk
Definition: Nano103.h:21666
#define CLK_CLKSEL2_SC0SEL_HXT
Definition: clk.h:214