| Nano103 BSP V3.01.002 The Board Support Package for Nano103 Series

adc.c
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1 /**************************************************************************/
12 #include "Nano103.h"
13
41 void ADC_Open(ADC_T *adc,
42 uint32_t u32InputMode,
43 uint32_t u32OpMode,
44 uint32_t u32ChMask)
45 {
46
47 ADC->CTL = (ADC->CTL & ~ADC_CTL_DIFF_Msk) | u32InputMode;
48 ADC->CTL = (ADC->CTL & ~ADC_CTL_ADMD_Msk) | u32OpMode;
49 ADC->CTL = (ADC->CTL & ~ADC_CTL_REFSEL_Msk);
50 ADC->CHEN = u32ChMask;
51 return;
52 }
53
59 void ADC_Close(ADC_T *adc)
60 {
61 SYS->IPRST2 |= SYS_IPRST2_ADCRST_Msk;
62 SYS->IPRST2 &= ~SYS_IPRST2_ADCRST_Msk;
63 return;
64
65 }
66
81 void ADC_EnableHWTrigger(ADC_T *adc,
82 uint32_t u32Source,
83 uint32_t u32Param)
84 {
85 ADC->CTL &= ~(ADC_CTL_HWTRGSEL_Msk | ADC_CTL_HWTRGCOND_Msk | ADC_CTL_HWTRGEN_Msk);
86 if(u32Source == ADC_TRIGGER_BY_EXT_PIN)
87 {
88 ADC->CTL |= u32Source | u32Param | ADC_CTL_HWTRGEN_Msk;
89 }
90 else
91 {
92 ADC->CTL |= u32Source | ADC_CTL_HWTRGEN_Msk;
93 }
94
95 return;
96 }
97
103 void ADC_DisableHWTrigger(ADC_T *adc)
104 {
105 ADC->CTL &= ~(ADC_CTL_HWTRGSEL_Msk | ADC_CTL_HWTRGCOND_Msk | ADC_CTL_HWTRGEN_Msk);
106 return;
107 }
108
116 void ADC_EnableTimerTrigger(ADC_T *adc,
117 uint32_t u32Source,
118 uint32_t u32PDMACnt)
119 {
120 ADC->CTL &= ~(ADC_CTL_TMPDMACNT_Msk | ADC_CTL_TMSEL_Msk);
121 ADC->CTL |= (u32PDMACnt << ADC_CTL_TMPDMACNT_Pos) | (u32Source << ADC_CTL_TMSEL_Pos) | ADC_CTL_TMTRGMOD_Msk;
122
123 return;
124 }
125
131 void ADC_DisableTimerTrigger(ADC_T *adc)
132 {
133 ADC->CTL &= ~ADC_CTL_TMTRGMOD_Msk;
134
135 return;
136 }
137
145 void ADC_SetExtraSampleTime(ADC_T *adc,
146 uint32_t u32ChNum,
147 uint32_t u32SampleTime)
148 {
149
150 if (u32ChNum < 8)
151 ADC->EXTSMPT0 = (ADC->EXTSMPT0 & ~(ADC_EXTSMPT0_EXTSMPT_CH0_Msk << (u32ChNum * 4))) | (u32SampleTime << (u32ChNum * 4));
152 else
153 ADC->EXTSMPT1 = (ADC->EXTSMPT1 & ~ADC_EXTSMPT1_EXTSMPT_INTCH_Msk) | (u32SampleTime << ADC_EXTSMPT1_EXTSMPT_INTCH_Pos);
154 }
155
167 void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
168 {
169 if(u32Mask & ADC_ADF_INT)
170 ADC->CTL |= ADC_CTL_ADCIEN_Msk;
171 if(u32Mask & ADC_CMP0_INT)
172 ADC->CMP0 |= ADC_CMP0_ADCMPIE_Msk;
173 if(u32Mask & ADC_CMP1_INT)
174 ADC->CMP1 |= ADC_CMP1_ADCMPIE_Msk;
175
176 return;
177 }
178
190 void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
191 {
192 if(u32Mask & ADC_ADF_INT)
193 ADC->CTL &= ~ADC_CTL_ADCIEN_Msk;
194 if(u32Mask & ADC_CMP0_INT)
195 ADC->CMP0 &= ~ADC_CMP0_ADCMPIE_Msk;
196 if(u32Mask & ADC_CMP1_INT)
197 ADC->CMP1 &= ~ADC_CMP1_ADCMPIE_Msk;
198
199 return;
200 }
201
202
203 /* end of group NANO103_ADC_EXPORTED_FUNCTIONS */
205 /* end of group NANO103_ADC_Driver */
207 /* end of group NANO103_Device_Driver */
209
210 /*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
ADC_DisableInt
void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
Disable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:190
ADC_CTL_ADCIEN_Msk
#define ADC_CTL_ADCIEN_Msk
Definition: Nano103.h:24423
ADC_CMP0_ADCMPIE_Msk
#define ADC_CMP0_ADCMPIE_Msk
Definition: Nano103.h:24507
ADC_EnableTimerTrigger
void ADC_EnableTimerTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32PDMACnt)
Config and enable timer trigger.
Definition: adc.c:116
ADC_CMP1_INT
#define ADC_CMP1_INT
Definition: adc.h:59
ADC_CMP1_ADCMPIE_Msk
#define ADC_CMP1_ADCMPIE_Msk
Definition: Nano103.h:24525
ADC_EXTSMPT0_EXTSMPT_CH0_Msk
#define ADC_EXTSMPT0_EXTSMPT_CH0_Msk
Definition: Nano103.h:24585
ADC_CTL_HWTRGSEL_Msk
#define ADC_CTL_HWTRGSEL_Msk
Definition: Nano103.h:24429
ADC_TRIGGER_BY_EXT_PIN
#define ADC_TRIGGER_BY_EXT_PIN
Definition: adc.h:51
ADC_Close
void ADC_Close(ADC_T *adc)
Disable ADC module.
Definition: adc.c:59
ADC_CTL_TMSEL_Msk
#define ADC_CTL_TMSEL_Msk
Definition: Nano103.h:24447
ADC_EXTSMPT1_EXTSMPT_INTCH_Pos
#define ADC_EXTSMPT1_EXTSMPT_INTCH_Pos
Definition: Nano103.h:24608
ADC_DisableHWTrigger
void ADC_DisableHWTrigger(ADC_T *adc)
Disable hardware trigger ADC function.
Definition: adc.c:103
ADC_SetExtraSampleTime
void ADC_SetExtraSampleTime(ADC_T *adc, uint32_t u32ChNum, uint32_t u32SampleTime)
Configure the hardware trigger condition and enable hardware trigger.
Definition: adc.c:145
ADC_CTL_REFSEL_Msk
#define ADC_CTL_REFSEL_Msk
Definition: Nano103.h:24453
ADC_EnableInt
void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
Enable the interrupt(s) selected by u32Mask parameter.
Definition: adc.c:167
ADC_EnableHWTrigger
void ADC_EnableHWTrigger(ADC_T *adc, uint32_t u32Source, uint32_t u32Param)
Configure the hardware trigger condition and enable hardware trigger.
Definition: adc.c:81
ADC_CTL_DIFF_Msk
#define ADC_CTL_DIFF_Msk
Definition: Nano103.h:24441
SYS_IPRST2_ADCRST_Msk
#define SYS_IPRST2_ADCRST_Msk
Definition: Nano103.h:3329
ADC_Open
void ADC_Open(ADC_T *adc, uint32_t u32InputMode, uint32_t u32OpMode, uint32_t u32ChMask)
This API configures ADC module to be ready for convert the input from selected channel.
Definition: adc.c:41
ADC_CTL_TMTRGMOD_Msk
#define ADC_CTL_TMTRGMOD_Msk
Definition: Nano103.h:24450
ADC_CTL_HWTRGEN_Msk
#define ADC_CTL_HWTRGEN_Msk
Definition: Nano103.h:24435
ADC_DisableTimerTrigger
void ADC_DisableTimerTrigger(ADC_T *adc)
Disable timer trigger ADC function.
Definition: adc.c:131
ADC_T
Definition: Nano103.h:23603
ADC
#define ADC
Pointer to ADC register structure.
Definition: Nano103.h:24878
ADC_EXTSMPT1_EXTSMPT_INTCH_Msk
#define ADC_EXTSMPT1_EXTSMPT_INTCH_Msk
Definition: Nano103.h:24609
Nano103.h
NANO103 peripheral access layer header file. This file contains all the peripheral register's definit...
ADC_CTL_TMSEL_Pos
#define ADC_CTL_TMSEL_Pos
Definition: Nano103.h:24446
ADC_CTL_ADMD_Msk
#define ADC_CTL_ADMD_Msk
Definition: Nano103.h:24426
ADC_CTL_HWTRGCOND_Msk
#define ADC_CTL_HWTRGCOND_Msk
Definition: Nano103.h:24432
ADC_ADF_INT
#define ADC_ADF_INT
Definition: adc.h:57
ADC_CTL_TMPDMACNT_Msk
#define ADC_CTL_TMPDMACNT_Msk
Definition: Nano103.h:24459
SYS
#define SYS
Pointer to SYS register structure.
Definition: Nano103.h:24883
ADC_CMP0_INT
#define ADC_CMP0_INT
Definition: adc.h:58
ADC_CTL_TMPDMACNT_Pos
#define ADC_CTL_TMPDMACNT_Pos
Definition: Nano103.h:24458