32 #define SC_INTERFACE_NUM 2 33 #define SC_PIN_STATE_HIGH 1 34 #define SC_PIN_STATE_LOW 0 35 #define SC_PIN_STATE_IGNORE 0xFFFFFFFF 39 #define SC_TMR_MODE_0 (0ul << SC_TMRCTL0_OPMODE_Pos) 40 #define SC_TMR_MODE_1 (1ul << SC_TMRCTL0_OPMODE_Pos) 41 #define SC_TMR_MODE_2 (2ul << SC_TMRCTL0_OPMODE_Pos) 42 #define SC_TMR_MODE_3 (3ul << SC_TMRCTL0_OPMODE_Pos) 43 #define SC_TMR_MODE_4 (4ul << SC_TMRCTL0_OPMODE_Pos) 44 #define SC_TMR_MODE_5 (5ul << SC_TMRCTL0_OPMODE_Pos) 45 #define SC_TMR_MODE_6 (6ul << SC_TMRCTL0_OPMODE_Pos) 46 #define SC_TMR_MODE_7 (7ul << SC_TMRCTL0_OPMODE_Pos) 47 #define SC_TMR_MODE_8 (8ul << SC_TMRCTL0_OPMODE_Pos) 48 #define SC_TMR_MODE_F (0xF << SC_TMRCTL0_OPMODE_Pos) 76 #define SC_ENABLE_INT(sc, u32Mask) ((sc)->INTEN |= (u32Mask)) 96 #define SC_DISABLE_INT(sc, u32Mask) ((sc)->INTEN &= ~(u32Mask)) 105 #define SC_SET_VCC_PIN(sc, u32State) \ 108 (sc)->PINCTL |= SC_PINCTL_PWREN_Msk;\ 110 (sc)->PINCTL &= ~SC_PINCTL_PWREN_Msk;\ 121 #define SC_SET_CLK_PIN(sc, u32OnOff)\ 123 uint32_t reg = (sc)->PINCTL;\ 124 if(((reg & (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)) == 0) ||\ 125 ((reg & (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)) == (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)))\ 126 reg &= ~SC_PINCTL_PWREN_Msk;\ 128 reg |= SC_PINCTL_PWREN_Msk;\ 130 (sc)->PINCTL |= SC_PINCTL_CLKKEEP_Msk;\ 132 (sc)->PINCTL &= ~(SC_PINCTL_CLKKEEP_Msk);\ 141 #define SC_SET_IO_PIN(sc, u32State)\ 143 uint32_t reg = (sc)->PINCTL;\ 144 if(((reg & (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)) == 0) ||\ 145 ((reg & (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)) == (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)))\ 146 reg &= ~SC_PINCTL_PWREN_Msk;\ 148 reg |= SC_PINCTL_PWREN_Msk;\ 150 (sc)->PINCTL |= SC_PINCTL_SCDOUT_Msk;\ 152 (sc)->PINCTL &= ~SC_PINCTL_SCDOUT_Msk;\ 161 #define SC_SET_RST_PIN(sc, u32State)\ 163 uint32_t reg = (sc)->PINCTL;\ 164 if(((reg & (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)) == 0) ||\ 165 ((reg & (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)) == (SC_PINCTL_PWREN_Msk | SC_PINCTL_PWRINV_Msk)))\ 166 reg &= ~SC_PINCTL_PWREN_Msk;\ 168 reg |= SC_PINCTL_PWREN_Msk;\ 170 (sc)->PINCTL |= SC_PINCTL_SCRST_Msk;\ 172 (sc)->PINCTL &= ~SC_PINCTL_SCRST_Msk;\ 180 #define SC_READ(sc) ((char)((sc)->DAT)) 189 #define SC_WRITE(sc, u8Data) ((sc)->DAT = (u8Data)) 199 #define SC_SET_STOP_BIT_LEN(sc, u32Len) ((sc)->CTL = ((sc)->CTL & ~SC_CTL_NSB_Msk) | (u32Len == 1 ? SC_CTL_NSB_Msk : 0)) 239 void SC_Open(
SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR);
244 void SC_StartTimer(
SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount);
void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
This function configure and start a smartcard timer of specified smartcard module.
uint32_t SC_IsCardInserted(SC_T *sc)
This function indicates specified smartcard slot status.
__STATIC_INLINE void SC_SetTxRetry(SC_T *sc, uint32_t u32Count)
Enable/Disable Tx error retry, and set Tx error retry count.
void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
This function character guard time (CGT) of specified smartcard module.
void SC_Close(SC_T *sc)
This function disable specified smartcard module.
void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
This function stop a smartcard timer of specified smartcard module.
#define SC_CTL_TXRTYEN_Msk
void SC_ClearFIFO(SC_T *sc)
This function reset both transmit and receive FIFO of specified smartcard module.
void SC_ResetReader(SC_T *sc)
This function reset specified smartcard module to its default state for activate smartcard.
__STATIC_INLINE void SC_SetRxRetry(SC_T *sc, uint32_t u32Count)
Enable/Disable Rx error retry, and set Rx error retry count.
uint32_t SC_GetInterfaceClock(SC_T *sc)
This function gets smartcard clock frequency.
void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
This function block guard time (BGT) of specified smartcard module.
void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR)
This function initialized smartcard module.
#define SC_CTL_RXRTYEN_Msk
void SC_StopAllTimer(SC_T *sc)
This function stop all smartcard timer of specified smartcard module.