57 void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En)
78 SCB->SCR = SCB_SCR_SLEEPDEEP_Msk;
139 uint32_t Div[]= {1,2,4,8,16,1,1,1};
153 uint32_t Div[]= {1,2,4,8,16,1,1,1};
178 uint32_t u32Freq =0, u32PLLSrc;
179 uint32_t u32SRC_N,u32PLL_M,u32PllReg;
181 u32PllReg =
CLK->PLLCTL;
217 u32Freq = u32PLLSrc * u32PLL_M / (u32SRC_N+1);
382 uint32_t u32tmp=0,u32sel=0,u32div=0;
387 u32tmp = *(
volatile uint32_t *)(u32div);
389 *(
volatile uint32_t *)(u32div) = u32tmp;
395 u32tmp = *(
volatile uint32_t *)(u32sel);
397 *(
volatile uint32_t *)(u32sel) = u32tmp;
414 CLK->PWRCTL |= u32ClkMask;
430 CLK->PWRCTL &= ~u32ClkMask;
516 uint32_t u32PllCr,u32PLL_N,u32PLL_M,u32PLLReg;
555 u32PLL_N=u32PllCr/1000000;
556 u32PLL_M=u32PllFreq/1000000;
559 if(u32PLL_M<=48 && u32PLL_N<=36 )
break;
598 SysTick->VAL = (0x00);
599 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
602 while((SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk) == 0);
620 SysTick->CTRL |= SysTick_CTRL_CLKSOURCE_Msk;
623 SysTick->CTRL &= ~SysTick_CTRL_CLKSOURCE_Msk;
625 SysTick->LOAD = u32Count;
627 SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
658 int32_t i32TimeOutCnt=2160000;
660 while((
CLK->STATUS & u32ClkMask) != u32ClkMask)
662 if(i32TimeOutCnt-- <= 0)
#define CLK_PLLCTL_PLLMLP_Msk
#define CLK_APBCLK_CLKOCKEN_Msk
#define CLK_PLLCTL_PLL_SRC_MIRC
uint32_t CLK_GetLXTFreq(void)
This function get external low frequency crystal frequency. The frequency unit is Hz.
#define CLK_PWRCTL_HXT_EN
uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq)
This function set PLL frequency.
#define CLK_PWRCTL_HIRC0FSEL_Msk
#define CLK_CLKSEL0_HCLKSEL_PLL
#define CLK_APBDIV_APB1DIV_Msk
#define CLK_PLLCTL_PLL_SRC_HIRC
#define MODULE_CLKSEL_Pos(x)
#define CLK_CLKOCTL_CLKOEN_Msk
#define CLK_PWRCTL_LXT_EN
void CLK_DisableCKO(void)
This function disable frequency output function.
uint32_t CLK_GetPCLK0Freq(void)
This function get PCLK0 frequency. The frequency unit is Hz.
void CLK_EnableCKO(uint32_t u32ClkSrc, uint32_t u32ClkDiv, uint32_t u32ClkDivBy1En)
This function enable frequency divider module clock, enable frequency divider clock function and conf...
#define CLK_PLLCTL_PLL_SRC_HXT
void CLK_EnableSysTick(uint32_t u32ClkSrc, uint32_t u32Count)
Enable System Tick counter.
#define CLK_CLKOCTL_DIV1EN_Pos
void CLK_SetModuleClock(uint32_t u32ModuleIdx, uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set selected module clock source and module clock divider.
#define MODULE_IP_EN_Pos(x)
void CLK_DisableSysTick(void)
Disable System Tick counter.
#define MODULE_CLKSEL_Msk(x)
uint32_t CLK_GetPCLK1Freq(void)
This function get PCLK1 frequency. The frequency unit is Hz.
uint32_t CLK_WaitClockReady(uint32_t u32ClkMask)
This function check selected clock source status.
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
void CLK_PowerDown(void)
This function let system enter to fractal fx-2-down mode.
#define CLK_CLKSEL0_HCLKSEL_Msk
#define CLK_CLKSEL0_STCLKSEL_HCLK
#define CLK_PWRCTL_HIRC0_EN
#define CLK_PWRCTL_PDEN_Msk
void CLK_DisableModuleClock(uint32_t u32ModuleIdx)
This function disable module clock.
#define CLK_PWRCTL_HIRC1_EN
#define CLK_PWRCTL_PDWKDLY_Msk
uint32_t CLK_GetCPUFreq(void)
This function get CPU frequency. The frequency unit is Hz.
#define CLK_PLLCTL_INDIV_Pos
void CLK_SetPCLK1(uint32_t u32ClkDiv)
This function set APB PCLK1 clock divider.
uint32_t CLK_GetHCLKFreq(void)
This function get HCLK frequency. The frequency unit is Hz.
#define CLK_CLKDIV0_HCLKDIV_Msk
void CLK_EnableXtalRC(uint32_t u32ClkMask)
This function enable clock source.
#define CLK_PLLCTL_PLLSRC_Msk
void CLK_SysTickDelay(uint32_t us)
This function execute delay function.
NANO103 peripheral access layer header file. This file contains all the peripheral register's definit...
void SystemCoreClockUpdate(void)
Updates the SystemCoreClock with current core Clock retrieved from CPU registers.
#define CLK_CLKSEL0_HIRCSEL_Msk
#define MODULE_CLKDIV_Pos(x)
#define CLK_HCLK_CLK_DIVIDER(x)
uint32_t CLK_GetHXTFreq(void)
This function get external high frequency crystal frequency. The frequency unit is Hz.
uint32_t CLK_SetCoreClock(uint32_t u32Hclk)
This function set HCLK frequency. The frequency unit is Hz. The range of u32Hclk is 16 ~ 48 MHz.
void CLK_SetHCLK(uint32_t u32ClkSrc, uint32_t u32ClkDiv)
This function set HCLK clock source and HCLK clock divider.
void CLK_DisableXtalRC(uint32_t u32ClkMask)
This function disable clock source.
#define CLK
Pointer to CLK register structure.
void CLK_SetPCLK0(uint32_t u32ClkDiv)
This function set APB PCLK0 clock divider.
#define CLK_APBDIV_APB0DIV_Msk
void CLK_DisablePLL(void)
This function disable PLL.
void CLK_EnableModuleClock(uint32_t u32ModuleIdx)
This function enable module clock.
#define CLK_PLLCTL_INDIV_Msk
void CLK_Idle(void)
This function let system enter to Idle mode.
#define CLK_CLKSEL2_CLKOSEL_Msk
#define CLK_PLLCTL_PD_Msk
#define MODULE_CLKDIV_Msk(x)
#define CLK_PLLCTL_PLLMLP_Pos
#define CLK_STATUS_PLLSTB_Msk