| Nano103 BSP V3.01.002 The Board Support Package for Nano103 Series

sc.c
Go to the documentation of this file.
1 /**************************************************************************/
12 #include "Nano103.h"
13
14 // Below are variables used locally by SC driver and does not want to parse by Doxygen unless HIDDEN_SYMBOLS is defined
16 static uint32_t u32CardStateIgnore[SC_INTERFACE_NUM] = {0, 0};
17
19
40 uint32_t SC_IsCardInserted(SC_T *sc)
41 {
42 // put conditions into two variable to remove IAR compilation warning
43 uint32_t cond1 = ((sc->PINCTL & SC_PINCTL_CDPINSTS_Msk) >> SC_PINCTL_CDPINSTS_Pos);
44 uint32_t cond2 = ((sc->PINCTL & SC_PINCTL_CDLV_Msk) >> SC_PINCTL_CDLV_Pos);
45
46 if(sc == SC0 && u32CardStateIgnore[0] == 1)
47 return TRUE;
48 else if(sc == SC1 && u32CardStateIgnore[1] == 1)
49 return TRUE;
50 else if(cond1 != cond2)
51 return FALSE;
52 else
53 return TRUE;
54 }
55
61 void SC_ClearFIFO(SC_T *sc)
62 {
63 sc->ALTCTL |= (SC_ALTCTL_TXRST_Msk | SC_ALTCTL_RXRST_Msk);
64 }
65
71 void SC_Close(SC_T *sc)
72 {
73 sc->INTEN = 0;
74 sc->PINCTL = 0;
75 sc->ALTCTL = 0;
76 sc->CTL = 0;
77 }
78
91 void SC_Open(SC_T *sc, uint32_t u32CD, uint32_t u32PWR)
92 {
93 uint32_t u32Reg = 0, u32Intf;
94
95 sc->CTL = SC_CTL_SCEN_Msk;
96 if(sc == SC0)
97 u32Intf = 0;
98 else
99 u32Intf = 1;
100
101 if(u32CD != SC_PIN_STATE_IGNORE)
102 {
103 u32Reg = u32CD ? 0: SC_PINCTL_CDLV_Msk;
104 u32CardStateIgnore[u32Intf] = 0;
105 }
106 else
107 {
108 u32CardStateIgnore[u32Intf] = 1;
109 }
110 u32Reg |= u32PWR ? 0 : SC_PINCTL_PWRINV_Msk;
111 sc->PINCTL = u32Reg;
112 //sc->CTL = SC_CTL_SCEN_Msk;
113 }
114
120 void SC_ResetReader(SC_T *sc)
121 {
122 uint32_t u32Intf;
123
124 if(sc == SC0)
125 u32Intf = 0;
126 else
127 u32Intf = 1;
128
129 // Reset FIFO
130 sc->ALTCTL |= (SC_ALTCTL_TXRST_Msk | SC_ALTCTL_RXRST_Msk);
131 // Set Rx trigger level to 1 character, longest card detect debounce period, disable error retry (EMV ATR does not use error retry)
132 sc->CTL &= ~(SC_CTL_RXTRGLV_Msk |
133 SC_CTL_CDDBSEL_Msk |
134 SC_CTL_TXRTY_Msk |
135 SC_CTL_TXRTYEN_Msk |
136 SC_CTL_RXRTY_Msk |
137 SC_CTL_RXRTYEN_Msk);
138 // Enable auto convention, and all three smartcard internal timers
139 sc->CTL |= SC_CTL_AUTOCEN_Msk | SC_CTL_TMRSEL_Msk;
140 // Disable Rx timeout
141 sc->RXTOUT = 0;
142 // 372 clocks per ETU by default
143 sc->ETUCTL = 371;
144 // Enable auto de-activation while card removal
145 sc->PINCTL |= SC_PINCTL_ADACEN_Msk;
146
147 /* Enable necessary interrupt for smartcard operation */
148 if(u32CardStateIgnore[u32Intf]) // Do not enable card detect interrupt if card present state ignore
149 sc->INTEN = (SC_INTEN_RDAIEN_Msk |
150 SC_INTEN_TERRIEN_Msk |
151 SC_INTEN_TMR0IEN_Msk |
152 SC_INTEN_TMR1IEN_Msk |
153 SC_INTEN_TMR2IEN_Msk |
154 SC_INTEN_BGTIEN_Msk |
155 SC_INTEN_ACERRIEN_Msk);
156 else
157 sc->INTEN = (SC_INTEN_RDAIEN_Msk |
158 SC_INTEN_TERRIEN_Msk |
159 SC_INTEN_TMR0IEN_Msk |
160 SC_INTEN_TMR1IEN_Msk |
161 SC_INTEN_TMR2IEN_Msk |
162 SC_INTEN_BGTIEN_Msk |
163 SC_INTEN_CDIEN_Msk |
164 SC_INTEN_ACERRIEN_Msk);
165
166 return;
167 }
168
175 void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
176 {
177 sc->CTL = (sc->CTL & ~SC_CTL_BGT_Msk) | ((u32BGT - 1) << SC_CTL_BGT_Pos);
178 }
179
186 void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
187 {
188 u32CGT -= sc->CTL & SC_CTL_NSB_Msk ? 11: 12;
189 sc->EGT = u32CGT;
190 }
191
198 void SC_StopAllTimer(SC_T *sc)
199 {
200 sc->ALTCTL &= ~(SC_ALTCTL_CNTEN0_Msk | SC_ALTCTL_CNTEN1_Msk | SC_ALTCTL_CNTEN2_Msk);
201 }
202
224 void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
225 {
226 uint32_t reg = u32Mode | (SC_TMRCTL0_CNT_Msk & (u32ETUCount - 1));
227
228 if(u32TimerNum == 0)
229 {
230 sc->TMRCTL0 = reg;
231 sc->ALTCTL |= SC_ALTCTL_CNTEN0_Msk;
232 }
233 else if(u32TimerNum == 1)
234 {
235 sc->TMRCTL1 = reg;
236 sc->ALTCTL |= SC_ALTCTL_CNTEN1_Msk;
237 }
238 else // timer 2
239 {
240 sc->TMRCTL2 = reg;
241 sc->ALTCTL |= SC_ALTCTL_CNTEN2_Msk;
242 }
243 }
244
252 void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
253 {
254 if(u32TimerNum == 0)
255 sc->ALTCTL &= ~SC_ALTCTL_CNTEN0_Msk;
256 else if(u32TimerNum == 1)
257 sc->ALTCTL &= ~SC_ALTCTL_CNTEN1_Msk;
258 else // timer 2
259 sc->ALTCTL &= ~SC_ALTCTL_CNTEN2_Msk;
260 }
261
267 uint32_t SC_GetInterfaceClock(SC_T *sc)
268 {
269 uint32_t reg, freq;
270
271 if(sc == (SC_T *)SC0)
272 {
273 reg = (CLK->CLKSEL2 & CLK_CLKSEL2_SC0SEL_Msk) >> CLK_CLKSEL2_SC0SEL_Pos;
274 }
275 else
276 {
277 reg = (CLK->CLKSEL2 & CLK_CLKSEL2_SC1SEL_Msk) >> CLK_CLKSEL2_SC1SEL_Pos;
278 }
279
280 if(reg == (CLK_CLKSEL2_SC0SEL_HXT >> CLK_CLKSEL2_SC0SEL_Pos))
281 {
282 freq = __HXT;
283 }
284 else if(reg == (CLK_CLKSEL2_SC0SEL_PLL >> CLK_CLKSEL2_SC0SEL_Pos))
285 {
286 freq = CLK_GetPLLClockFreq();
287 }
288 else if(reg == (CLK_CLKSEL2_SC0SEL_HIRC >> CLK_CLKSEL2_SC0SEL_Pos))
289 {
290 if(CLK->CLKSEL0 & CLK_CLKSEL0_HIRCSEL_Msk)
291 {
292 freq = __HIRC36M;
293 }
294 else
295 {
296 freq = __HIRC12M;
297 }
298 }
299 else if(reg == (CLK_CLKSEL2_SC0SEL_MIRC >> CLK_CLKSEL2_SC0SEL_Pos))
300 {
301 freq = __MIRC;
302 }
303 else
304 freq = SystemCoreClock;
305
306 if(sc == (SC_T *)SC0)
307 {
308 freq /= (((CLK->CLKDIV0 & CLK_CLKDIV0_SC0DIV_Msk) >> (CLK_CLKDIV0_SC0DIV_Pos)) + 1);
309 }
310 else
311 {
312 freq /= (((CLK->CLKDIV1 & CLK_CLKDIV1_SC1DIV_Msk) >> (CLK_CLKDIV1_SC1DIV_Pos)) + 1);
313 }
314 return (freq /1000);
315 }
316 /* end of group NANO103_SC_EXPORTED_FUNCTIONS */
318 /* end of group NANO103_SC_Driver */
320 /* end of group NANO103_Device_Driver */
322
323 /*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
SC_ALTCTL_TXRST_Msk
#define SC_ALTCTL_TXRST_Msk
Definition: Nano103.h:21711
SC_CTL_RXRTY_Msk
#define SC_CTL_RXRTY_Msk
Definition: Nano103.h:21693
SC_StartTimer
void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount)
This function configure and start a smartcard timer of specified smartcard module.
Definition: sc.c:224
SC_IsCardInserted
uint32_t SC_IsCardInserted(SC_T *sc)
This function indicates specified smartcard slot status.
Definition: sc.c:40
SC_PINCTL_ADACEN_Msk
#define SC_PINCTL_ADACEN_Msk
Definition: Nano103.h:21897
__HXT
#define __HXT
Definition: system_Nano103.h:26
SC_T
Definition: Nano103.h:20422
SC_INTEN_BGTIEN_Msk
#define SC_INTEN_BGTIEN_Msk
Definition: Nano103.h:21780
SC_PINCTL_CDPINSTS_Pos
#define SC_PINCTL_CDPINSTS_Pos
Definition: Nano103.h:21890
SC_INTEN_ACERRIEN_Msk
#define SC_INTEN_ACERRIEN_Msk
Definition: Nano103.h:21792
SC_CTL_CDDBSEL_Msk
#define SC_CTL_CDDBSEL_Msk
Definition: Nano103.h:21705
SC_T::CTL
__IO uint32_t CTL
Definition: Nano103.h:21637
SC_CTL_BGT_Msk
#define SC_CTL_BGT_Msk
Definition: Nano103.h:21684
CLK_CLKDIV0_SC0DIV_Msk
#define CLK_CLKDIV0_SC0DIV_Msk
Definition: Nano103.h:5140
SC_INTEN_TMR0IEN_Msk
#define SC_INTEN_TMR0IEN_Msk
Definition: Nano103.h:21771
SC_ALTCTL_CNTEN1_Msk
#define SC_ALTCTL_CNTEN1_Msk
Definition: Nano103.h:21729
CLK_CLKSEL2_SC0SEL_MIRC
#define CLK_CLKSEL2_SC0SEL_MIRC
Definition: clk.h:217
SC_SetCharGuardTime
void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT)
This function character guard time (CGT) of specified smartcard module.
Definition: sc.c:186
SystemCoreClock
uint32_t SystemCoreClock
Definition: system_Nano103.c:20
CLK_CLKSEL2_SC1SEL_Msk
#define CLK_CLKSEL2_SC1SEL_Msk
Definition: Nano103.h:5119
SC_Close
void SC_Close(SC_T *sc)
This function disable specified smartcard module.
Definition: sc.c:71
SC_T::TMRCTL1
__IO uint32_t TMRCTL1
Definition: Nano103.h:21647
SC_INTEN_RDAIEN_Msk
#define SC_INTEN_RDAIEN_Msk
Definition: Nano103.h:21762
SC_INTERFACE_NUM
#define SC_INTERFACE_NUM
Definition: sc.h:32
SC_INTEN_TMR1IEN_Msk
#define SC_INTEN_TMR1IEN_Msk
Definition: Nano103.h:21774
SC_StopTimer
void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum)
This function stop a smartcard timer of specified smartcard module.
Definition: sc.c:252
SC_INTEN_TMR2IEN_Msk
#define SC_INTEN_TMR2IEN_Msk
Definition: Nano103.h:21777
SC_CTL_TXRTYEN_Msk
#define SC_CTL_TXRTYEN_Msk
Definition: Nano103.h:21702
SC_T::ETUCTL
__IO uint32_t ETUCTL
Definition: Nano103.h:21641
SC_T::EGT
__IO uint32_t EGT
Definition: Nano103.h:21639
SC_PINCTL_CDPINSTS_Msk
#define SC_PINCTL_CDPINSTS_Msk
Definition: Nano103.h:21891
CLK_CLKSEL2_SC0SEL_PLL
#define CLK_CLKSEL2_SC0SEL_PLL
Definition: clk.h:215
TRUE
#define TRUE
Boolean true, define to use in API parameters or return value.
Definition: Nano103.h:25048
SC_T::TMRCTL0
__IO uint32_t TMRCTL0
Definition: Nano103.h:21646
SC_T::INTEN
__IO uint32_t INTEN
Definition: Nano103.h:21642
SC_INTEN_TERRIEN_Msk
#define SC_INTEN_TERRIEN_Msk
Definition: Nano103.h:21768
SC_TMRCTL0_CNT_Msk
#define SC_TMRCTL0_CNT_Msk
Definition: Nano103.h:21915
SC_CTL_TXRTY_Msk
#define SC_CTL_TXRTY_Msk
Definition: Nano103.h:21699
SC_ALTCTL_CNTEN0_Msk
#define SC_ALTCTL_CNTEN0_Msk
Definition: Nano103.h:21726
SC_CTL_AUTOCEN_Msk
#define SC_CTL_AUTOCEN_Msk
Definition: Nano103.h:21675
SC_T::PINCTL
__IO uint32_t PINCTL
Definition: Nano103.h:21645
SC_T::TMRCTL2
__IO uint32_t TMRCTL2
Definition: Nano103.h:21648
CLK_GetPLLClockFreq
uint32_t CLK_GetPLLClockFreq(void)
This function get PLL frequency. The frequency unit is Hz.
Definition: clk.c:176
FALSE
#define FALSE
Boolean false, define to use in API parameters or return value.
Definition: Nano103.h:25049
SC_ClearFIFO
void SC_ClearFIFO(SC_T *sc)
This function reset both transmit and receive FIFO of specified smartcard module.
Definition: sc.c:61
SC1
#define SC1
Pointer to SC1 register structure.
Definition: Nano103.h:24880
SC_ResetReader
void SC_ResetReader(SC_T *sc)
This function reset specified smartcard module to its default state for activate smartcard.
Definition: sc.c:120
SC_PINCTL_CDLV_Msk
#define SC_PINCTL_CDLV_Msk
Definition: Nano103.h:21903
SC_T::ALTCTL
__IO uint32_t ALTCTL
Definition: Nano103.h:21638
__MIRC
#define __MIRC
Definition: system_Nano103.h:32
SC_ALTCTL_RXRST_Msk
#define SC_ALTCTL_RXRST_Msk
Definition: Nano103.h:21714
SC_GetInterfaceClock
uint32_t SC_GetInterfaceClock(SC_T *sc)
This function gets smartcard clock frequency.
Definition: sc.c:267
SC_PIN_STATE_IGNORE
#define SC_PIN_STATE_IGNORE
Definition: sc.h:35
CLK_CLKSEL2_SC0SEL_HIRC
#define CLK_CLKSEL2_SC0SEL_HIRC
Definition: clk.h:216
SC_INTEN_CDIEN_Msk
#define SC_INTEN_CDIEN_Msk
Definition: Nano103.h:21783
SC_ALTCTL_CNTEN2_Msk
#define SC_ALTCTL_CNTEN2_Msk
Definition: Nano103.h:21732
Nano103.h
NANO103 peripheral access layer header file. This file contains all the peripheral register's definit...
CLK_CLKSEL2_SC1SEL_Pos
#define CLK_CLKSEL2_SC1SEL_Pos
Definition: Nano103.h:5118
CLK_CLKDIV0_SC0DIV_Pos
#define CLK_CLKDIV0_SC0DIV_Pos
Definition: Nano103.h:5139
SC_PINCTL_CDLV_Pos
#define SC_PINCTL_CDLV_Pos
Definition: Nano103.h:21902
__HIRC36M
#define __HIRC36M
Definition: system_Nano103.h:31
CLK_CLKSEL0_HIRCSEL_Msk
#define CLK_CLKSEL0_HIRCSEL_Msk
Definition: Nano103.h:5071
SC0
#define SC0
Pointer to SC0 register structure.
Definition: Nano103.h:24879
SC_SetBlockGuardTime
void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT)
This function block guard time (BGT) of specified smartcard module.
Definition: sc.c:175
SC_T::RXTOUT
__IO uint32_t RXTOUT
Definition: Nano103.h:21640
CLK_CLKDIV1_SC1DIV_Msk
#define CLK_CLKDIV1_SC1DIV_Msk
Definition: Nano103.h:5143
SC_CTL_TMRSEL_Msk
#define SC_CTL_TMRSEL_Msk
Definition: Nano103.h:21687
__HIRC12M
#define __HIRC12M
Definition: system_Nano103.h:28
SC_CTL_BGT_Pos
#define SC_CTL_BGT_Pos
Definition: Nano103.h:21683
SC_CTL_NSB_Msk
#define SC_CTL_NSB_Msk
Definition: Nano103.h:21690
CLK_CLKDIV1_SC1DIV_Pos
#define CLK_CLKDIV1_SC1DIV_Pos
Definition: Nano103.h:5142
CLK
#define CLK
Pointer to CLK register structure.
Definition: Nano103.h:24884
SC_Open
void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR)
This function initialized smartcard module.
Definition: sc.c:91
CLK_CLKSEL2_SC0SEL_Msk
#define CLK_CLKSEL2_SC0SEL_Msk
Definition: Nano103.h:5116
CLK_CLKSEL2_SC0SEL_Pos
#define CLK_CLKSEL2_SC0SEL_Pos
Definition: Nano103.h:5115
SC_CTL_RXTRGLV_Msk
#define SC_CTL_RXTRGLV_Msk
Definition: Nano103.h:21681
SC_CTL_RXRTYEN_Msk
#define SC_CTL_RXRTYEN_Msk
Definition: Nano103.h:21696
SC_StopAllTimer
void SC_StopAllTimer(SC_T *sc)
This function stop all smartcard timer of specified smartcard module.
Definition: sc.c:198
SC_CTL_SCEN_Msk
#define SC_CTL_SCEN_Msk
Definition: Nano103.h:21666
SC_PINCTL_PWRINV_Msk
#define SC_PINCTL_PWRINV_Msk
Definition: Nano103.h:21906
CLK_CLKSEL2_SC0SEL_HXT
#define CLK_CLKSEL2_SC0SEL_HXT
Definition: clk.h:214