Nano103 BSP  V3.01.002
The Board Support Package for Nano103 Series
pwm.h
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1 /**************************************************************************/
12 #ifndef __PWM_H__
13 #define __PWM_H__
14 
15 #ifdef __cplusplus
16 extern "C"
17 {
18 #endif
19 
20 
32 #define PWM_CHANNEL_NUM (6)
33 #define PWM_CH_0_MASK (0x1UL)
34 #define PWM_CH_1_MASK (0x2UL)
35 #define PWM_CH_2_MASK (0x4UL)
36 #define PWM_CH_3_MASK (0x8UL)
37 #define PWM_CH_4_MASK (0x10UL)
38 #define PWM_CH_5_MASK (0x20UL)
40 /*---------------------------------------------------------------------------------------------------------*/
41 /* Counter Type Constant Definitions */
42 /*---------------------------------------------------------------------------------------------------------*/
43 #define PWM_UP_COUNTER (0UL)
44 #define PWM_DOWN_COUNTER (1UL)
45 #define PWM_UP_DOWN_COUNTER (2UL)
47 /*---------------------------------------------------------------------------------------------------------*/
48 /* Aligned Type Constant Definitions */
49 /*---------------------------------------------------------------------------------------------------------*/
50 #define PWM_EDGE_ALIGNED (1UL)
51 #define PWM_CENTER_ALIGNED (2UL)
53 /*---------------------------------------------------------------------------------------------------------*/
54 /* Output Level Constant Definitions */
55 /*---------------------------------------------------------------------------------------------------------*/
56 #define PWM_OUTPUT_NOTHING (0UL)
57 #define PWM_OUTPUT_LOW (1UL)
58 #define PWM_OUTPUT_HIGH (2UL)
59 #define PWM_OUTPUT_TOGGLE (3UL)
61 /*---------------------------------------------------------------------------------------------------------*/
62 /* Waveform Generator Control Constant Definitions */
63 /*---------------------------------------------------------------------------------------------------------*/
64 #define PWM_WGCTL0_ZPCTL0_Msk (3UL << PWM_WGCTL0_ZPCTLn_Pos)
65 #define PWM_WGCTL0_PRDPCTL0_Msk (3UL << PWM_WGCTL0_PRDPCTLn_Pos)
66 #define PWM_WGCTL1_CMPUCTL0_Msk (3UL << PWM_WGCTL1_CMPUCTLn_Pos)
67 #define PWM_WGCTL1_CMPDCTL0_Msk (3UL << PWM_WGCTL1_CMPDCTLn_Pos)
69 /*---------------------------------------------------------------------------------------------------------*/
70 /* Trigger Source Select Constant Definitions */
71 /*---------------------------------------------------------------------------------------------------------*/
72 #define PWM_TRIGGER_ADC_EVEN_ZERO_POINT (0UL)
73 #define PWM_TRIGGER_ADC_EVEN_PERIOD_POINT (1UL)
74 #define PWM_TRIGGER_ADC_EVEN_ZERO_OR_PERIOD_POINT (2UL)
75 #define PWM_TRIGGER_ADC_EVEN_COMPARE_UP_COUNT_POINT (3UL)
76 #define PWM_TRIGGER_ADC_EVEN_COMPARE_DOWN_COUNT_POINT (4UL)
77 #define PWM_TRIGGER_ADC_ODD_COMPARE_UP_COUNT_POINT (8UL)
78 #define PWM_TRIGGER_ADC_ODD_COMPARE_DOWN_COUNT_POINT (9UL)
80 /*---------------------------------------------------------------------------------------------------------*/
81 /* Fail brake Control Constant Definitions */
82 /*---------------------------------------------------------------------------------------------------------*/
83 #define PWM_FB_EDGE_BKP0 (PWM_BRKCTL0_1_BRKP0EEN_Msk)
84 #define PWM_FB_EDGE_BKP1 (PWM_BRKCTL0_1_BRKP1EEN_Msk)
85 #define PWM_FB_EDGE_SYS_BOD (PWM_BRKCTL0_1_SYSEEN_Msk | PWM_FAILBRK_BODBRKEN_Msk)
86 #define PWM_FB_EDGE_SYS_COR (PWM_BRKCTL0_1_SYSEEN_Msk | PWM_FAILBRK_CORBRKEN_Msk)
88 #define PWM_FB_LEVEL_BKP0 (PWM_BRKCTL0_1_BRKP0LEN_Msk)
89 #define PWM_FB_LEVEL_BKP1 (PWM_BRKCTL0_1_BRKP1LEN_Msk)
90 #define PWM_FB_LEVEL_SYS_BOD (PWM_BRKCTL0_1_SYSLEN_Msk | PWM_FAILBRK_BODBRKEN_Msk)
91 #define PWM_FB_LEVEL_SYS_COR (PWM_BRKCTL0_1_SYSLEN_Msk | PWM_FAILBRK_CORBRKEN_Msk)
93 #define PWM_FB_EDGE (0UL)
94 #define PWM_FB_LEVEL (8UL)
96 /*---------------------------------------------------------------------------------------------------------*/
97 /* Capture Control and Status Constant Definitions */
98 /*---------------------------------------------------------------------------------------------------------*/
99 #define PWM_CAPTURE_INT_RISING_LATCH (1UL)
100 #define PWM_CAPTURE_INT_FALLING_LATCH (0x100UL)
101 #define PWM_CAPSTS_CRIFOV0_Msk (1 << PWM_CAPSTS_CRIFOVn_Pos)
102 #define PWM_CAPSTS_CFIFOV0_Msk (1 << PWM_CAPSTS_CFIFOVn_Pos)
104 /*---------------------------------------------------------------------------------------------------------*/
105 /* Duty Interrupt Type Constant Definitions */
106 /*---------------------------------------------------------------------------------------------------------*/
107 #define PWM_DUTY_INT_DOWN_COUNT_MATCH_CMP (1 << PWM_INTEN0_CMPDIENn_Pos)
108 #define PWM_DUTY_INT_UP_COUNT_MATCH_CMP (1 << PWM_INTEN0_CMPUIENn_Pos)
110 /*---------------------------------------------------------------------------------------------------------*/
111 /* Load Mode Constant Definitions */
112 /*---------------------------------------------------------------------------------------------------------*/
113 #define PWM_LOAD_MODE_IMMEDIATE (PWM_CTL0_IMMLDEN0_Msk)
114 #define PWM_LOAD_MODE_CENTER (PWM_CTL0_CTRLD0_Msk)
116 /*---------------------------------------------------------------------------------------------------------*/
117 /* Noise Filter Clock Divide Select Constant Definitions */
118 /*---------------------------------------------------------------------------------------------------------*/
119 #define PWM_NF_CLK_DIV_1 (0UL)
120 #define PWM_NF_CLK_DIV_2 (1UL)
121 #define PWM_NF_CLK_DIV_4 (2UL)
122 #define PWM_NF_CLK_DIV_8 (3UL)
123 #define PWM_NF_CLK_DIV_16 (4UL)
124 #define PWM_NF_CLK_DIV_32 (5UL)
125 #define PWM_NF_CLK_DIV_64 (6UL)
126 #define PWM_NF_CLK_DIV_128 (7UL)
128 /*---------------------------------------------------------------------------------------------------------*/
129 /* Clock Source Select Constant Definitions */
130 /*---------------------------------------------------------------------------------------------------------*/
131 #define PWM_CLKSRC_PWM_CLK (0UL)
132 #define PWM_CLKSRC_TIMER0 (1UL)
133 #define PWM_CLKSRC_TIMER1 (2UL)
134 #define PWM_CLKSRC_TIMER2 (3UL)
135 #define PWM_CLKSRC_TIMER3 (4UL)
137  /* end of group NANO103_PWM_EXPORTED_CONSTANTS */
138 
139 
151 #define PWM_ENABLE_COMPLEMENTARY_MODE(pwm) ((pwm)->CTL1 = (pwm)->CTL1 | PWM_CTL1_PWMMODEn_Msk)
152 
160 #define PWM_DISABLE_COMPLEMENTARY_MODE(pwm) ((pwm)->CTL1 = (pwm)->CTL1 & ~PWM_CTL1_PWMMODEn_Msk)
161 
171 #define PWM_ENABLE_OUTPUT_INVERTER(pwm, u32ChannelMask) ((pwm)->POLCTL = (u32ChannelMask))
172 
181 #define PWM_GET_CAPTURE_RISING_DATA(pwm, u32ChannelNum) (*(__IO uint32_t *) (&((pwm)->RCAPDAT0) + 2 * (u32ChannelNum)))
182 
191 #define PWM_GET_CAPTURE_FALLING_DATA(pwm, u32ChannelNum) (*(__IO uint32_t *) (&((pwm)->FCAPDAT0) + 2 * (u32ChannelNum)))
192 
204 #define PWM_MASK_OUTPUT(pwm, u32ChannelMask, u32LevelMask) \
205  { \
206  (pwm)->MSKEN = (u32ChannelMask); \
207  (pwm)->MSK = (u32LevelMask); \
208  }
209 
221 #define PWM_SET_PRESCALER(pwm, u32ChannelNum, u32Prescaler) (*(__IO uint32_t *) (&((pwm)->CLKPSC0_1) + ((u32ChannelNum) >> 1)) = (u32Prescaler))
222 
233 #define PWM_SET_CMR(pwm, u32ChannelNum, u32CMR) ((pwm)->CMPDAT[(u32ChannelNum)] = (u32CMR))
234 
246 #define PWM_SET_CNR(pwm, u32ChannelNum, u32CNR) ((pwm)->PERIOD[(((u32ChannelNum) >> 1) << 1)] = (u32CNR))
247 
260 #define PWM_SET_ALIGNED_TYPE(pwm, u32ChannelMask, u32AlignedType) \
261  do{ \
262  int i; \
263  for(i = 0; i < 6; i++) { \
264  if((u32ChannelMask) & (1 << i)) \
265  (pwm)->CTL1 = (((pwm)->CTL1 & ~(3UL << ((i >> 1) << 2))) | ((u32AlignedType) << ((i >> 1) << 2))); \
266  } \
267  }while(0)
268 
278 #define PWM_CLR_COUNTER(pwm, u32ChannelMask) \
279  do{ \
280  int i; \
281  for(i = 0; i < 6; i++) { \
282  if((u32ChannelMask) & (1 << i)) \
283  ((pwm)->CNTCLR |= (1UL << ((i >> 1) << 1))); \
284  } \
285  }while(0)
286 
316 #define PWM_SET_OUTPUT_LEVEL(pwm, u32ChannelMask, u32ZeroLevel, u32CmpUpLevel, u32PeriodLevel, u32CmpDownLevel) \
317  do{ \
318  int i; \
319  for(i = 0; i < 6; i++) { \
320  if((u32ChannelMask) & (1 << i)) { \
321  (pwm)->WGCTL0 = (((pwm)->WGCTL0 & ~(3UL << (2 * i))) | ((u32ZeroLevel) << (2 * i))); \
322  (pwm)->WGCTL0 = (((pwm)->WGCTL0 & ~(3UL << (PWM_WGCTL0_PRDPCTLn_Pos + (2 * i)))) | ((u32PeriodLevel) << (PWM_WGCTL0_PRDPCTLn_Pos + (2 * i)))); \
323  (pwm)->WGCTL1 = (((pwm)->WGCTL1 & ~(3UL << (2 * i))) | ((u32CmpUpLevel) << (2 * i))); \
324  (pwm)->WGCTL1 = (((pwm)->WGCTL1 & ~(3UL << (PWM_WGCTL1_CMPDCTLn_Pos + (2 * i)))) | ((u32CmpDownLevel) << (PWM_WGCTL1_CMPDCTLn_Pos + (2 * i)))); \
325  } \
326  } \
327  }while(0)
328 
341 #define PWM_TRIGGER_BRAKE(pwm, u32ChannelMask, u32BrakeType) ((pwm)->SWBRK |= ((u32ChannelMask) << (u32BrakeType)))
342 
353 #define PWM_SET_DEADZONE_CLK_SRC(pwm, u32ChannelNum, u32AfterPrescaler) \
354  (*(__IO uint32_t *) (&((pwm)->DTCTL0_1) + ((u32ChannelNum) >> 1)) = (*(__IO uint32_t *) (&((pwm)->DTCTL0_1) + ((u32ChannelNum) >> 1)) & ~PWM_DTCTL0_1_DTCKSEL_Msk) | \
355  ((u32AfterPrescaler) << PWM_DTCTL0_1_DTCKSEL_Pos))
356 
357 /*---------------------------------------------------------------------------------------------------------*/
358 /* Define PWM functions prototype */
359 /*---------------------------------------------------------------------------------------------------------*/
360 uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32UnitTimeNsec, uint32_t u32CaptureEdge);
361 uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle);
362 void PWM_Start(PWM_T *pwm, uint32_t u32ChannelMask);
363 void PWM_Stop(PWM_T *pwm, uint32_t u32ChannelMask);
364 void PWM_ForceStop(PWM_T *pwm, uint32_t u32ChannelMask);
365 void PWM_EnableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition);
366 void PWM_DisableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum);
367 void PWM_ClearADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition);
368 uint32_t PWM_GetADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum);
369 void PWM_EnableFaultBrake(PWM_T *pwm, uint32_t u32ChannelMask, uint32_t u32LevelMask, uint32_t u32BrakeSource);
370 void PWM_EnableCapture(PWM_T *pwm, uint32_t u32ChannelMask);
371 void PWM_DisableCapture(PWM_T *pwm, uint32_t u32ChannelMask);
372 void PWM_EnableOutput(PWM_T *pwm, uint32_t u32ChannelMask);
373 void PWM_DisableOutput(PWM_T *pwm, uint32_t u32ChannelMask);
374 void PWM_EnableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Duration);
375 void PWM_DisableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum);
376 void PWM_EnableCaptureInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge);
377 void PWM_DisableCaptureInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge);
378 void PWM_ClearCaptureIntFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge);
379 uint32_t PWM_GetCaptureIntFlag(PWM_T *pwm, uint32_t u32ChannelNum);
380 void PWM_EnableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntDutyType);
381 void PWM_DisableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum);
382 void PWM_ClearDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum);
383 uint32_t PWM_GetDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum);
384 void PWM_EnableLoadMode(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32LoadMode);
385 void PWM_DisableLoadMode(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32LoadMode);
386 void PWM_EnableFaultBrakeInt(PWM_T *pwm, uint32_t u32BrakeSource);
387 void PWM_DisableFaultBrakeInt(PWM_T *pwm, uint32_t u32BrakeSource);
388 void PWM_ClearFaultBrakeIntFlag(PWM_T *pwm, uint32_t u32BrakeSource);
389 uint32_t PWM_GetFaultBrakeIntFlag(PWM_T *pwm, uint32_t u32BrakeSource);
390 void PWM_EnablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntPeriodType);
391 void PWM_DisablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum);
392 void PWM_ClearPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum);
393 uint32_t PWM_GetPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum);
394 void PWM_EnableZeroInt(PWM_T *pwm, uint32_t u32ChannelNum);
395 void PWM_DisableZeroInt(PWM_T *pwm, uint32_t u32ChannelNum);
396 void PWM_ClearZeroIntFlag(PWM_T *pwm, uint32_t u32ChannelNum);
397 uint32_t PWM_GetZeroIntFlag(PWM_T *pwm, uint32_t u32ChannelNum);
398 void PWM_SetClockSource(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32ClkSrcSel);
399 void PWM_EnableBrakeNoiseFilter(PWM_T *pwm, uint32_t u32BrakePinNum, uint32_t u32ClkCnt, uint32_t u32ClkDivSel);
400 void PWM_DisableBrakeNoiseFilter(PWM_T *pwm, uint32_t u32BrakePinNum);
401 void PWM_EnableBrakePinInverse(PWM_T *pwm, uint32_t u32BrakePinNum);
402 void PWM_DisableBrakePinInverse(PWM_T *pwm, uint32_t u32BrakePinNum);
403 void PWM_SetBrakePinSource(PWM_T *pwm, uint32_t u32BrakePinNum, uint32_t u32SelAnotherModule);
404 uint32_t PWM_GetWrapAroundFlag(PWM_T *pwm, uint32_t u32ChannelNum);
405 void PWM_ClearWrapAroundFlag(PWM_T *pwm, uint32_t u32ChannelNum);
406 
407  /* end of group NANO103_PWM_EXPORTED_FUNCTIONS */
409  /* end of group NANO103_PWM_Driver */
411  /* end of group NANO103_Device_Driver */
413 
414 #ifdef __cplusplus
415 }
416 #endif
417 
418 #endif //__PWM_H__
419 
420 /*** (C) COPYRIGHT 2015 Nuvoton Technology Corp. ***/
void PWM_EnableLoadMode(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32LoadMode)
Enable load mode of selected channel.
Definition: pwm.c:598
void PWM_ClearADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition)
Clear selected channel trigger ADC flag.
Definition: pwm.c:279
uint32_t PWM_GetFaultBrakeIntFlag(PWM_T *pwm, uint32_t u32BrakeSource)
This function get fault brake interrupt flag of selected source.
Definition: pwm.c:683
void PWM_EnableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Condition)
Enable selected channel to trigger ADC.
Definition: pwm.c:236
uint32_t PWM_GetZeroIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get zero interrupt of selected channel.
Definition: pwm.c:792
void PWM_DisableZeroInt(PWM_T *pwm, uint32_t u32ChannelNum)
Disable zero interrupt of selected channel.
Definition: pwm.c:764
void PWM_SetClockSource(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32ClkSrcSel)
Set PWM clock source.
Definition: pwm.c:812
uint32_t PWM_GetPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get period interrupt of selected channel.
Definition: pwm.c:738
void PWM_EnablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntPeriodType)
Enable period interrupt of selected channel.
Definition: pwm.c:697
void PWM_EnableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32IntDutyType)
Enable duty interrupt of selected channel.
Definition: pwm.c:541
void PWM_EnableBrakePinInverse(PWM_T *pwm, uint32_t u32BrakePinNum)
Enable PWM brake pin inverse function.
Definition: pwm.c:863
void PWM_ClearCaptureIntFlag(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge)
Clear capture interrupt of selected channel.
Definition: pwm.c:509
void PWM_Stop(PWM_T *pwm, uint32_t u32ChannelMask)
Stop PWM module.
Definition: pwm.c:187
void PWM_ClearWrapAroundFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Clear the time-base counter reached its maximum value flag of selected channel.
Definition: pwm.c:918
void PWM_DisableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum)
Disable Dead zone of selected channel.
Definition: pwm.c:460
void PWM_EnableOutput(PWM_T *pwm, uint32_t u32ChannelMask)
Enables PWM output generation of selected channel(s)
Definition: pwm.c:414
void PWM_EnableCaptureInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge)
Enable capture interrupt of selected channel.
Definition: pwm.c:477
uint32_t PWM_GetADCTriggerFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get selected channel trigger ADC flag.
Definition: pwm.c:293
void PWM_DisableCaptureInt(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Edge)
Disable capture interrupt of selected channel.
Definition: pwm.c:493
void PWM_DisableOutput(PWM_T *pwm, uint32_t u32ChannelMask)
Disables PWM output generation of selected channel(s)
Definition: pwm.c:428
void PWM_ForceStop(PWM_T *pwm, uint32_t u32ChannelMask)
Stop PWM generation immediately by clear channel enable bit.
Definition: pwm.c:208
void PWM_EnableFaultBrake(PWM_T *pwm, uint32_t u32ChannelMask, uint32_t u32LevelMask, uint32_t u32BrakeSource)
This function enable fault brake of selected channel(s)
Definition: pwm.c:318
void PWM_ClearDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Clear duty interrupt flag of selected channel.
Definition: pwm.c:567
void PWM_Start(PWM_T *pwm, uint32_t u32ChannelMask)
Start PWM module.
Definition: pwm.c:166
void PWM_ClearZeroIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Clear zero interrupt of selected channel.
Definition: pwm.c:777
void PWM_DisableLoadMode(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32LoadMode)
Disable load mode of selected channel.
Definition: pwm.c:614
uint32_t PWM_GetWrapAroundFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get the time-base counter reached its maximum value flag of selected channel.
Definition: pwm.c:905
uint32_t PWM_GetCaptureIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get capture interrupt of selected channel.
Definition: pwm.c:525
void PWM_DisableADCTrigger(PWM_T *pwm, uint32_t u32ChannelNum)
Disable selected channel to trigger ADC.
Definition: pwm.c:258
void PWM_DisableFaultBrakeInt(PWM_T *pwm, uint32_t u32BrakeSource)
This function disable fault brake interrupt.
Definition: pwm.c:648
uint32_t PWM_ConfigOutputChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Frequency, uint32_t u32DutyCycle)
This function Configure PWM generator and get the nearest frequency in edge aligned auto-reload mode.
Definition: pwm.c:96
void PWM_EnableFaultBrakeInt(PWM_T *pwm, uint32_t u32BrakeSource)
This function enable fault brake interrupt.
Definition: pwm.c:630
void PWM_EnableDeadZone(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32Duration)
Enable Dead zone of selected channel.
Definition: pwm.c:444
uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u32UnitTimeNsec, uint32_t u32CaptureEdge)
Configure PWM capture and get the nearest unit time.
Definition: pwm.c:37
void PWM_SetBrakePinSource(PWM_T *pwm, uint32_t u32BrakePinNum, uint32_t u32SelAnotherModule)
Set PWM brake pin source.
Definition: pwm.c:890
void PWM_ClearFaultBrakeIntFlag(PWM_T *pwm, uint32_t u32BrakeSource)
This function clear fault brake interrupt of selected source.
Definition: pwm.c:665
void PWM_EnableCapture(PWM_T *pwm, uint32_t u32ChannelMask)
Enable capture of selected channel(s)
Definition: pwm.c:384
uint32_t PWM_GetDutyIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Get duty interrupt flag of selected channel.
Definition: pwm.c:582
void PWM_EnableBrakeNoiseFilter(PWM_T *pwm, uint32_t u32BrakePinNum, uint32_t u32ClkCnt, uint32_t u32ClkDivSel)
Enable PWM brake noise filter function.
Definition: pwm.c:836
void PWM_EnableZeroInt(PWM_T *pwm, uint32_t u32ChannelNum)
Enable zero interrupt of selected channel.
Definition: pwm.c:751
void PWM_DisableBrakePinInverse(PWM_T *pwm, uint32_t u32BrakePinNum)
Disable PWM brake pin inverse function.
Definition: pwm.c:876
void PWM_DisableDutyInt(PWM_T *pwm, uint32_t u32ChannelNum)
Disable duty interrupt of selected channel.
Definition: pwm.c:554
void PWM_DisableBrakeNoiseFilter(PWM_T *pwm, uint32_t u32BrakePinNum)
Disable PWM brake noise filter function.
Definition: pwm.c:850
void PWM_DisableCapture(PWM_T *pwm, uint32_t u32ChannelMask)
Disable capture of selected channel(s)
Definition: pwm.c:399
void PWM_DisablePeriodInt(PWM_T *pwm, uint32_t u32ChannelNum)
Disable period interrupt of selected channel.
Definition: pwm.c:710
void PWM_ClearPeriodIntFlag(PWM_T *pwm, uint32_t u32ChannelNum)
Clear period interrupt of selected channel.
Definition: pwm.c:723