| Nano103 BSP V3.01.002 The Board Support Package for Nano103 Series

Macros
SYS Exported Constants
NANO103 Device Driver » SYS Driver

## Macros
#define | CHIP_RST ((0x0<<24) | SYS_IPRST1_CHIPRST_Pos )
#define | CPU_RST ((0x0<<24) | SYS_IPRST1_CPURST_Pos )
#define | DMA_RST ((0x0<<24) | SYS_IPRST1_PDMARST_Pos )
#define | SC1_RST ((0x4<<24) | SYS_IPRST2_SC1RST_Pos )
#define | SC0_RST ((0x4<<24) | SYS_IPRST2_SC0RST_Pos )
#define | ADC_RST ((0x4<<24) | SYS_IPRST2_ADCRST_Pos )
#define | ACMP0_RST ((0x4<<24) | SYS_IPRST2_ACMP0RST_Pos )
#define | PWM0_RST ((0x4<<24) | SYS_IPRST2_PWM0RST_Pos )
#define | UART1_RST ((0x4<<24) | SYS_IPRST2_UART1RST_Pos )
#define | UART0_RST ((0x4<<24) | SYS_IPRST2_UART0RST_Pos )
#define | SPI3_RST ((0x4<<24) | SYS_IPRST2_SPI3RST_Pos )
#define | SPI2_RST ((0x4<<24) | SYS_IPRST2_SPI2RST_Pos )
#define | SPI1_RST ((0x4<<24) | SYS_IPRST2_SPI1RST_Pos )
#define | SPI0_RST ((0x4<<24) | SYS_IPRST2_SPI0RST_Pos )
#define | I2C1_RST ((0x4<<24) | SYS_IPRST2_I2C1RST_Pos )
#define | I2C0_RST ((0x4<<24) | SYS_IPRST2_I2C0RST_Pos )
#define | TMR3_RST ((0x4<<24) | SYS_IPRST2_TMR3RST_Pos )
#define | TMR2_RST ((0x4<<24) | SYS_IPRST2_TMR2RST_Pos )
#define | TMR1_RST ((0x4<<24) | SYS_IPRST2_TMR1RST_Pos )
#define | TMR0_RST ((0x4<<24) | SYS_IPRST2_TMR0RST_Pos )
#define | GPIO_RST ((0x4<<24) | SYS_IPRST2_GPIORST_Pos )
#define | SYS_BODCTL_BOD_RST_EN (1UL<<SYS_BODCTL_BODREN_Pos)
#define | SYS_BODCTL_BOD_INTERRUPT_EN (1UL<<SYS_BODCTL_BODIE_Pos)
#define | SYS_BODCTL_BODVL_1_7V (0UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_1_8V (1UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_1_9V (2UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_0V (3UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_1V (4UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_2V (5UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_3V (6UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_4V (7UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_5V (8UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_6V (9UL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_7V (0xAUL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_8V (0xBUL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_2_9V (0xCUL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_3_0V (0xDUL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_BODVL_3_1V (0xEUL<<SYS_BODCTL_BODVL_Pos)
#define | SYS_BODCTL_LPBOD_RST_EN (1UL<<SYS_BODCTL_LPBODREN_Pos)
#define | SYS_BODCTL_LPBOD_INTERRUPT_EN (1UL<<SYS_BODCTL_LPBODIE_Pos)
#define | SYS_BODCTL_LPBODVL_2_0V (0UL<<SYS_BODCTL_LPBODVL_Pos)
#define | SYS_BODCTL_LPBODVL_2_5V (1UL<<SYS_BODCTL_LPBODVL_Pos)
#define | SYS_IVREFCTL_BGP_EN ((uint32_t)0x00000001)
#define | SYS_IVREFCTL_REG_EN ((uint32_t)0x00000002)
#define | SYS_IVREFCTL_SEL25 ((uint32_t)0x00000008)
#define | SYS_IVREFCTL_SEL18 ((uint32_t)0x00000004)
#define | SYS_IVREFCTL_SEL15 ((uint32_t)0x00000000)
#define | SYS_IVREFCTL_EXTMODE ((uint32_t)0x00000010)
#define | SYS_LDOCTL_LDO_LEVEL12 ((uint32_t)0x00000000)
#define | SYS_LDOCTL_LDO_LEVEL16 ((uint32_t)0x00000004)
#define | SYS_LDOCTL_LDO_LEVEL18 ((uint32_t)0x00000008)
#define | SYS_IRC0TCTL_TRIM_11_0592M ((uint32_t)0x00000001)
#define | SYS_IRC0TCTL_TRIM_12M ((uint32_t)0x00000002)
#define | SYS_IRC0TCTL_TRIM_12_288M ((uint32_t)0x00000003)
#define | SYS_IRC0TCTL_TRIM_16M ((uint32_t)0x00000004)
#define | SYS_IRC1TCTL_TRIM_36M ((uint32_t)0x00000002)
#define | SYS_MIRCTCTL_TRIM_4M ((uint32_t)0x00000002)
#define | SYS_IRCTCTL_LOOP_4CLK ((uint32_t)0x00000000)
#define | SYS_IRCTCTL_LOOP_8CLK ((uint32_t)0x00000010)
#define | SYS_IRCTCTL_LOOP_16CLK ((uint32_t)0x00000020)
#define | SYS_IRCTCTL_LOOP_32CLK ((uint32_t)0x00000030)
#define | SYS_IRCTCTL_RETRY_64 ((uint32_t)0x00000000)
#define | SYS_IRCTCTL_RETRY_128 ((uint32_t)0x00000040)
#define | SYS_IRCTCTL_RETRY_256 ((uint32_t)0x00000080)
#define | SYS_IRCTCTL_RETRY_512 ((uint32_t)0x000000C0)
#define | SYS_IRCTCTL_CLKERR_STOP ((uint32_t)0x00000100)
#define | SYS_IRCTIEN_DISABLE ((uint32_t)0x00000000)
#define | SYS_IRCTIEN_FAIL_EN ((uint32_t)0x00000002)
#define | SYS_IRCTIEN_32KERR_EN ((uint32_t)0x00000004)
#define | SYS_IRCTISTS_FREQLOCK ((uint32_t)0x00000001)
#define | SYS_IRCTISTS_FAIL_INT ((uint32_t)0x00000002)
#define | SYS_IRCTISTS_32KERR_INT ((uint32_t)0x00000004)
#define | SYS_GPA_MFPL_PA0MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA0MFP_Pos)
#define | SYS_GPA_MFPL_PA0MFP_ADC_CH0 (0x01UL<<SYS_GPA_MFPL_PA0MFP_Pos)
#define | SYS_GPA_MFPL_PA0MFP_ACMP0_P (0x02UL<<SYS_GPA_MFPL_PA0MFP_Pos)
#define | SYS_GPA_MFPL_PA0MFP_TM2_EXT (0x03UL<<SYS_GPA_MFPL_PA0MFP_Pos)
#define | SYS_GPA_MFPL_PA0MFP_PWM0_CH2 (0x05UL<<SYS_GPA_MFPL_PA0MFP_Pos)
#define | SYS_GPA_MFPL_PA0MFP_SPI3_MOSI1 (0x06UL<<SYS_GPA_MFPL_PA0MFP_Pos)
#define | SYS_GPA_MFPL_PA1MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA1MFP_Pos)
#define | SYS_GPA_MFPL_PA1MFP_ADC_CH1 (0x01UL<<SYS_GPA_MFPL_PA1MFP_Pos)
#define | SYS_GPA_MFPL_PA1MFP_ACMP0_N (0x02UL<<SYS_GPA_MFPL_PA1MFP_Pos)
#define | SYS_GPA_MFPL_PA1MFP_SPI3_MISO1 (0x06UL<<SYS_GPA_MFPL_PA1MFP_Pos)
#define | SYS_GPA_MFPL_PA2MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA2MFP_Pos)
#define | SYS_GPA_MFPL_PA2MFP_ADC_CH2 (0x01UL<<SYS_GPA_MFPL_PA2MFP_Pos)
#define | SYS_GPA_MFPL_PA2MFP_UART1_RXD (0x05UL<<SYS_GPA_MFPL_PA2MFP_Pos)
#define | SYS_GPA_MFPL_PA3MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA3MFP_Pos)
#define | SYS_GPA_MFPL_PA3MFP_ADC_CH3 (0x01UL<<SYS_GPA_MFPL_PA3MFP_Pos)
#define | SYS_GPA_MFPL_PA3MFP_UART1_TXD (0x05UL<<SYS_GPA_MFPL_PA3MFP_Pos)
#define | SYS_GPA_MFPL_PA3MFP_SPI3_MOSI0 (0x06UL<<SYS_GPA_MFPL_PA3MFP_Pos)
#define | SYS_GPA_MFPL_PA4MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA4MFP_Pos)
#define | SYS_GPA_MFPL_PA4MFP_ADC_CH4 (0x01UL<<SYS_GPA_MFPL_PA4MFP_Pos)
#define | SYS_GPA_MFPL_PA4MFP_I2C0_SDA (0x05UL<<SYS_GPA_MFPL_PA4MFP_Pos)
#define | SYS_GPA_MFPL_PA4MFP_SPI3_MISO0 (0x06UL<<SYS_GPA_MFPL_PA4MFP_Pos)
#define | SYS_GPA_MFPL_PA5MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA5MFP_Pos)
#define | SYS_GPA_MFPL_PA5MFP_ADC_CH5 (0x01UL<<SYS_GPA_MFPL_PA5MFP_Pos)
#define | SYS_GPA_MFPL_PA5MFP_I2C0_SCL (0x05UL<<SYS_GPA_MFPL_PA5MFP_Pos)
#define | SYS_GPA_MFPL_PA5MFP_SPI3_CLK (0x06UL<<SYS_GPA_MFPL_PA5MFP_Pos)
#define | SYS_GPA_MFPL_PA6MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA6MFP_Pos)
#define | SYS_GPA_MFPL_PA6MFP_ADC_CH6 (0x01UL<<SYS_GPA_MFPL_PA6MFP_Pos)
#define | SYS_GPA_MFPL_PA6MFP_ACMP0_O (0x02UL<<SYS_GPA_MFPL_PA6MFP_Pos)
#define | SYS_GPA_MFPL_PA6MFP_TM3_EXT (0x03UL<<SYS_GPA_MFPL_PA6MFP_Pos)
#define | SYS_GPA_MFPL_PA6MFP_TM3_CNT (0x04UL<<SYS_GPA_MFPL_PA6MFP_Pos)
#define | SYS_GPA_MFPL_PA6MFP_PWM0_CH3 (0x05UL<<SYS_GPA_MFPL_PA6MFP_Pos)
#define | SYS_GPA_MFPL_PA6MFP_SPI3_SS0 (0x06UL<<SYS_GPA_MFPL_PA6MFP_Pos)
#define | SYS_GPA_MFPL_PA6MFP_TM3_OUT (0x07UL<<SYS_GPA_MFPL_PA6MFP_Pos)
#define | SYS_GPA_MFPH_PA8MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA8MFP_Pos)
#define | SYS_GPA_MFPH_PA8MFP_I2C0_SDA (0x01UL<<SYS_GPA_MFPH_PA8MFP_Pos)
#define | SYS_GPA_MFPH_PA8MFP_TM0_CNT (0x02UL<<SYS_GPA_MFPH_PA8MFP_Pos)
#define | SYS_GPA_MFPH_PA8MFP_SC0_CLK (0x03UL<<SYS_GPA_MFPH_PA8MFP_Pos)
#define | SYS_GPA_MFPH_PA8MFP_SPI2_SS0 (0x04UL<<SYS_GPA_MFPH_PA8MFP_Pos)
#define | SYS_GPA_MFPH_PA8MFP_TM0_OUT (0x05UL<<SYS_GPA_MFPH_PA8MFP_Pos)
#define | SYS_GPA_MFPH_PA8MFP_UART1_nCTS (0x06UL<<SYS_GPA_MFPH_PA8MFP_Pos)
#define | SYS_GPA_MFPH_PA9MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA9MFP_Pos)
#define | SYS_GPA_MFPH_PA9MFP_I2C0_SCL (0x01UL<<SYS_GPA_MFPH_PA9MFP_Pos)
#define | SYS_GPA_MFPH_PA9MFP_TM1_CNT (0x02UL<<SYS_GPA_MFPH_PA9MFP_Pos)
#define | SYS_GPA_MFPH_PA9MFP_SC0_DAT (0x03UL<<SYS_GPA_MFPH_PA9MFP_Pos)
#define | SYS_GPA_MFPH_PA9MFP_SPI2_CLK (0x04UL<<SYS_GPA_MFPH_PA9MFP_Pos)
#define | SYS_GPA_MFPH_PA9MFP_TM1_OUT (0x05UL<<SYS_GPA_MFPH_PA9MFP_Pos)
#define | SYS_GPA_MFPH_PA9MFP_UART1_nRTS (0x06UL<<SYS_GPA_MFPH_PA9MFP_Pos)
#define | SYS_GPA_MFPH_PA9MFP_SNOOPER (0x07UL<<SYS_GPA_MFPH_PA9MFP_Pos)
#define | SYS_GPA_MFPH_PA10MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA10MFP_Pos)
#define | SYS_GPA_MFPH_PA10MFP_I2C1_SDA (0x01UL<<SYS_GPA_MFPH_PA10MFP_Pos)
#define | SYS_GPA_MFPH_PA10MFP_TM2_CNT (0x02UL<<SYS_GPA_MFPH_PA10MFP_Pos)
#define | SYS_GPA_MFPH_PA10MFP_SC0_PWR (0x03UL<<SYS_GPA_MFPH_PA10MFP_Pos)
#define | SYS_GPA_MFPH_PA10MFP_SPI2_MISO0 (0x04UL<<SYS_GPA_MFPH_PA10MFP_Pos)
#define | SYS_GPA_MFPH_PA10MFP_TM2_OUT (0x05UL<<SYS_GPA_MFPH_PA10MFP_Pos)
#define | SYS_GPA_MFPH_PA11MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA11MFP_Pos)
#define | SYS_GPA_MFPH_PA11MFP_I2C1_SCL (0x01UL<<SYS_GPA_MFPH_PA11MFP_Pos)
#define | SYS_GPA_MFPH_PA11MFP_TM3_CNT (0x02UL<<SYS_GPA_MFPH_PA11MFP_Pos)
#define | SYS_GPA_MFPH_PA11MFP_SC0_RST (0x03UL<<SYS_GPA_MFPH_PA11MFP_Pos)
#define | SYS_GPA_MFPH_PA11MFP_SPI2_MOSI0 (0x04UL<<SYS_GPA_MFPH_PA11MFP_Pos)
#define | SYS_GPA_MFPH_PA11MFP_TM3_OUT (0x05UL<<SYS_GPA_MFPH_PA11MFP_Pos)
#define | SYS_GPA_MFPH_PA12MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA12MFP_Pos)
#define | SYS_GPA_MFPH_PA12MFP_PWM0_CH0 (0x01UL<<SYS_GPA_MFPH_PA12MFP_Pos)
#define | SYS_GPA_MFPH_PA12MFP_TM0_EXT (0x03UL<<SYS_GPA_MFPH_PA12MFP_Pos)
#define | SYS_GPA_MFPH_PA12MFP_I2C0_SDA (0x05UL<<SYS_GPA_MFPH_PA12MFP_Pos)
#define | SYS_GPA_MFPH_PA13MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA13MFP_Pos)
#define | SYS_GPA_MFPH_PA13MFP_PWM0_CH1 (0x01UL<<SYS_GPA_MFPH_PA13MFP_Pos)
#define | SYS_GPA_MFPH_PA13MFP_TM1_EXT (0x03UL<<SYS_GPA_MFPH_PA13MFP_Pos)
#define | SYS_GPA_MFPH_PA13MFP_I2C0_SCL (0x05UL<<SYS_GPA_MFPH_PA13MFP_Pos)
#define | SYS_GPA_MFPH_PA14MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA14MFP_Pos)
#define | SYS_GPA_MFPH_PA14MFP_PWM0_CH2 (0x01UL<<SYS_GPA_MFPH_PA14MFP_Pos)
#define | SYS_GPA_MFPH_PA14MFP_I2C1_SDA (0x02UL<<SYS_GPA_MFPH_PA14MFP_Pos)
#define | SYS_GPA_MFPH_PA14MFP_TM2_EXT (0x03UL<<SYS_GPA_MFPH_PA14MFP_Pos)
#define | SYS_GPA_MFPH_PA14MFP_TM2_CNT (0x05UL<<SYS_GPA_MFPH_PA14MFP_Pos)
#define | SYS_GPA_MFPH_PA14MFP_UART0_RXD (0x06UL<<SYS_GPA_MFPH_PA14MFP_Pos)
#define | SYS_GPA_MFPH_PA14MFP_TM2_OUT (0x07UL<<SYS_GPA_MFPH_PA14MFP_Pos)
#define | SYS_GPA_MFPH_PA15MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA15MFP_Pos)
#define | SYS_GPA_MFPH_PA15MFP_PWM0_CH3 (0x01UL<<SYS_GPA_MFPH_PA15MFP_Pos)
#define | SYS_GPA_MFPH_PA15MFP_I2C1_SCL (0x02UL<<SYS_GPA_MFPH_PA15MFP_Pos)
#define | SYS_GPA_MFPH_PA15MFP_TM3_EXT (0x03UL<<SYS_GPA_MFPH_PA15MFP_Pos)
#define | SYS_GPA_MFPH_PA15MFP_SC0_PWR (0x04UL<<SYS_GPA_MFPH_PA15MFP_Pos)
#define | SYS_GPA_MFPH_PA15MFP_TM3_CNT (0x05UL<<SYS_GPA_MFPH_PA15MFP_Pos)
#define | SYS_GPA_MFPH_PA15MFP_UART0_TXD (0x06UL<<SYS_GPA_MFPH_PA15MFP_Pos)
#define | SYS_GPA_MFPH_PA15MFP_TM3_OUT (0x07UL<<SYS_GPA_MFPH_PA15MFP_Pos)
#define | SYS_GPB_MFPL_PB0MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB0MFP_Pos)
#define | SYS_GPB_MFPL_PB0MFP_UART0_RXD (0x01UL<<SYS_GPB_MFPL_PB0MFP_Pos)
#define | SYS_GPB_MFPL_PB0MFP_SPI1_MOSI0 (0x03UL<<SYS_GPB_MFPL_PB0MFP_Pos)
#define | SYS_GPB_MFPL_PB1MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB1MFP_Pos)
#define | SYS_GPB_MFPL_PB1MFP_UART0_TXD (0x01UL<<SYS_GPB_MFPL_PB1MFP_Pos)
#define | SYS_GPB_MFPL_PB1MFP_SPI1_MISO0 (0x03UL<<SYS_GPB_MFPL_PB1MFP_Pos)
#define | SYS_GPB_MFPL_PB2MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB2MFP_Pos)
#define | SYS_GPB_MFPL_PB2MFP_UART0_nRTS (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)
#define | SYS_GPB_MFPL_PB2MFP_SPI1_CLK (0x03UL<<SYS_GPB_MFPL_PB2MFP_Pos)
#define | SYS_GPB_MFPL_PB2MFP_CLKO (0x04UL<<SYS_GPB_MFPL_PB2MFP_Pos)
#define | SYS_GPB_MFPL_PB3MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB3MFP_Pos)
#define | SYS_GPB_MFPL_PB3MFP_UART0_nCTS (0x01UL<<SYS_GPB_MFPL_PB3MFP_Pos)
#define | SYS_GPB_MFPL_PB3MFP_SPI1_SS0 (0x03UL<<SYS_GPB_MFPL_PB3MFP_Pos)
#define | SYS_GPB_MFPL_PB3MFP_SC1_CD (0x04UL<<SYS_GPB_MFPL_PB3MFP_Pos)
#define | SYS_GPB_MFPL_PB4MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB4MFP_Pos)
#define | SYS_GPB_MFPL_PB4MFP_UART1_RXD (0x01UL<<SYS_GPB_MFPL_PB4MFP_Pos)
#define | SYS_GPB_MFPL_PB4MFP_SC0_CD (0x03UL<<SYS_GPB_MFPL_PB4MFP_Pos)
#define | SYS_GPB_MFPL_PB4MFP_SPI2_SS0 (0x04UL<<SYS_GPB_MFPL_PB4MFP_Pos)
#define | SYS_GPB_MFPL_PB4MFP_RTC_HZ (0x06UL<<SYS_GPB_MFPL_PB4MFP_Pos)
#define | SYS_GPB_MFPL_PB5MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB5MFP_Pos)
#define | SYS_GPB_MFPL_PB5MFP_UART1_TXD (0x01UL<<SYS_GPB_MFPL_PB5MFP_Pos)
#define | SYS_GPB_MFPL_PB5MFP_SC0_RST (0x03UL<<SYS_GPB_MFPL_PB5MFP_Pos)
#define | SYS_GPB_MFPL_PB5MFP_SPI2_CLK (0x04UL<<SYS_GPB_MFPL_PB5MFP_Pos)
#define | SYS_GPB_MFPL_PB6MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB6MFP_Pos)
#define | SYS_GPB_MFPL_PB6MFP_UART1_nRTS (0x01UL<<SYS_GPB_MFPL_PB6MFP_Pos)
#define | SYS_GPB_MFPL_PB6MFP_SPI2_MISO0 (0x04UL<<SYS_GPB_MFPL_PB6MFP_Pos)
#define | SYS_GPB_MFPL_PB7MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB7MFP_Pos)
#define | SYS_GPB_MFPL_PB7MFP_UART1_nCTS (0x01UL<<SYS_GPB_MFPL_PB7MFP_Pos)
#define | SYS_GPB_MFPL_PB7MFP_SPI2_MOSI0 (0x04UL<<SYS_GPB_MFPL_PB7MFP_Pos)
#define | SYS_GPB_MFPH_PB8MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB8MFP_Pos)
#define | SYS_GPB_MFPH_PB8MFP_STADC (0x01UL<<SYS_GPB_MFPH_PB8MFP_Pos)
#define | SYS_GPB_MFPH_PB8MFP_TM0_CNT (0x02UL<<SYS_GPB_MFPH_PB8MFP_Pos)
#define | SYS_GPB_MFPH_PB8MFP_INT0 (0x03UL<<SYS_GPB_MFPH_PB8MFP_Pos)
#define | SYS_GPB_MFPH_PB8MFP_TM0_OUT (0x04UL<<SYS_GPB_MFPH_PB8MFP_Pos)
#define | SYS_GPB_MFPH_PB8MFP_SNOOPER (0x07UL<<SYS_GPB_MFPH_PB8MFP_Pos)
#define | SYS_GPB_MFPH_PB9MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB9MFP_Pos)
#define | SYS_GPB_MFPH_PB9MFP_SPI1_SS1 (0x01UL<<SYS_GPB_MFPH_PB9MFP_Pos)
#define | SYS_GPB_MFPH_PB9MFP_TM1_CNT (0x02UL<<SYS_GPB_MFPH_PB9MFP_Pos)
#define | SYS_GPB_MFPH_PB9MFP_TM1_OUT (0x04UL<<SYS_GPB_MFPH_PB9MFP_Pos)
#define | SYS_GPB_MFPH_PB9MFP_INT0 (0x05UL<<SYS_GPB_MFPH_PB9MFP_Pos)
#define | SYS_GPB_MFPH_PB10MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB10MFP_Pos)
#define | SYS_GPB_MFPH_PB10MFP_SPI0_MOSI0 (0x01UL<<SYS_GPB_MFPH_PB10MFP_Pos)
#define | SYS_GPB_MFPH_PB10MFP_TM2_CNT (0x02UL<<SYS_GPB_MFPH_PB10MFP_Pos)
#define | SYS_GPB_MFPH_PB10MFP_TM2_OUT (0x04UL<<SYS_GPB_MFPH_PB10MFP_Pos)
#define | SYS_GPB_MFPH_PB10MFP_SPI0_SS1 (0x05UL<<SYS_GPB_MFPH_PB10MFP_Pos)
#define | SYS_GPB_MFPH_PB11MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB11MFP_Pos)
#define | SYS_GPB_MFPH_PB11MFP_PWM0_CH4 (0x01UL<<SYS_GPB_MFPH_PB11MFP_Pos)
#define | SYS_GPB_MFPH_PB11MFP_TM3_CNT (0x02UL<<SYS_GPB_MFPH_PB11MFP_Pos)
#define | SYS_GPB_MFPH_PB11MFP_TM3_OUT (0x04UL<<SYS_GPB_MFPH_PB11MFP_Pos)
#define | SYS_GPB_MFPH_PB11MFP_SPI0_MISO0 (0x05UL<<SYS_GPB_MFPH_PB11MFP_Pos)
#define | SYS_GPB_MFPH_PB13MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB13MFP_Pos)
#define | SYS_GPB_MFPH_PB13MFP_SPI2_MISO1 (0x03UL<<SYS_GPB_MFPH_PB13MFP_Pos)
#define | SYS_GPB_MFPH_PB13MFP_SNOOPER (0x07UL<<SYS_GPB_MFPH_PB13MFP_Pos)
#define | SYS_GPB_MFPH_PB14MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB14MFP_Pos)
#define | SYS_GPB_MFPH_PB14MFP_INT0 (0x01UL<<SYS_GPB_MFPH_PB14MFP_Pos)
#define | SYS_GPB_MFPH_PB14MFP_SPI2_MOSI1 (0x03UL<<SYS_GPB_MFPH_PB14MFP_Pos)
#define | SYS_GPB_MFPH_PB14MFP_SPI2_SS1 (0x04UL<<SYS_GPB_MFPH_PB14MFP_Pos)
#define | SYS_GPB_MFPH_PB15MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB15MFP_Pos)
#define | SYS_GPB_MFPH_PB15MFP_INT1 (0x01UL<<SYS_GPB_MFPH_PB15MFP_Pos)
#define | SYS_GPB_MFPH_PB15MFP_SNOOPER (0x03UL<<SYS_GPB_MFPH_PB15MFP_Pos)
#define | SYS_GPB_MFPH_PB15MFP_SC1_CD (0x04UL<<SYS_GPB_MFPH_PB15MFP_Pos)
#define | SYS_GPC_MFPL_PC0MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC0MFP_Pos)
#define | SYS_GPC_MFPL_PC0MFP_SPI0_SS0 (0x01UL<<SYS_GPC_MFPL_PC0MFP_Pos)
#define | SYS_GPC_MFPL_PC0MFP_SC1_CLK (0x04UL<<SYS_GPC_MFPL_PC0MFP_Pos)
#define | SYS_GPC_MFPL_PC0MFP_PWM0_BRAKE1 (0x05UL<<SYS_GPC_MFPL_PC0MFP_Pos)
#define | SYS_GPC_MFPL_PC1MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC1MFP_Pos)
#define | SYS_GPC_MFPL_PC1MFP_SPI0_CLK (0x01UL<<SYS_GPC_MFPL_PC1MFP_Pos)
#define | SYS_GPC_MFPL_PC1MFP_SC1_DAT (0x04UL<<SYS_GPC_MFPL_PC1MFP_Pos)
#define | SYS_GPC_MFPL_PC1MFP_PWM0_BRAKE0 (0x05UL<<SYS_GPC_MFPL_PC1MFP_Pos)
#define | SYS_GPC_MFPL_PC2MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC2MFP_Pos)
#define | SYS_GPC_MFPL_PC2MFP_SPI0_MISO0 (0x01UL<<SYS_GPC_MFPL_PC2MFP_Pos)
#define | SYS_GPC_MFPL_PC2MFP_SC1_PWR (0x04UL<<SYS_GPC_MFPL_PC2MFP_Pos)
#define | SYS_GPC_MFPL_PC2MFP_PWM0_BRAKE1 (0x05UL<<SYS_GPC_MFPL_PC2MFP_Pos)
#define | SYS_GPC_MFPL_PC3MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC3MFP_Pos)
#define | SYS_GPC_MFPL_PC3MFP_SPI0_MOSI0 (0x01UL<<SYS_GPC_MFPL_PC3MFP_Pos)
#define | SYS_GPC_MFPL_PC3MFP_SC1_RST (0x04UL<<SYS_GPC_MFPL_PC3MFP_Pos)
#define | SYS_GPC_MFPL_PC3MFP_PWM0_BRAKE0 (0x05UL<<SYS_GPC_MFPL_PC3MFP_Pos)
#define | SYS_GPC_MFPL_PC6MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC6MFP_Pos)
#define | SYS_GPC_MFPL_PC6MFP_UART1_RXD (0x01UL<<SYS_GPC_MFPL_PC6MFP_Pos)
#define | SYS_GPC_MFPL_PC6MFP_TM0_EXT (0x03UL<<SYS_GPC_MFPL_PC6MFP_Pos)
#define | SYS_GPC_MFPL_PC6MFP_SC1_CD (0x04UL<<SYS_GPC_MFPL_PC6MFP_Pos)
#define | SYS_GPC_MFPL_PC6MFP_PWM0_CH0 (0x05UL<<SYS_GPC_MFPL_PC6MFP_Pos)
#define | SYS_GPC_MFPL_PC7MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC7MFP_Pos)
#define | SYS_GPC_MFPL_PC7MFP_UART1_TXD (0x01UL<<SYS_GPC_MFPL_PC7MFP_Pos)
#define | SYS_GPC_MFPL_PC7MFP_ADC_CH7 (0x02UL<<SYS_GPC_MFPL_PC7MFP_Pos)
#define | SYS_GPC_MFPL_PC7MFP_TM1_EXT (0x03UL<<SYS_GPC_MFPL_PC7MFP_Pos)
#define | SYS_GPC_MFPL_PC7MFP_PWM0_CH1 (0x05UL<<SYS_GPC_MFPL_PC7MFP_Pos)
#define | SYS_GPC_MFPH_PC8MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC8MFP_Pos)
#define | SYS_GPC_MFPH_PC8MFP_SPI1_SS0 (0x01UL<<SYS_GPC_MFPH_PC8MFP_Pos)
#define | SYS_GPC_MFPH_PC8MFP_I2C1_SDA (0x05UL<<SYS_GPC_MFPH_PC8MFP_Pos)
#define | SYS_GPC_MFPH_PC9MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC9MFP_Pos)
#define | SYS_GPC_MFPH_PC9MFP_SPI1_CLK (0x01UL<<SYS_GPC_MFPH_PC9MFP_Pos)
#define | SYS_GPC_MFPH_PC9MFP_I2C1_SCL (0x05UL<<SYS_GPC_MFPH_PC9MFP_Pos)
#define | SYS_GPC_MFPH_PC10MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC10MFP_Pos)
#define | SYS_GPC_MFPH_PC10MFP_SPI1_MISO0 (0x01UL<<SYS_GPC_MFPH_PC10MFP_Pos)
#define | SYS_GPC_MFPH_PC10MFP_UART1_RXD (0x05UL<<SYS_GPC_MFPH_PC10MFP_Pos)
#define | SYS_GPC_MFPH_PC11MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC11MFP_Pos)
#define | SYS_GPC_MFPH_PC11MFP_SPI1_MOSI0 (0x01UL<<SYS_GPC_MFPH_PC11MFP_Pos)
#define | SYS_GPC_MFPH_PC11MFP_UART1_TXD (0x05UL<<SYS_GPC_MFPH_PC11MFP_Pos)
#define | SYS_GPC_MFPH_PC14MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC14MFP_Pos)
#define | SYS_GPC_MFPH_PC14MFP_UART1_nCTS (0x01UL<<SYS_GPC_MFPH_PC14MFP_Pos)
#define | SYS_GPC_MFPH_PC15MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC15MFP_Pos)
#define | SYS_GPC_MFPH_PC15MFP_UART1_nRTS (0x01UL<<SYS_GPC_MFPH_PC15MFP_Pos)
#define | SYS_GPC_MFPH_PC15MFP_TM0_EXT (0x03UL<<SYS_GPC_MFPH_PC15MFP_Pos)
#define | SYS_GPD_MFPL_PD6MFP_GPIO (0x00UL<<SYS_GPD_MFPL_PD6MFP_Pos)
#define | SYS_GPD_MFPL_PD6MFP_SPI1_MOSI1 (0x03UL<<SYS_GPD_MFPL_PD6MFP_Pos)
#define | SYS_GPD_MFPL_PD6MFP_SC1_RST (0x04UL<<SYS_GPD_MFPL_PD6MFP_Pos)
#define | SYS_GPD_MFPL_PD7MFP_GPIO (0x00UL<<SYS_GPD_MFPL_PD7MFP_Pos)
#define | SYS_GPD_MFPL_PD7MFP_SPI1_MISO1 (0x03UL<<SYS_GPD_MFPL_PD7MFP_Pos)
#define | SYS_GPD_MFPL_PD7MFP_SC1_PWR (0x04UL<<SYS_GPD_MFPL_PD7MFP_Pos)
#define | SYS_GPD_MFPH_PD14MFP_GPIO (0x00UL<<SYS_GPD_MFPH_PD14MFP_Pos)
#define | SYS_GPD_MFPH_PD14MFP_SPI0_MOSI1 (0x01UL<<SYS_GPD_MFPH_PD14MFP_Pos)
#define | SYS_GPD_MFPH_PD14MFP_SC1_DAT (0x04UL<<SYS_GPD_MFPH_PD14MFP_Pos)
#define | SYS_GPD_MFPH_PD15MFP_GPIO (0x00UL<<SYS_GPD_MFPH_PD15MFP_Pos)
#define | SYS_GPD_MFPH_PD15MFP_SPI0_MISO1 (0x01UL<<SYS_GPD_MFPH_PD15MFP_Pos)
#define | SYS_GPD_MFPH_PD15MFP_SC1_CLK (0x04UL<<SYS_GPD_MFPH_PD15MFP_Pos)
#define | SYS_GPE_MFPL_PE5MFP_GPIO (0x00UL<<SYS_GPE_MFPL_PE5MFP_Pos)
#define | SYS_GPE_MFPL_PE5MFP_PWM0_CH5 (0x01UL<<SYS_GPE_MFPL_PE5MFP_Pos)
#define | SYS_GPE_MFPL_PE5MFP_RTC_HZ (0x06UL<<SYS_GPE_MFPL_PE5MFP_Pos)
#define | SYS_GPF_MFPL_PF0MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF0MFP_Pos)
#define | SYS_GPF_MFPL_PF0MFP_INT0 (0x05UL<<SYS_GPF_MFPL_PF0MFP_Pos)
#define | SYS_GPF_MFPL_PF0MFP_ICE_DAT (0x07UL<<SYS_GPF_MFPL_PF0MFP_Pos)
#define | SYS_GPF_MFPL_PF1MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF1MFP_Pos)
#define | SYS_GPF_MFPL_PF1MFP_CLKO (0x04UL<<SYS_GPF_MFPL_PF1MFP_Pos)
#define | SYS_GPF_MFPL_PF1MFP_INT1 (0x05UL<<SYS_GPF_MFPL_PF1MFP_Pos)
#define | SYS_GPF_MFPL_PF1MFP_ICE_CLK (0x07UL<<SYS_GPF_MFPL_PF1MFP_Pos)
#define | SYS_GPF_MFPL_PF2MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF2MFP_Pos)
#define | SYS_GPF_MFPL_PF2MFP_XT1_OUT (0x07UL<<SYS_GPF_MFPL_PF2MFP_Pos)
#define | SYS_GPF_MFPL_PF3MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF3MFP_Pos)
#define | SYS_GPF_MFPL_PF3MFP_XT1_IN (0x07UL<<SYS_GPF_MFPL_PF3MFP_Pos)
#define | SYS_GPF_MFPL_PF6MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF6MFP_Pos)
#define | SYS_GPF_MFPL_PF6MFP_I2C1_SDA (0x01UL<<SYS_GPF_MFPL_PF6MFP_Pos)
#define | SYS_GPF_MFPL_PF6MFP_X32_OUT (0x07UL<<SYS_GPF_MFPL_PF6MFP_Pos)
#define | SYS_GPF_MFPL_PF7MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF7MFP_Pos)
#define | SYS_GPF_MFPL_PF7MFP_I2C1_SCL (0x01UL<<SYS_GPF_MFPL_PF7MFP_Pos)
#define | SYS_GPF_MFPL_PF7MFP_SC0_CD (0x03UL<<SYS_GPF_MFPL_PF7MFP_Pos)
#define | SYS_GPF_MFPL_PF7MFP_X32_IN (0x07UL<<SYS_GPF_MFPL_PF7MFP_Pos)

## Detailed Description

## Macro Definition Documentation

## ◆ ACMP0_RST

#define ACMP0_RST ((0x4<<24) | SYS_IPRST2_ACMP0RST_Pos )

ACMP0 reset is one of the SYS_ResetModule parameter

Definition at line 41 of file sys.h.

## ◆ ADC_RST

#define ADC_RST ((0x4<<24) | SYS_IPRST2_ADCRST_Pos )

ADC reset is one of the SYS_ResetModule parameter

Definition at line 40 of file sys.h.

## ◆ CHIP_RST

#define CHIP_RST ((0x0<<24) | SYS_IPRST1_CHIPRST_Pos )

CPU reset is one of the SYS_ResetModule parameter

Definition at line 35 of file sys.h.

## ◆ CPU_RST

#define CPU_RST ((0x0<<24) | SYS_IPRST1_CPURST_Pos )

CHIP reset is one of the SYS_ResetModule parameter

Definition at line 36 of file sys.h.

## ◆ DMA_RST

#define DMA_RST ((0x0<<24) | SYS_IPRST1_PDMARST_Pos )

DMA reset is one of the SYS_ResetModule parameter

Definition at line 37 of file sys.h.

## ◆ GPIO_RST

#define GPIO_RST ((0x4<<24) | SYS_IPRST2_GPIORST_Pos )

GPIO reset is one of the SYS_ResetModule parameter

Definition at line 55 of file sys.h.

## ◆ I2C0_RST

#define I2C0_RST ((0x4<<24) | SYS_IPRST2_I2C0RST_Pos )

I2C0 reset is one of the SYS_ResetModule parameter

Definition at line 50 of file sys.h.

## ◆ I2C1_RST

#define I2C1_RST ((0x4<<24) | SYS_IPRST2_I2C1RST_Pos )

I2C1 reset is one of the SYS_ResetModule parameter

Definition at line 49 of file sys.h.

## ◆ PWM0_RST

#define PWM0_RST ((0x4<<24) | SYS_IPRST2_PWM0RST_Pos )

PWM0 reset is one of the SYS_ResetModule parameter

Definition at line 42 of file sys.h.

## ◆ SC0_RST

#define SC0_RST ((0x4<<24) | SYS_IPRST2_SC0RST_Pos )

SmartCard0 reset is one of the SYS_ResetModule parameter

Definition at line 39 of file sys.h.

## ◆ SC1_RST

#define SC1_RST ((0x4<<24) | SYS_IPRST2_SC1RST_Pos )

SmartCard1 reset is one of the SYS_ResetModule parameter

Definition at line 38 of file sys.h.

## ◆ SPI0_RST

#define SPI0_RST ((0x4<<24) | SYS_IPRST2_SPI0RST_Pos )

SPI0 reset is one of the SYS_ResetModule parameter

Definition at line 48 of file sys.h.

## ◆ SPI1_RST

#define SPI1_RST ((0x4<<24) | SYS_IPRST2_SPI1RST_Pos )

SPI1 reset is one of the SYS_ResetModule parameter

Definition at line 47 of file sys.h.

## ◆ SPI2_RST

#define SPI2_RST ((0x4<<24) | SYS_IPRST2_SPI2RST_Pos )

SPI2 reset is one of the SYS_ResetModule parameter

Definition at line 46 of file sys.h.

## ◆ SPI3_RST

#define SPI3_RST ((0x4<<24) | SYS_IPRST2_SPI3RST_Pos )

SPI3 reset is one of the SYS_ResetModule parameter

Definition at line 45 of file sys.h.

## ◆ SYS_BODCTL_BOD_INTERRUPT_EN

#define SYS_BODCTL_BOD_INTERRUPT_EN (1UL<<SYS_BODCTL_BODIE_Pos)

Brown-out Interrupt Enable

Definition at line 64 of file sys.h.

## ◆ SYS_BODCTL_BOD_RST_EN

#define SYS_BODCTL_BOD_RST_EN (1UL<<SYS_BODCTL_BODREN_Pos)

Brown-out Reset Enable

Definition at line 63 of file sys.h.

## ◆ SYS_BODCTL_BODVL_1_7V

#define SYS_BODCTL_BODVL_1_7V (0UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 1.7V

Definition at line 65 of file sys.h.

## ◆ SYS_BODCTL_BODVL_1_8V

#define SYS_BODCTL_BODVL_1_8V (1UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 1.8V

Definition at line 66 of file sys.h.

## ◆ SYS_BODCTL_BODVL_1_9V

#define SYS_BODCTL_BODVL_1_9V (2UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 1.9V

Definition at line 67 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_0V

#define SYS_BODCTL_BODVL_2_0V (3UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.0V

Definition at line 68 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_1V

#define SYS_BODCTL_BODVL_2_1V (4UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.1V

Definition at line 69 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_2V

#define SYS_BODCTL_BODVL_2_2V (5UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.2V

Definition at line 70 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_3V

#define SYS_BODCTL_BODVL_2_3V (6UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.3V

Definition at line 71 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_4V

#define SYS_BODCTL_BODVL_2_4V (7UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.4V

Definition at line 72 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_5V

#define SYS_BODCTL_BODVL_2_5V (8UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.5V

Definition at line 73 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_6V

#define SYS_BODCTL_BODVL_2_6V (9UL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.6V

Definition at line 74 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_7V

#define SYS_BODCTL_BODVL_2_7V (0xAUL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.7V

Definition at line 75 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_8V

#define SYS_BODCTL_BODVL_2_8V (0xBUL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.8V

Definition at line 76 of file sys.h.

## ◆ SYS_BODCTL_BODVL_2_9V

#define SYS_BODCTL_BODVL_2_9V (0xCUL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 2.9V

Definition at line 77 of file sys.h.

## ◆ SYS_BODCTL_BODVL_3_0V

#define SYS_BODCTL_BODVL_3_0V (0xDUL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 3.0V

Definition at line 78 of file sys.h.

## ◆ SYS_BODCTL_BODVL_3_1V

#define SYS_BODCTL_BODVL_3_1V (0xEUL<<SYS_BODCTL_BODVL_Pos)

Setting Brown Out Detector Threshold Voltage as 3.1V

Definition at line 79 of file sys.h.

## ◆ SYS_BODCTL_LPBOD_INTERRUPT_EN

#define SYS_BODCTL_LPBOD_INTERRUPT_EN (1UL<<SYS_BODCTL_LPBODIE_Pos)

Low Power Brown-out Interrupt Enable

Definition at line 83 of file sys.h.

## ◆ SYS_BODCTL_LPBOD_RST_EN

#define SYS_BODCTL_LPBOD_RST_EN (1UL<<SYS_BODCTL_LPBODREN_Pos)

Low Power Brown-out Reset Enable

Definition at line 82 of file sys.h.

## ◆ SYS_BODCTL_LPBODVL_2_0V

#define SYS_BODCTL_LPBODVL_2_0V (0UL<<SYS_BODCTL_LPBODVL_Pos)

Setting Low Power Brown Out Detector Threshold Voltage as 2.0V

Definition at line 84 of file sys.h.

## ◆ SYS_BODCTL_LPBODVL_2_5V

#define SYS_BODCTL_LPBODVL_2_5V (1UL<<SYS_BODCTL_LPBODVL_Pos)

Setting Low Power Brown Out Detector Threshold Voltage as 2.5V

Definition at line 85 of file sys.h.

## ◆ SYS_GPA_MFPH_PA10MFP_GPIO

#define SYS_GPA_MFPH_PA10MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA10MFP_Pos)

General purpose digital I/O pin.

Definition at line 183 of file sys.h.

## ◆ SYS_GPA_MFPH_PA10MFP_I2C1_SDA

#define SYS_GPA_MFPH_PA10MFP_I2C1_SDA (0x01UL<<SYS_GPA_MFPH_PA10MFP_Pos)

I2C1 data input/output pin.

Definition at line 184 of file sys.h.

## ◆ SYS_GPA_MFPH_PA10MFP_SC0_PWR

#define SYS_GPA_MFPH_PA10MFP_SC0_PWR (0x03UL<<SYS_GPA_MFPH_PA10MFP_Pos)

SmartCard0 power pin.

Definition at line 186 of file sys.h.

## ◆ SYS_GPA_MFPH_PA10MFP_SPI2_MISO0

#define SYS_GPA_MFPH_PA10MFP_SPI2_MISO0 (0x04UL<<SYS_GPA_MFPH_PA10MFP_Pos)

1st SPI2 MISO (Master In, Slave Out) pin.

Definition at line 187 of file sys.h.

## ◆ SYS_GPA_MFPH_PA10MFP_TM2_CNT

#define SYS_GPA_MFPH_PA10MFP_TM2_CNT (0x02UL<<SYS_GPA_MFPH_PA10MFP_Pos)

Timer2 event counter input.

Definition at line 185 of file sys.h.

## ◆ SYS_GPA_MFPH_PA10MFP_TM2_OUT

#define SYS_GPA_MFPH_PA10MFP_TM2_OUT (0x05UL<<SYS_GPA_MFPH_PA10MFP_Pos)

Timer2 toggle output.

Definition at line 188 of file sys.h.

## ◆ SYS_GPA_MFPH_PA11MFP_GPIO

#define SYS_GPA_MFPH_PA11MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA11MFP_Pos)

General purpose digital I/O pin.

Definition at line 189 of file sys.h.

## ◆ SYS_GPA_MFPH_PA11MFP_I2C1_SCL

#define SYS_GPA_MFPH_PA11MFP_I2C1_SCL (0x01UL<<SYS_GPA_MFPH_PA11MFP_Pos)

I2C1 clock pin.

Definition at line 190 of file sys.h.

## ◆ SYS_GPA_MFPH_PA11MFP_SC0_RST

#define SYS_GPA_MFPH_PA11MFP_SC0_RST (0x03UL<<SYS_GPA_MFPH_PA11MFP_Pos)

SmartCard0 reset pin.

Definition at line 192 of file sys.h.

## ◆ SYS_GPA_MFPH_PA11MFP_SPI2_MOSI0

#define SYS_GPA_MFPH_PA11MFP_SPI2_MOSI0 (0x04UL<<SYS_GPA_MFPH_PA11MFP_Pos)

1st SPI2 MOSI (Master Out, Slave In) pin.

Definition at line 193 of file sys.h.

## ◆ SYS_GPA_MFPH_PA11MFP_TM3_CNT

#define SYS_GPA_MFPH_PA11MFP_TM3_CNT (0x02UL<<SYS_GPA_MFPH_PA11MFP_Pos)

Timer3 event counter input.

Definition at line 191 of file sys.h.

## ◆ SYS_GPA_MFPH_PA11MFP_TM3_OUT

#define SYS_GPA_MFPH_PA11MFP_TM3_OUT (0x05UL<<SYS_GPA_MFPH_PA11MFP_Pos)

Timer3 toggle output.

Definition at line 194 of file sys.h.

## ◆ SYS_GPA_MFPH_PA12MFP_GPIO

#define SYS_GPA_MFPH_PA12MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA12MFP_Pos)

General purpose digital I/O pin.

Definition at line 195 of file sys.h.

## ◆ SYS_GPA_MFPH_PA12MFP_I2C0_SDA

#define SYS_GPA_MFPH_PA12MFP_I2C0_SDA (0x05UL<<SYS_GPA_MFPH_PA12MFP_Pos)

I2C0 data input/output pin.

Definition at line 198 of file sys.h.

## ◆ SYS_GPA_MFPH_PA12MFP_PWM0_CH0

#define SYS_GPA_MFPH_PA12MFP_PWM0_CH0 (0x01UL<<SYS_GPA_MFPH_PA12MFP_Pos)

PWM0 channel0 output/capture input.

Definition at line 196 of file sys.h.

## ◆ SYS_GPA_MFPH_PA12MFP_TM0_EXT

#define SYS_GPA_MFPH_PA12MFP_TM0_EXT (0x03UL<<SYS_GPA_MFPH_PA12MFP_Pos)

Timer0 external capture input.

Definition at line 197 of file sys.h.

## ◆ SYS_GPA_MFPH_PA13MFP_GPIO

#define SYS_GPA_MFPH_PA13MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA13MFP_Pos)

General purpose digital I/O pin.

Definition at line 199 of file sys.h.

## ◆ SYS_GPA_MFPH_PA13MFP_I2C0_SCL

#define SYS_GPA_MFPH_PA13MFP_I2C0_SCL (0x05UL<<SYS_GPA_MFPH_PA13MFP_Pos)

I2C0 clock pin.

Definition at line 202 of file sys.h.

## ◆ SYS_GPA_MFPH_PA13MFP_PWM0_CH1

#define SYS_GPA_MFPH_PA13MFP_PWM0_CH1 (0x01UL<<SYS_GPA_MFPH_PA13MFP_Pos)

PWM0 channel1 output/capture input.

Definition at line 200 of file sys.h.

## ◆ SYS_GPA_MFPH_PA13MFP_TM1_EXT

#define SYS_GPA_MFPH_PA13MFP_TM1_EXT (0x03UL<<SYS_GPA_MFPH_PA13MFP_Pos)

Timer1 external capture input.

Definition at line 201 of file sys.h.

## ◆ SYS_GPA_MFPH_PA14MFP_GPIO

#define SYS_GPA_MFPH_PA14MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA14MFP_Pos)

General purpose digital I/O pin.

Definition at line 203 of file sys.h.

## ◆ SYS_GPA_MFPH_PA14MFP_I2C1_SDA

#define SYS_GPA_MFPH_PA14MFP_I2C1_SDA (0x02UL<<SYS_GPA_MFPH_PA14MFP_Pos)

I2C1 data input/output pin.

Definition at line 205 of file sys.h.

## ◆ SYS_GPA_MFPH_PA14MFP_PWM0_CH2

#define SYS_GPA_MFPH_PA14MFP_PWM0_CH2 (0x01UL<<SYS_GPA_MFPH_PA14MFP_Pos)

PWM0 channel2 output/capture input.

Definition at line 204 of file sys.h.

## ◆ SYS_GPA_MFPH_PA14MFP_TM2_CNT

#define SYS_GPA_MFPH_PA14MFP_TM2_CNT (0x05UL<<SYS_GPA_MFPH_PA14MFP_Pos)

Timer2 event counter input.

Definition at line 207 of file sys.h.

## ◆ SYS_GPA_MFPH_PA14MFP_TM2_EXT

#define SYS_GPA_MFPH_PA14MFP_TM2_EXT (0x03UL<<SYS_GPA_MFPH_PA14MFP_Pos)

Timer2 external capture input.

Definition at line 206 of file sys.h.

## ◆ SYS_GPA_MFPH_PA14MFP_TM2_OUT

#define SYS_GPA_MFPH_PA14MFP_TM2_OUT (0x07UL<<SYS_GPA_MFPH_PA14MFP_Pos)

Timer2 toggle output.

Definition at line 209 of file sys.h.

## ◆ SYS_GPA_MFPH_PA14MFP_UART0_RXD

#define SYS_GPA_MFPH_PA14MFP_UART0_RXD (0x06UL<<SYS_GPA_MFPH_PA14MFP_Pos)

Data receiver input pin for UART0.

Definition at line 208 of file sys.h.

## ◆ SYS_GPA_MFPH_PA15MFP_GPIO

#define SYS_GPA_MFPH_PA15MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA15MFP_Pos)

General purpose digital I/O pin.

Definition at line 210 of file sys.h.

## ◆ SYS_GPA_MFPH_PA15MFP_I2C1_SCL

#define SYS_GPA_MFPH_PA15MFP_I2C1_SCL (0x02UL<<SYS_GPA_MFPH_PA15MFP_Pos)

I2C1 clock pin.

Definition at line 212 of file sys.h.

## ◆ SYS_GPA_MFPH_PA15MFP_PWM0_CH3

#define SYS_GPA_MFPH_PA15MFP_PWM0_CH3 (0x01UL<<SYS_GPA_MFPH_PA15MFP_Pos)

PWM0 channel3 output/capture input.

Definition at line 211 of file sys.h.

## ◆ SYS_GPA_MFPH_PA15MFP_SC0_PWR

#define SYS_GPA_MFPH_PA15MFP_SC0_PWR (0x04UL<<SYS_GPA_MFPH_PA15MFP_Pos)

SmartCard0 power pin.

Definition at line 214 of file sys.h.

## ◆ SYS_GPA_MFPH_PA15MFP_TM3_CNT

#define SYS_GPA_MFPH_PA15MFP_TM3_CNT (0x05UL<<SYS_GPA_MFPH_PA15MFP_Pos)

Timer3 event counter input.

Definition at line 215 of file sys.h.

## ◆ SYS_GPA_MFPH_PA15MFP_TM3_EXT

#define SYS_GPA_MFPH_PA15MFP_TM3_EXT (0x03UL<<SYS_GPA_MFPH_PA15MFP_Pos)

Timer3 external capture input.

Definition at line 213 of file sys.h.

## ◆ SYS_GPA_MFPH_PA15MFP_TM3_OUT

#define SYS_GPA_MFPH_PA15MFP_TM3_OUT (0x07UL<<SYS_GPA_MFPH_PA15MFP_Pos)

Timer3 toggle output.

Definition at line 217 of file sys.h.

## ◆ SYS_GPA_MFPH_PA15MFP_UART0_TXD

#define SYS_GPA_MFPH_PA15MFP_UART0_TXD (0x06UL<<SYS_GPA_MFPH_PA15MFP_Pos)

Data transmitter output pin for UART0.

Definition at line 216 of file sys.h.

## ◆ SYS_GPA_MFPH_PA8MFP_GPIO

#define SYS_GPA_MFPH_PA8MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA8MFP_Pos)

General purpose digital I/O pin.

Definition at line 168 of file sys.h.

## ◆ SYS_GPA_MFPH_PA8MFP_I2C0_SDA

#define SYS_GPA_MFPH_PA8MFP_I2C0_SDA (0x01UL<<SYS_GPA_MFPH_PA8MFP_Pos)

I2C0 data input/output pin.

Definition at line 169 of file sys.h.

## ◆ SYS_GPA_MFPH_PA8MFP_SC0_CLK

#define SYS_GPA_MFPH_PA8MFP_SC0_CLK (0x03UL<<SYS_GPA_MFPH_PA8MFP_Pos)

SmartCard0 clock pin.

Definition at line 171 of file sys.h.

## ◆ SYS_GPA_MFPH_PA8MFP_SPI2_SS0

#define SYS_GPA_MFPH_PA8MFP_SPI2_SS0 (0x04UL<<SYS_GPA_MFPH_PA8MFP_Pos)

1st SPI2 slave select pin.

Definition at line 172 of file sys.h.

## ◆ SYS_GPA_MFPH_PA8MFP_TM0_CNT

#define SYS_GPA_MFPH_PA8MFP_TM0_CNT (0x02UL<<SYS_GPA_MFPH_PA8MFP_Pos)

Timer0 event counter input.

Definition at line 170 of file sys.h.

## ◆ SYS_GPA_MFPH_PA8MFP_TM0_OUT

#define SYS_GPA_MFPH_PA8MFP_TM0_OUT (0x05UL<<SYS_GPA_MFPH_PA8MFP_Pos)

Timer0 toggle output.

Definition at line 173 of file sys.h.

## ◆ SYS_GPA_MFPH_PA8MFP_UART1_nCTS

#define SYS_GPA_MFPH_PA8MFP_UART1_nCTS (0x06UL<<SYS_GPA_MFPH_PA8MFP_Pos)

Clear to Send input pin for UART1.

Definition at line 174 of file sys.h.

## ◆ SYS_GPA_MFPH_PA9MFP_GPIO

#define SYS_GPA_MFPH_PA9MFP_GPIO (0x00UL<<SYS_GPA_MFPH_PA9MFP_Pos)

General purpose digital I/O pin.

Definition at line 175 of file sys.h.

## ◆ SYS_GPA_MFPH_PA9MFP_I2C0_SCL

#define SYS_GPA_MFPH_PA9MFP_I2C0_SCL (0x01UL<<SYS_GPA_MFPH_PA9MFP_Pos)

I2C0 clock pin.

Definition at line 176 of file sys.h.

## ◆ SYS_GPA_MFPH_PA9MFP_SC0_DAT

#define SYS_GPA_MFPH_PA9MFP_SC0_DAT (0x03UL<<SYS_GPA_MFPH_PA9MFP_Pos)

SmartCard0 data pin.

Definition at line 178 of file sys.h.

## ◆ SYS_GPA_MFPH_PA9MFP_SNOOPER

#define SYS_GPA_MFPH_PA9MFP_SNOOPER (0x07UL<<SYS_GPA_MFPH_PA9MFP_Pos)

Snooper pin.

Definition at line 182 of file sys.h.

## ◆ SYS_GPA_MFPH_PA9MFP_SPI2_CLK

#define SYS_GPA_MFPH_PA9MFP_SPI2_CLK (0x04UL<<SYS_GPA_MFPH_PA9MFP_Pos)

SPI2 serial clock pin.

Definition at line 179 of file sys.h.

## ◆ SYS_GPA_MFPH_PA9MFP_TM1_CNT

#define SYS_GPA_MFPH_PA9MFP_TM1_CNT (0x02UL<<SYS_GPA_MFPH_PA9MFP_Pos)

Timer1 event counter input.

Definition at line 177 of file sys.h.

## ◆ SYS_GPA_MFPH_PA9MFP_TM1_OUT

#define SYS_GPA_MFPH_PA9MFP_TM1_OUT (0x05UL<<SYS_GPA_MFPH_PA9MFP_Pos)

Timer1 toggle output.

Definition at line 180 of file sys.h.

## ◆ SYS_GPA_MFPH_PA9MFP_UART1_nRTS

#define SYS_GPA_MFPH_PA9MFP_UART1_nRTS (0x06UL<<SYS_GPA_MFPH_PA9MFP_Pos)

Request to Send output pin for UART1.

Definition at line 181 of file sys.h.

## ◆ SYS_GPA_MFPL_PA0MFP_ACMP0_P

#define SYS_GPA_MFPL_PA0MFP_ACMP0_P (0x02UL<<SYS_GPA_MFPL_PA0MFP_Pos)

Analog comparator0 positive input pin.

Definition at line 136 of file sys.h.

## ◆ SYS_GPA_MFPL_PA0MFP_ADC_CH0

#define SYS_GPA_MFPL_PA0MFP_ADC_CH0 (0x01UL<<SYS_GPA_MFPL_PA0MFP_Pos)

ADC channel0 analog input.

Definition at line 135 of file sys.h.

## ◆ SYS_GPA_MFPL_PA0MFP_GPIO

#define SYS_GPA_MFPL_PA0MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA0MFP_Pos)

General purpose digital I/O pin.

Definition at line 134 of file sys.h.

## ◆ SYS_GPA_MFPL_PA0MFP_PWM0_CH2

#define SYS_GPA_MFPL_PA0MFP_PWM0_CH2 (0x05UL<<SYS_GPA_MFPL_PA0MFP_Pos)

PWM0 channel2 output/capture input.

Definition at line 138 of file sys.h.

## ◆ SYS_GPA_MFPL_PA0MFP_SPI3_MOSI1

#define SYS_GPA_MFPL_PA0MFP_SPI3_MOSI1 (0x06UL<<SYS_GPA_MFPL_PA0MFP_Pos)

2nd SPI3 MOSI (Master Out, Slave In) pin.

Definition at line 139 of file sys.h.

## ◆ SYS_GPA_MFPL_PA0MFP_TM2_EXT

#define SYS_GPA_MFPL_PA0MFP_TM2_EXT (0x03UL<<SYS_GPA_MFPL_PA0MFP_Pos)

Timer2 external capture input.

Definition at line 137 of file sys.h.

## ◆ SYS_GPA_MFPL_PA1MFP_ACMP0_N

#define SYS_GPA_MFPL_PA1MFP_ACMP0_N (0x02UL<<SYS_GPA_MFPL_PA1MFP_Pos)

Analog comparator0 negative input pin.

Definition at line 142 of file sys.h.

## ◆ SYS_GPA_MFPL_PA1MFP_ADC_CH1

#define SYS_GPA_MFPL_PA1MFP_ADC_CH1 (0x01UL<<SYS_GPA_MFPL_PA1MFP_Pos)

ADC channel1 analog input.

Definition at line 141 of file sys.h.

## ◆ SYS_GPA_MFPL_PA1MFP_GPIO

#define SYS_GPA_MFPL_PA1MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA1MFP_Pos)

General purpose digital I/O pin.

Definition at line 140 of file sys.h.

## ◆ SYS_GPA_MFPL_PA1MFP_SPI3_MISO1

#define SYS_GPA_MFPL_PA1MFP_SPI3_MISO1 (0x06UL<<SYS_GPA_MFPL_PA1MFP_Pos)

2nd SPI3 MISO (Master In, Slave Out) pin.

Definition at line 143 of file sys.h.

## ◆ SYS_GPA_MFPL_PA2MFP_ADC_CH2

#define SYS_GPA_MFPL_PA2MFP_ADC_CH2 (0x01UL<<SYS_GPA_MFPL_PA2MFP_Pos)

ADC channel2 analog input.

Definition at line 145 of file sys.h.

## ◆ SYS_GPA_MFPL_PA2MFP_GPIO

#define SYS_GPA_MFPL_PA2MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA2MFP_Pos)

General purpose digital I/O pin.

Definition at line 144 of file sys.h.

## ◆ SYS_GPA_MFPL_PA2MFP_UART1_RXD

#define SYS_GPA_MFPL_PA2MFP_UART1_RXD (0x05UL<<SYS_GPA_MFPL_PA2MFP_Pos)

Data receiver input pin for UART1.

Definition at line 146 of file sys.h.

## ◆ SYS_GPA_MFPL_PA3MFP_ADC_CH3

#define SYS_GPA_MFPL_PA3MFP_ADC_CH3 (0x01UL<<SYS_GPA_MFPL_PA3MFP_Pos)

ADC channel3 analog input.

Definition at line 148 of file sys.h.

## ◆ SYS_GPA_MFPL_PA3MFP_GPIO

#define SYS_GPA_MFPL_PA3MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA3MFP_Pos)

General purpose digital I/O pin.

Definition at line 147 of file sys.h.

## ◆ SYS_GPA_MFPL_PA3MFP_SPI3_MOSI0

#define SYS_GPA_MFPL_PA3MFP_SPI3_MOSI0 (0x06UL<<SYS_GPA_MFPL_PA3MFP_Pos)

1st SPI3 MOSI (Master Out, Slave In) pin.

Definition at line 150 of file sys.h.

## ◆ SYS_GPA_MFPL_PA3MFP_UART1_TXD

#define SYS_GPA_MFPL_PA3MFP_UART1_TXD (0x05UL<<SYS_GPA_MFPL_PA3MFP_Pos)

Data transmitter output pin for UART1.

Definition at line 149 of file sys.h.

## ◆ SYS_GPA_MFPL_PA4MFP_ADC_CH4

#define SYS_GPA_MFPL_PA4MFP_ADC_CH4 (0x01UL<<SYS_GPA_MFPL_PA4MFP_Pos)

ADC channel4 analog input.

Definition at line 152 of file sys.h.

## ◆ SYS_GPA_MFPL_PA4MFP_GPIO

#define SYS_GPA_MFPL_PA4MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA4MFP_Pos)

General purpose digital I/O pin.

Definition at line 151 of file sys.h.

## ◆ SYS_GPA_MFPL_PA4MFP_I2C0_SDA

#define SYS_GPA_MFPL_PA4MFP_I2C0_SDA (0x05UL<<SYS_GPA_MFPL_PA4MFP_Pos)

I2C0 data input/output pin.

Definition at line 153 of file sys.h.

## ◆ SYS_GPA_MFPL_PA4MFP_SPI3_MISO0

#define SYS_GPA_MFPL_PA4MFP_SPI3_MISO0 (0x06UL<<SYS_GPA_MFPL_PA4MFP_Pos)

1st SPI3 MISO (Master In, Slave Out) pin.

Definition at line 154 of file sys.h.

## ◆ SYS_GPA_MFPL_PA5MFP_ADC_CH5

#define SYS_GPA_MFPL_PA5MFP_ADC_CH5 (0x01UL<<SYS_GPA_MFPL_PA5MFP_Pos)

ADC channel5 analog input.

Definition at line 156 of file sys.h.

## ◆ SYS_GPA_MFPL_PA5MFP_GPIO

#define SYS_GPA_MFPL_PA5MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA5MFP_Pos)

General purpose digital I/O pin.

Definition at line 155 of file sys.h.

## ◆ SYS_GPA_MFPL_PA5MFP_I2C0_SCL

#define SYS_GPA_MFPL_PA5MFP_I2C0_SCL (0x05UL<<SYS_GPA_MFPL_PA5MFP_Pos)

I2C0 clock pin.

Definition at line 157 of file sys.h.

## ◆ SYS_GPA_MFPL_PA5MFP_SPI3_CLK

#define SYS_GPA_MFPL_PA5MFP_SPI3_CLK (0x06UL<<SYS_GPA_MFPL_PA5MFP_Pos)

SPI3 serial clock pin.

Definition at line 158 of file sys.h.

## ◆ SYS_GPA_MFPL_PA6MFP_ACMP0_O

#define SYS_GPA_MFPL_PA6MFP_ACMP0_O (0x02UL<<SYS_GPA_MFPL_PA6MFP_Pos)

Analog comparator0 output.

Definition at line 161 of file sys.h.

## ◆ SYS_GPA_MFPL_PA6MFP_ADC_CH6

#define SYS_GPA_MFPL_PA6MFP_ADC_CH6 (0x01UL<<SYS_GPA_MFPL_PA6MFP_Pos)

ADC channel6 analog input.

Definition at line 160 of file sys.h.

## ◆ SYS_GPA_MFPL_PA6MFP_GPIO

#define SYS_GPA_MFPL_PA6MFP_GPIO (0x00UL<<SYS_GPA_MFPL_PA6MFP_Pos)

General purpose digital I/O pin.

Definition at line 159 of file sys.h.

## ◆ SYS_GPA_MFPL_PA6MFP_PWM0_CH3

#define SYS_GPA_MFPL_PA6MFP_PWM0_CH3 (0x05UL<<SYS_GPA_MFPL_PA6MFP_Pos)

PWM0 channel3 output/capture input.

Definition at line 164 of file sys.h.

## ◆ SYS_GPA_MFPL_PA6MFP_SPI3_SS0

#define SYS_GPA_MFPL_PA6MFP_SPI3_SS0 (0x06UL<<SYS_GPA_MFPL_PA6MFP_Pos)

1st SPI3 slave select pin.

Definition at line 165 of file sys.h.

## ◆ SYS_GPA_MFPL_PA6MFP_TM3_CNT

#define SYS_GPA_MFPL_PA6MFP_TM3_CNT (0x04UL<<SYS_GPA_MFPL_PA6MFP_Pos)

Timer3 event counter input.

Definition at line 163 of file sys.h.

## ◆ SYS_GPA_MFPL_PA6MFP_TM3_EXT

#define SYS_GPA_MFPL_PA6MFP_TM3_EXT (0x03UL<<SYS_GPA_MFPL_PA6MFP_Pos)

Timer3 external capture input.

Definition at line 162 of file sys.h.

## ◆ SYS_GPA_MFPL_PA6MFP_TM3_OUT

#define SYS_GPA_MFPL_PA6MFP_TM3_OUT (0x07UL<<SYS_GPA_MFPL_PA6MFP_Pos)

Timer3 toggle output.

Definition at line 166 of file sys.h.

## ◆ SYS_GPB_MFPH_PB10MFP_GPIO

#define SYS_GPB_MFPH_PB10MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB10MFP_Pos)

General purpose digital I/O pin.

Definition at line 260 of file sys.h.

## ◆ SYS_GPB_MFPH_PB10MFP_SPI0_MOSI0

#define SYS_GPB_MFPH_PB10MFP_SPI0_MOSI0 (0x01UL<<SYS_GPB_MFPH_PB10MFP_Pos)

1st SPI0 MOSI (Master Out, Slave In) pin.

Definition at line 261 of file sys.h.

## ◆ SYS_GPB_MFPH_PB10MFP_SPI0_SS1

#define SYS_GPB_MFPH_PB10MFP_SPI0_SS1 (0x05UL<<SYS_GPB_MFPH_PB10MFP_Pos)

1st SPI0 slave select pin.

Definition at line 264 of file sys.h.

## ◆ SYS_GPB_MFPH_PB10MFP_TM2_CNT

#define SYS_GPB_MFPH_PB10MFP_TM2_CNT (0x02UL<<SYS_GPB_MFPH_PB10MFP_Pos)

Timer2 event counter input.

Definition at line 262 of file sys.h.

## ◆ SYS_GPB_MFPH_PB10MFP_TM2_OUT

#define SYS_GPB_MFPH_PB10MFP_TM2_OUT (0x04UL<<SYS_GPB_MFPH_PB10MFP_Pos)

Timer2 toggle output.

Definition at line 263 of file sys.h.

## ◆ SYS_GPB_MFPH_PB11MFP_GPIO

#define SYS_GPB_MFPH_PB11MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB11MFP_Pos)

General purpose digital I/O pin.

Definition at line 265 of file sys.h.

## ◆ SYS_GPB_MFPH_PB11MFP_PWM0_CH4

#define SYS_GPB_MFPH_PB11MFP_PWM0_CH4 (0x01UL<<SYS_GPB_MFPH_PB11MFP_Pos)

PWM0 channel4 output/capture input.

Definition at line 266 of file sys.h.

## ◆ SYS_GPB_MFPH_PB11MFP_SPI0_MISO0

#define SYS_GPB_MFPH_PB11MFP_SPI0_MISO0 (0x05UL<<SYS_GPB_MFPH_PB11MFP_Pos)

1st SPI0 MISO (Master In, Slave Out) pin.

Definition at line 269 of file sys.h.

## ◆ SYS_GPB_MFPH_PB11MFP_TM3_CNT

#define SYS_GPB_MFPH_PB11MFP_TM3_CNT (0x02UL<<SYS_GPB_MFPH_PB11MFP_Pos)

Timer3 event counter input.

Definition at line 267 of file sys.h.

## ◆ SYS_GPB_MFPH_PB11MFP_TM3_OUT

#define SYS_GPB_MFPH_PB11MFP_TM3_OUT (0x04UL<<SYS_GPB_MFPH_PB11MFP_Pos)

Timer3 toggle output.

Definition at line 268 of file sys.h.

## ◆ SYS_GPB_MFPH_PB13MFP_GPIO

#define SYS_GPB_MFPH_PB13MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB13MFP_Pos)

General purpose digital I/O pin.

Definition at line 270 of file sys.h.

## ◆ SYS_GPB_MFPH_PB13MFP_SNOOPER

#define SYS_GPB_MFPH_PB13MFP_SNOOPER (0x07UL<<SYS_GPB_MFPH_PB13MFP_Pos)

Snooper pin.

Definition at line 272 of file sys.h.

## ◆ SYS_GPB_MFPH_PB13MFP_SPI2_MISO1

#define SYS_GPB_MFPH_PB13MFP_SPI2_MISO1 (0x03UL<<SYS_GPB_MFPH_PB13MFP_Pos)

2nd SPI2 MISO (Master In, Slave Out) pin.

Definition at line 271 of file sys.h.

## ◆ SYS_GPB_MFPH_PB14MFP_GPIO

#define SYS_GPB_MFPH_PB14MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB14MFP_Pos)

General purpose digital I/O pin.

Definition at line 273 of file sys.h.

## ◆ SYS_GPB_MFPH_PB14MFP_INT0

#define SYS_GPB_MFPH_PB14MFP_INT0 (0x01UL<<SYS_GPB_MFPH_PB14MFP_Pos)

External interrupt0 input pin.

Definition at line 274 of file sys.h.

## ◆ SYS_GPB_MFPH_PB14MFP_SPI2_MOSI1

#define SYS_GPB_MFPH_PB14MFP_SPI2_MOSI1 (0x03UL<<SYS_GPB_MFPH_PB14MFP_Pos)

2nd SPI2 MOSI (Master Out, Slave In) pin.

Definition at line 275 of file sys.h.

## ◆ SYS_GPB_MFPH_PB14MFP_SPI2_SS1

#define SYS_GPB_MFPH_PB14MFP_SPI2_SS1 (0x04UL<<SYS_GPB_MFPH_PB14MFP_Pos)

1st SPI2 slave select pin.

Definition at line 276 of file sys.h.

## ◆ SYS_GPB_MFPH_PB15MFP_GPIO

#define SYS_GPB_MFPH_PB15MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB15MFP_Pos)

General purpose digital I/O pin.

Definition at line 277 of file sys.h.

## ◆ SYS_GPB_MFPH_PB15MFP_INT1

#define SYS_GPB_MFPH_PB15MFP_INT1 (0x01UL<<SYS_GPB_MFPH_PB15MFP_Pos)

External interrupt1 input pin.

Definition at line 278 of file sys.h.

## ◆ SYS_GPB_MFPH_PB15MFP_SC1_CD

#define SYS_GPB_MFPH_PB15MFP_SC1_CD (0x04UL<<SYS_GPB_MFPH_PB15MFP_Pos)

SmartCard1 card detect pin.

Definition at line 280 of file sys.h.

## ◆ SYS_GPB_MFPH_PB15MFP_SNOOPER

#define SYS_GPB_MFPH_PB15MFP_SNOOPER (0x03UL<<SYS_GPB_MFPH_PB15MFP_Pos)

Snooper pin.

Definition at line 279 of file sys.h.

## ◆ SYS_GPB_MFPH_PB8MFP_GPIO

#define SYS_GPB_MFPH_PB8MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB8MFP_Pos)

General purpose digital I/O pin.

Definition at line 249 of file sys.h.

## ◆ SYS_GPB_MFPH_PB8MFP_INT0

#define SYS_GPB_MFPH_PB8MFP_INT0 (0x03UL<<SYS_GPB_MFPH_PB8MFP_Pos)

External interrupt0 input pin.

Definition at line 252 of file sys.h.

## ◆ SYS_GPB_MFPH_PB8MFP_SNOOPER

#define SYS_GPB_MFPH_PB8MFP_SNOOPER (0x07UL<<SYS_GPB_MFPH_PB8MFP_Pos)

Snooper pin.

Definition at line 254 of file sys.h.

## ◆ SYS_GPB_MFPH_PB8MFP_STADC

#define SYS_GPB_MFPH_PB8MFP_STADC (0x01UL<<SYS_GPB_MFPH_PB8MFP_Pos)

ADC external trigger input.

Definition at line 250 of file sys.h.

## ◆ SYS_GPB_MFPH_PB8MFP_TM0_CNT

#define SYS_GPB_MFPH_PB8MFP_TM0_CNT (0x02UL<<SYS_GPB_MFPH_PB8MFP_Pos)

Timer0 event counter input.

Definition at line 251 of file sys.h.

## ◆ SYS_GPB_MFPH_PB8MFP_TM0_OUT

#define SYS_GPB_MFPH_PB8MFP_TM0_OUT (0x04UL<<SYS_GPB_MFPH_PB8MFP_Pos)

Timer0 toggle output.

Definition at line 253 of file sys.h.

## ◆ SYS_GPB_MFPH_PB9MFP_GPIO

#define SYS_GPB_MFPH_PB9MFP_GPIO (0x00UL<<SYS_GPB_MFPH_PB9MFP_Pos)

General purpose digital I/O pin.

Definition at line 255 of file sys.h.

## ◆ SYS_GPB_MFPH_PB9MFP_INT0

#define SYS_GPB_MFPH_PB9MFP_INT0 (0x05UL<<SYS_GPB_MFPH_PB9MFP_Pos)

External interrupt0 input pin.

Definition at line 259 of file sys.h.

## ◆ SYS_GPB_MFPH_PB9MFP_SPI1_SS1

#define SYS_GPB_MFPH_PB9MFP_SPI1_SS1 (0x01UL<<SYS_GPB_MFPH_PB9MFP_Pos)

1st SPI1 slave select pin.

Definition at line 256 of file sys.h.

## ◆ SYS_GPB_MFPH_PB9MFP_TM1_CNT

#define SYS_GPB_MFPH_PB9MFP_TM1_CNT (0x02UL<<SYS_GPB_MFPH_PB9MFP_Pos)

Timer1 event counter input.

Definition at line 257 of file sys.h.

## ◆ SYS_GPB_MFPH_PB9MFP_TM1_OUT

#define SYS_GPB_MFPH_PB9MFP_TM1_OUT (0x04UL<<SYS_GPB_MFPH_PB9MFP_Pos)

Timer1 toggle output.

Definition at line 258 of file sys.h.

## ◆ SYS_GPB_MFPL_PB0MFP_GPIO

#define SYS_GPB_MFPL_PB0MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB0MFP_Pos)

General purpose digital I/O pin.

Definition at line 219 of file sys.h.

## ◆ SYS_GPB_MFPL_PB0MFP_SPI1_MOSI0

#define SYS_GPB_MFPL_PB0MFP_SPI1_MOSI0 (0x03UL<<SYS_GPB_MFPL_PB0MFP_Pos)

1st SPI1 MOSI (Master Out, Slave In) pin.

Definition at line 221 of file sys.h.

## ◆ SYS_GPB_MFPL_PB0MFP_UART0_RXD

#define SYS_GPB_MFPL_PB0MFP_UART0_RXD (0x01UL<<SYS_GPB_MFPL_PB0MFP_Pos)

Data receiver input pin for UART0.

Definition at line 220 of file sys.h.

## ◆ SYS_GPB_MFPL_PB1MFP_GPIO

#define SYS_GPB_MFPL_PB1MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB1MFP_Pos)

General purpose digital I/O pin.

Definition at line 222 of file sys.h.

## ◆ SYS_GPB_MFPL_PB1MFP_SPI1_MISO0

#define SYS_GPB_MFPL_PB1MFP_SPI1_MISO0 (0x03UL<<SYS_GPB_MFPL_PB1MFP_Pos)

1st SPI1 MISO (Master In, Slave Out) pin.

Definition at line 224 of file sys.h.

## ◆ SYS_GPB_MFPL_PB1MFP_UART0_TXD

#define SYS_GPB_MFPL_PB1MFP_UART0_TXD (0x01UL<<SYS_GPB_MFPL_PB1MFP_Pos)

Data transmitter output pin for UART0.

Definition at line 223 of file sys.h.

## ◆ SYS_GPB_MFPL_PB2MFP_CLKO

#define SYS_GPB_MFPL_PB2MFP_CLKO (0x04UL<<SYS_GPB_MFPL_PB2MFP_Pos)

Output selected clock.

Definition at line 228 of file sys.h.

## ◆ SYS_GPB_MFPL_PB2MFP_GPIO

#define SYS_GPB_MFPL_PB2MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB2MFP_Pos)

General purpose digital I/O pin.

Definition at line 225 of file sys.h.

## ◆ SYS_GPB_MFPL_PB2MFP_SPI1_CLK

#define SYS_GPB_MFPL_PB2MFP_SPI1_CLK (0x03UL<<SYS_GPB_MFPL_PB2MFP_Pos)

SPI1 serial clock pin.

Definition at line 227 of file sys.h.

## ◆ SYS_GPB_MFPL_PB2MFP_UART0_nRTS

#define SYS_GPB_MFPL_PB2MFP_UART0_nRTS (0x01UL<<SYS_GPB_MFPL_PB2MFP_Pos)

Request to Send output pin for UART0.

Definition at line 226 of file sys.h.

## ◆ SYS_GPB_MFPL_PB3MFP_GPIO

#define SYS_GPB_MFPL_PB3MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB3MFP_Pos)

General purpose digital I/O pin.

Definition at line 229 of file sys.h.

## ◆ SYS_GPB_MFPL_PB3MFP_SC1_CD

#define SYS_GPB_MFPL_PB3MFP_SC1_CD (0x04UL<<SYS_GPB_MFPL_PB3MFP_Pos)

SmartCard1 card detect pin.

Definition at line 232 of file sys.h.

## ◆ SYS_GPB_MFPL_PB3MFP_SPI1_SS0

#define SYS_GPB_MFPL_PB3MFP_SPI1_SS0 (0x03UL<<SYS_GPB_MFPL_PB3MFP_Pos)

1st SPI1 slave select pin.

Definition at line 231 of file sys.h.

## ◆ SYS_GPB_MFPL_PB3MFP_UART0_nCTS

#define SYS_GPB_MFPL_PB3MFP_UART0_nCTS (0x01UL<<SYS_GPB_MFPL_PB3MFP_Pos)

Clear to Send input pin for UART0.

Definition at line 230 of file sys.h.

## ◆ SYS_GPB_MFPL_PB4MFP_GPIO

#define SYS_GPB_MFPL_PB4MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB4MFP_Pos)

General purpose digital I/O pin.

Definition at line 233 of file sys.h.

## ◆ SYS_GPB_MFPL_PB4MFP_RTC_HZ

#define SYS_GPB_MFPL_PB4MFP_RTC_HZ (0x06UL<<SYS_GPB_MFPL_PB4MFP_Pos)

RTC output 1Hz pin.

Definition at line 237 of file sys.h.

## ◆ SYS_GPB_MFPL_PB4MFP_SC0_CD

#define SYS_GPB_MFPL_PB4MFP_SC0_CD (0x03UL<<SYS_GPB_MFPL_PB4MFP_Pos)

SmartCard0 card detect pin.

Definition at line 235 of file sys.h.

## ◆ SYS_GPB_MFPL_PB4MFP_SPI2_SS0

#define SYS_GPB_MFPL_PB4MFP_SPI2_SS0 (0x04UL<<SYS_GPB_MFPL_PB4MFP_Pos)

1st SPI2 slave select pin.

Definition at line 236 of file sys.h.

## ◆ SYS_GPB_MFPL_PB4MFP_UART1_RXD

#define SYS_GPB_MFPL_PB4MFP_UART1_RXD (0x01UL<<SYS_GPB_MFPL_PB4MFP_Pos)

Data receiver input pin for UART1.

Definition at line 234 of file sys.h.

## ◆ SYS_GPB_MFPL_PB5MFP_GPIO

#define SYS_GPB_MFPL_PB5MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB5MFP_Pos)

General purpose digital I/O pin.

Definition at line 238 of file sys.h.

## ◆ SYS_GPB_MFPL_PB5MFP_SC0_RST

#define SYS_GPB_MFPL_PB5MFP_SC0_RST (0x03UL<<SYS_GPB_MFPL_PB5MFP_Pos)

SmartCard0 reset pin.

Definition at line 240 of file sys.h.

## ◆ SYS_GPB_MFPL_PB5MFP_SPI2_CLK

#define SYS_GPB_MFPL_PB5MFP_SPI2_CLK (0x04UL<<SYS_GPB_MFPL_PB5MFP_Pos)

SPI2 serial clock pin.

Definition at line 241 of file sys.h.

## ◆ SYS_GPB_MFPL_PB5MFP_UART1_TXD

#define SYS_GPB_MFPL_PB5MFP_UART1_TXD (0x01UL<<SYS_GPB_MFPL_PB5MFP_Pos)

Data transmitter output pin for UART1.

Definition at line 239 of file sys.h.

## ◆ SYS_GPB_MFPL_PB6MFP_GPIO

#define SYS_GPB_MFPL_PB6MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB6MFP_Pos)

General purpose digital I/O pin.

Definition at line 242 of file sys.h.

## ◆ SYS_GPB_MFPL_PB6MFP_SPI2_MISO0

#define SYS_GPB_MFPL_PB6MFP_SPI2_MISO0 (0x04UL<<SYS_GPB_MFPL_PB6MFP_Pos)

1st SPI2 MISO (Master In, Slave Out) pin.

Definition at line 244 of file sys.h.

## ◆ SYS_GPB_MFPL_PB6MFP_UART1_nRTS

#define SYS_GPB_MFPL_PB6MFP_UART1_nRTS (0x01UL<<SYS_GPB_MFPL_PB6MFP_Pos)

Request to Send output pin for UART1.

Definition at line 243 of file sys.h.

## ◆ SYS_GPB_MFPL_PB7MFP_GPIO

#define SYS_GPB_MFPL_PB7MFP_GPIO (0x00UL<<SYS_GPB_MFPL_PB7MFP_Pos)

General purpose digital I/O pin.

Definition at line 245 of file sys.h.

## ◆ SYS_GPB_MFPL_PB7MFP_SPI2_MOSI0

#define SYS_GPB_MFPL_PB7MFP_SPI2_MOSI0 (0x04UL<<SYS_GPB_MFPL_PB7MFP_Pos)

1st SPI2 MOSI (Master Out, Slave In) pin.

Definition at line 247 of file sys.h.

## ◆ SYS_GPB_MFPL_PB7MFP_UART1_nCTS

#define SYS_GPB_MFPL_PB7MFP_UART1_nCTS (0x01UL<<SYS_GPB_MFPL_PB7MFP_Pos)

Clear to Send input pin for UART1.

Definition at line 246 of file sys.h.

## ◆ SYS_GPC_MFPH_PC10MFP_GPIO

#define SYS_GPC_MFPH_PC10MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC10MFP_Pos)

General purpose digital I/O pin.

Definition at line 315 of file sys.h.

## ◆ SYS_GPC_MFPH_PC10MFP_SPI1_MISO0

#define SYS_GPC_MFPH_PC10MFP_SPI1_MISO0 (0x01UL<<SYS_GPC_MFPH_PC10MFP_Pos)

1st SPI1 MISO (Master In, Slave Out) pin.

Definition at line 316 of file sys.h.

## ◆ SYS_GPC_MFPH_PC10MFP_UART1_RXD

#define SYS_GPC_MFPH_PC10MFP_UART1_RXD (0x05UL<<SYS_GPC_MFPH_PC10MFP_Pos)

Data receiver input pin for UART1.

Definition at line 317 of file sys.h.

## ◆ SYS_GPC_MFPH_PC11MFP_GPIO

#define SYS_GPC_MFPH_PC11MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC11MFP_Pos)

General purpose digital I/O pin.

Definition at line 318 of file sys.h.

## ◆ SYS_GPC_MFPH_PC11MFP_SPI1_MOSI0

#define SYS_GPC_MFPH_PC11MFP_SPI1_MOSI0 (0x01UL<<SYS_GPC_MFPH_PC11MFP_Pos)

1st SPI1 MOSI (Master Out, Slave In) pin.

Definition at line 319 of file sys.h.

## ◆ SYS_GPC_MFPH_PC11MFP_UART1_TXD

#define SYS_GPC_MFPH_PC11MFP_UART1_TXD (0x05UL<<SYS_GPC_MFPH_PC11MFP_Pos)

Data transmitter output pin for UART1.

Definition at line 320 of file sys.h.

## ◆ SYS_GPC_MFPH_PC14MFP_GPIO

#define SYS_GPC_MFPH_PC14MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC14MFP_Pos)

General purpose digital I/O pin.

Definition at line 321 of file sys.h.

## ◆ SYS_GPC_MFPH_PC14MFP_UART1_nCTS

#define SYS_GPC_MFPH_PC14MFP_UART1_nCTS (0x01UL<<SYS_GPC_MFPH_PC14MFP_Pos)

Clear to Send input pin for UART1.

Definition at line 322 of file sys.h.

## ◆ SYS_GPC_MFPH_PC15MFP_GPIO

#define SYS_GPC_MFPH_PC15MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC15MFP_Pos)

General purpose digital I/O pin.

Definition at line 323 of file sys.h.

## ◆ SYS_GPC_MFPH_PC15MFP_TM0_EXT

#define SYS_GPC_MFPH_PC15MFP_TM0_EXT (0x03UL<<SYS_GPC_MFPH_PC15MFP_Pos)

Timer0 external capture input.

Definition at line 325 of file sys.h.

## ◆ SYS_GPC_MFPH_PC15MFP_UART1_nRTS

#define SYS_GPC_MFPH_PC15MFP_UART1_nRTS (0x01UL<<SYS_GPC_MFPH_PC15MFP_Pos)

Request to Send output pin for UART1.

Definition at line 324 of file sys.h.

## ◆ SYS_GPC_MFPH_PC8MFP_GPIO

#define SYS_GPC_MFPH_PC8MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC8MFP_Pos)

General purpose digital I/O pin.

Definition at line 309 of file sys.h.

## ◆ SYS_GPC_MFPH_PC8MFP_I2C1_SDA

#define SYS_GPC_MFPH_PC8MFP_I2C1_SDA (0x05UL<<SYS_GPC_MFPH_PC8MFP_Pos)

I2C1 data input/output pin.

Definition at line 311 of file sys.h.

## ◆ SYS_GPC_MFPH_PC8MFP_SPI1_SS0

#define SYS_GPC_MFPH_PC8MFP_SPI1_SS0 (0x01UL<<SYS_GPC_MFPH_PC8MFP_Pos)

1st SPI1 slave select pin.

Definition at line 310 of file sys.h.

## ◆ SYS_GPC_MFPH_PC9MFP_GPIO

#define SYS_GPC_MFPH_PC9MFP_GPIO (0x00UL<<SYS_GPC_MFPH_PC9MFP_Pos)

General purpose digital I/O pin.

Definition at line 312 of file sys.h.

## ◆ SYS_GPC_MFPH_PC9MFP_I2C1_SCL

#define SYS_GPC_MFPH_PC9MFP_I2C1_SCL (0x05UL<<SYS_GPC_MFPH_PC9MFP_Pos)

I2C1 clock pin.

Definition at line 314 of file sys.h.

## ◆ SYS_GPC_MFPH_PC9MFP_SPI1_CLK

#define SYS_GPC_MFPH_PC9MFP_SPI1_CLK (0x01UL<<SYS_GPC_MFPH_PC9MFP_Pos)

SPI1 serial clock pin.

Definition at line 313 of file sys.h.

## ◆ SYS_GPC_MFPL_PC0MFP_GPIO

#define SYS_GPC_MFPL_PC0MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC0MFP_Pos)

General purpose digital I/O pin.

Definition at line 282 of file sys.h.

## ◆ SYS_GPC_MFPL_PC0MFP_PWM0_BRAKE1

#define SYS_GPC_MFPL_PC0MFP_PWM0_BRAKE1 (0x05UL<<SYS_GPC_MFPL_PC0MFP_Pos)

Brake input pin 1 of PWM0.

Definition at line 285 of file sys.h.

## ◆ SYS_GPC_MFPL_PC0MFP_SC1_CLK

#define SYS_GPC_MFPL_PC0MFP_SC1_CLK (0x04UL<<SYS_GPC_MFPL_PC0MFP_Pos)

SmartCard1 clock pin.

Definition at line 284 of file sys.h.

## ◆ SYS_GPC_MFPL_PC0MFP_SPI0_SS0

#define SYS_GPC_MFPL_PC0MFP_SPI0_SS0 (0x01UL<<SYS_GPC_MFPL_PC0MFP_Pos)

1st SPI0 slave select pin.

Definition at line 283 of file sys.h.

## ◆ SYS_GPC_MFPL_PC1MFP_GPIO

#define SYS_GPC_MFPL_PC1MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC1MFP_Pos)

General purpose digital I/O pin.

Definition at line 286 of file sys.h.

## ◆ SYS_GPC_MFPL_PC1MFP_PWM0_BRAKE0

#define SYS_GPC_MFPL_PC1MFP_PWM0_BRAKE0 (0x05UL<<SYS_GPC_MFPL_PC1MFP_Pos)

Brake input pin 0 of PWM0.

Definition at line 289 of file sys.h.

## ◆ SYS_GPC_MFPL_PC1MFP_SC1_DAT

#define SYS_GPC_MFPL_PC1MFP_SC1_DAT (0x04UL<<SYS_GPC_MFPL_PC1MFP_Pos)

SmartCard1 data pin.

Definition at line 288 of file sys.h.

## ◆ SYS_GPC_MFPL_PC1MFP_SPI0_CLK

#define SYS_GPC_MFPL_PC1MFP_SPI0_CLK (0x01UL<<SYS_GPC_MFPL_PC1MFP_Pos)

SPI0 serial clock pin.

Definition at line 287 of file sys.h.

## ◆ SYS_GPC_MFPL_PC2MFP_GPIO

#define SYS_GPC_MFPL_PC2MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC2MFP_Pos)

General purpose digital I/O pin.

Definition at line 290 of file sys.h.

## ◆ SYS_GPC_MFPL_PC2MFP_PWM0_BRAKE1

#define SYS_GPC_MFPL_PC2MFP_PWM0_BRAKE1 (0x05UL<<SYS_GPC_MFPL_PC2MFP_Pos)

Brake input pin 1 of PWM0.

Definition at line 293 of file sys.h.

## ◆ SYS_GPC_MFPL_PC2MFP_SC1_PWR

#define SYS_GPC_MFPL_PC2MFP_SC1_PWR (0x04UL<<SYS_GPC_MFPL_PC2MFP_Pos)

SmartCard1 power pin.

Definition at line 292 of file sys.h.

## ◆ SYS_GPC_MFPL_PC2MFP_SPI0_MISO0

#define SYS_GPC_MFPL_PC2MFP_SPI0_MISO0 (0x01UL<<SYS_GPC_MFPL_PC2MFP_Pos)

1st SPI0 MISO (Master In, Slave Out) pin.

Definition at line 291 of file sys.h.

## ◆ SYS_GPC_MFPL_PC3MFP_GPIO

#define SYS_GPC_MFPL_PC3MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC3MFP_Pos)

General purpose digital I/O pin.

Definition at line 294 of file sys.h.

## ◆ SYS_GPC_MFPL_PC3MFP_PWM0_BRAKE0

#define SYS_GPC_MFPL_PC3MFP_PWM0_BRAKE0 (0x05UL<<SYS_GPC_MFPL_PC3MFP_Pos)

Brake input pin 0 of PWM0.

Definition at line 297 of file sys.h.

## ◆ SYS_GPC_MFPL_PC3MFP_SC1_RST

#define SYS_GPC_MFPL_PC3MFP_SC1_RST (0x04UL<<SYS_GPC_MFPL_PC3MFP_Pos)

SmartCard1 reset pin.

Definition at line 296 of file sys.h.

## ◆ SYS_GPC_MFPL_PC3MFP_SPI0_MOSI0

#define SYS_GPC_MFPL_PC3MFP_SPI0_MOSI0 (0x01UL<<SYS_GPC_MFPL_PC3MFP_Pos)

1st SPI0 MOSI (Master Out, Slave In) pin.

Definition at line 295 of file sys.h.

## ◆ SYS_GPC_MFPL_PC6MFP_GPIO

#define SYS_GPC_MFPL_PC6MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC6MFP_Pos)

General purpose digital I/O pin.

Definition at line 298 of file sys.h.

## ◆ SYS_GPC_MFPL_PC6MFP_PWM0_CH0

#define SYS_GPC_MFPL_PC6MFP_PWM0_CH0 (0x05UL<<SYS_GPC_MFPL_PC6MFP_Pos)

PWM0 channel0 output/capture input.

Definition at line 302 of file sys.h.

## ◆ SYS_GPC_MFPL_PC6MFP_SC1_CD

#define SYS_GPC_MFPL_PC6MFP_SC1_CD (0x04UL<<SYS_GPC_MFPL_PC6MFP_Pos)

SmartCard1 card detect pin.

Definition at line 301 of file sys.h.

## ◆ SYS_GPC_MFPL_PC6MFP_TM0_EXT

#define SYS_GPC_MFPL_PC6MFP_TM0_EXT (0x03UL<<SYS_GPC_MFPL_PC6MFP_Pos)

Timer0 external capture input.

Definition at line 300 of file sys.h.

## ◆ SYS_GPC_MFPL_PC6MFP_UART1_RXD

#define SYS_GPC_MFPL_PC6MFP_UART1_RXD (0x01UL<<SYS_GPC_MFPL_PC6MFP_Pos)

Data receiver input pin for UART1.

Definition at line 299 of file sys.h.

## ◆ SYS_GPC_MFPL_PC7MFP_ADC_CH7

#define SYS_GPC_MFPL_PC7MFP_ADC_CH7 (0x02UL<<SYS_GPC_MFPL_PC7MFP_Pos)

ADC channel7 analog input.

Definition at line 305 of file sys.h.

## ◆ SYS_GPC_MFPL_PC7MFP_GPIO

#define SYS_GPC_MFPL_PC7MFP_GPIO (0x00UL<<SYS_GPC_MFPL_PC7MFP_Pos)

General purpose digital I/O pin.

Definition at line 303 of file sys.h.

## ◆ SYS_GPC_MFPL_PC7MFP_PWM0_CH1

#define SYS_GPC_MFPL_PC7MFP_PWM0_CH1 (0x05UL<<SYS_GPC_MFPL_PC7MFP_Pos)

PWM0 channel1 output/capture input.

Definition at line 307 of file sys.h.

## ◆ SYS_GPC_MFPL_PC7MFP_TM1_EXT

#define SYS_GPC_MFPL_PC7MFP_TM1_EXT (0x03UL<<SYS_GPC_MFPL_PC7MFP_Pos)

Timer1 external capture input.

Definition at line 306 of file sys.h.

## ◆ SYS_GPC_MFPL_PC7MFP_UART1_TXD

#define SYS_GPC_MFPL_PC7MFP_UART1_TXD (0x01UL<<SYS_GPC_MFPL_PC7MFP_Pos)

Data transmitter output pin for UART1.

Definition at line 304 of file sys.h.

## ◆ SYS_GPD_MFPH_PD14MFP_GPIO

#define SYS_GPD_MFPH_PD14MFP_GPIO (0x00UL<<SYS_GPD_MFPH_PD14MFP_Pos)

General purpose digital I/O pin.

Definition at line 334 of file sys.h.

## ◆ SYS_GPD_MFPH_PD14MFP_SC1_DAT

#define SYS_GPD_MFPH_PD14MFP_SC1_DAT (0x04UL<<SYS_GPD_MFPH_PD14MFP_Pos)

SmartCard1 data pin.

Definition at line 336 of file sys.h.

## ◆ SYS_GPD_MFPH_PD14MFP_SPI0_MOSI1

#define SYS_GPD_MFPH_PD14MFP_SPI0_MOSI1 (0x01UL<<SYS_GPD_MFPH_PD14MFP_Pos)

2nd SPI0 MOSI (Master Out, Slave In) pin.

Definition at line 335 of file sys.h.

## ◆ SYS_GPD_MFPH_PD15MFP_GPIO

#define SYS_GPD_MFPH_PD15MFP_GPIO (0x00UL<<SYS_GPD_MFPH_PD15MFP_Pos)

General purpose digital I/O pin.

Definition at line 337 of file sys.h.

## ◆ SYS_GPD_MFPH_PD15MFP_SC1_CLK

#define SYS_GPD_MFPH_PD15MFP_SC1_CLK (0x04UL<<SYS_GPD_MFPH_PD15MFP_Pos)

SmartCard1 clock pin.

Definition at line 339 of file sys.h.

## ◆ SYS_GPD_MFPH_PD15MFP_SPI0_MISO1

#define SYS_GPD_MFPH_PD15MFP_SPI0_MISO1 (0x01UL<<SYS_GPD_MFPH_PD15MFP_Pos)

2nd SPI0 MISO (Master In, Slave Out) pin.

Definition at line 338 of file sys.h.

## ◆ SYS_GPD_MFPL_PD6MFP_GPIO

#define SYS_GPD_MFPL_PD6MFP_GPIO (0x00UL<<SYS_GPD_MFPL_PD6MFP_Pos)

General purpose digital I/O pin.

Definition at line 327 of file sys.h.

## ◆ SYS_GPD_MFPL_PD6MFP_SC1_RST

#define SYS_GPD_MFPL_PD6MFP_SC1_RST (0x04UL<<SYS_GPD_MFPL_PD6MFP_Pos)

SmartCard1 reset pin.

Definition at line 329 of file sys.h.

## ◆ SYS_GPD_MFPL_PD6MFP_SPI1_MOSI1

#define SYS_GPD_MFPL_PD6MFP_SPI1_MOSI1 (0x03UL<<SYS_GPD_MFPL_PD6MFP_Pos)

2nd SPI1 MOSI (Master Out, Slave In) pin.

Definition at line 328 of file sys.h.

## ◆ SYS_GPD_MFPL_PD7MFP_GPIO

#define SYS_GPD_MFPL_PD7MFP_GPIO (0x00UL<<SYS_GPD_MFPL_PD7MFP_Pos)

General purpose digital I/O pin.

Definition at line 330 of file sys.h.

## ◆ SYS_GPD_MFPL_PD7MFP_SC1_PWR

#define SYS_GPD_MFPL_PD7MFP_SC1_PWR (0x04UL<<SYS_GPD_MFPL_PD7MFP_Pos)

SmartCard1 power pin.

Definition at line 332 of file sys.h.

## ◆ SYS_GPD_MFPL_PD7MFP_SPI1_MISO1

#define SYS_GPD_MFPL_PD7MFP_SPI1_MISO1 (0x03UL<<SYS_GPD_MFPL_PD7MFP_Pos)

2nd SPI1 MISO (Master In, Slave Out) pin.

Definition at line 331 of file sys.h.

## ◆ SYS_GPE_MFPL_PE5MFP_GPIO

#define SYS_GPE_MFPL_PE5MFP_GPIO (0x00UL<<SYS_GPE_MFPL_PE5MFP_Pos)

General purpose digital I/O pin.

Definition at line 341 of file sys.h.

## ◆ SYS_GPE_MFPL_PE5MFP_PWM0_CH5

#define SYS_GPE_MFPL_PE5MFP_PWM0_CH5 (0x01UL<<SYS_GPE_MFPL_PE5MFP_Pos)

PWM0 channel5 output/capture input.

Definition at line 342 of file sys.h.

## ◆ SYS_GPE_MFPL_PE5MFP_RTC_HZ

#define SYS_GPE_MFPL_PE5MFP_RTC_HZ (0x06UL<<SYS_GPE_MFPL_PE5MFP_Pos)

RTC output 1Hz pin.

Definition at line 343 of file sys.h.

## ◆ SYS_GPF_MFPL_PF0MFP_GPIO

#define SYS_GPF_MFPL_PF0MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF0MFP_Pos)

General purpose digital I/O pin.

Definition at line 345 of file sys.h.

## ◆ SYS_GPF_MFPL_PF0MFP_ICE_DAT

#define SYS_GPF_MFPL_PF0MFP_ICE_DAT (0x07UL<<SYS_GPF_MFPL_PF0MFP_Pos)

Serial wired debugger data pin.

Definition at line 347 of file sys.h.

## ◆ SYS_GPF_MFPL_PF0MFP_INT0

#define SYS_GPF_MFPL_PF0MFP_INT0 (0x05UL<<SYS_GPF_MFPL_PF0MFP_Pos)

External interrupt0 input pin.

Definition at line 346 of file sys.h.

## ◆ SYS_GPF_MFPL_PF1MFP_CLKO

#define SYS_GPF_MFPL_PF1MFP_CLKO (0x04UL<<SYS_GPF_MFPL_PF1MFP_Pos)

Output selected clock.

Definition at line 349 of file sys.h.

## ◆ SYS_GPF_MFPL_PF1MFP_GPIO

#define SYS_GPF_MFPL_PF1MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF1MFP_Pos)

General purpose digital I/O pin.

Definition at line 348 of file sys.h.

## ◆ SYS_GPF_MFPL_PF1MFP_ICE_CLK

#define SYS_GPF_MFPL_PF1MFP_ICE_CLK (0x07UL<<SYS_GPF_MFPL_PF1MFP_Pos)

Serial wired debugger clock pin.

Definition at line 351 of file sys.h.

## ◆ SYS_GPF_MFPL_PF1MFP_INT1

#define SYS_GPF_MFPL_PF1MFP_INT1 (0x05UL<<SYS_GPF_MFPL_PF1MFP_Pos)

External interrupt1 input pin.

Definition at line 350 of file sys.h.

## ◆ SYS_GPF_MFPL_PF2MFP_GPIO

#define SYS_GPF_MFPL_PF2MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF2MFP_Pos)

General purpose digital I/O pin.

Definition at line 352 of file sys.h.

## ◆ SYS_GPF_MFPL_PF2MFP_XT1_OUT

#define SYS_GPF_MFPL_PF2MFP_XT1_OUT (0x07UL<<SYS_GPF_MFPL_PF2MFP_Pos)

External 4~24 MHz (high speed) crystal output pin.

Definition at line 353 of file sys.h.

## ◆ SYS_GPF_MFPL_PF3MFP_GPIO

#define SYS_GPF_MFPL_PF3MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF3MFP_Pos)

General purpose digital I/O pin.

Definition at line 354 of file sys.h.

## ◆ SYS_GPF_MFPL_PF3MFP_XT1_IN

#define SYS_GPF_MFPL_PF3MFP_XT1_IN (0x07UL<<SYS_GPF_MFPL_PF3MFP_Pos)

External 4~24 MHz (high speed) crystal input pin.

Definition at line 355 of file sys.h.

## ◆ SYS_GPF_MFPL_PF6MFP_GPIO

#define SYS_GPF_MFPL_PF6MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF6MFP_Pos)

General purpose digital I/O pin.

Definition at line 356 of file sys.h.

## ◆ SYS_GPF_MFPL_PF6MFP_I2C1_SDA

#define SYS_GPF_MFPL_PF6MFP_I2C1_SDA (0x01UL<<SYS_GPF_MFPL_PF6MFP_Pos)

I2C1 data input/output pin.

Definition at line 357 of file sys.h.

## ◆ SYS_GPF_MFPL_PF6MFP_X32_OUT

#define SYS_GPF_MFPL_PF6MFP_X32_OUT (0x07UL<<SYS_GPF_MFPL_PF6MFP_Pos)

External 32.768 kHz (low speed) crystal output pin.

Definition at line 358 of file sys.h.

## ◆ SYS_GPF_MFPL_PF7MFP_GPIO

#define SYS_GPF_MFPL_PF7MFP_GPIO (0x00UL<<SYS_GPF_MFPL_PF7MFP_Pos)

General purpose digital I/O pin.

Definition at line 359 of file sys.h.

## ◆ SYS_GPF_MFPL_PF7MFP_I2C1_SCL

#define SYS_GPF_MFPL_PF7MFP_I2C1_SCL (0x01UL<<SYS_GPF_MFPL_PF7MFP_Pos)

I2C1 clock pin.

Definition at line 360 of file sys.h.

## ◆ SYS_GPF_MFPL_PF7MFP_SC0_CD

#define SYS_GPF_MFPL_PF7MFP_SC0_CD (0x03UL<<SYS_GPF_MFPL_PF7MFP_Pos)

SmartCard0 card detect pin.

Definition at line 361 of file sys.h.

## ◆ SYS_GPF_MFPL_PF7MFP_X32_IN

#define SYS_GPF_MFPL_PF7MFP_X32_IN (0x07UL<<SYS_GPF_MFPL_PF7MFP_Pos)

External 32.768 kHz (low speed) crystal input pin.

Definition at line 362 of file sys.h.

## ◆ SYS_IRC0TCTL_TRIM_11_0592M

#define SYS_IRC0TCTL_TRIM_11_0592M ((uint32_t)0x00000001)

Trim IRC to 11.0592 MHz

Definition at line 103 of file sys.h.

## ◆ SYS_IRC0TCTL_TRIM_12_288M

#define SYS_IRC0TCTL_TRIM_12_288M ((uint32_t)0x00000003)

Trim IRC to 12.288 MHz

Definition at line 105 of file sys.h.

## ◆ SYS_IRC0TCTL_TRIM_12M

#define SYS_IRC0TCTL_TRIM_12M ((uint32_t)0x00000002)

Trim IRC to 12 MHz

Definition at line 104 of file sys.h.

## ◆ SYS_IRC0TCTL_TRIM_16M

#define SYS_IRC0TCTL_TRIM_16M ((uint32_t)0x00000004)

Trim IRC to 16 MHz

Definition at line 106 of file sys.h.

## ◆ SYS_IRC1TCTL_TRIM_36M

#define SYS_IRC1TCTL_TRIM_36M ((uint32_t)0x00000002)

Trim IRC to 36 MHz

Definition at line 108 of file sys.h.

## ◆ SYS_IRCTCTL_CLKERR_STOP

#define SYS_IRCTCTL_CLKERR_STOP ((uint32_t)0x00000100)

Clock error stop enable

Definition at line 121 of file sys.h.

## ◆ SYS_IRCTCTL_LOOP_16CLK

#define SYS_IRCTCTL_LOOP_16CLK ((uint32_t)0x00000020)

Based on average difference in 16 x 32.768 kHz clock

Definition at line 113 of file sys.h.

## ◆ SYS_IRCTCTL_LOOP_32CLK

#define SYS_IRCTCTL_LOOP_32CLK ((uint32_t)0x00000030)

Based on average difference in 32 x 32.768 kHz clock

Definition at line 114 of file sys.h.

## ◆ SYS_IRCTCTL_LOOP_4CLK

#define SYS_IRCTCTL_LOOP_4CLK ((uint32_t)0x00000000)

Based on average difference in 4 x 32.768 kHz clock

Definition at line 111 of file sys.h.

## ◆ SYS_IRCTCTL_LOOP_8CLK

#define SYS_IRCTCTL_LOOP_8CLK ((uint32_t)0x00000010)

Based on average difference in 8 x 32.768 kHz clock

Definition at line 112 of file sys.h.

## ◆ SYS_IRCTCTL_RETRY_128

#define SYS_IRCTCTL_RETRY_128 ((uint32_t)0x00000040)

Trim retry count limitation is 128

Definition at line 117 of file sys.h.

## ◆ SYS_IRCTCTL_RETRY_256

#define SYS_IRCTCTL_RETRY_256 ((uint32_t)0x00000080)

Trim retry count limitation is 256

Definition at line 118 of file sys.h.

## ◆ SYS_IRCTCTL_RETRY_512

#define SYS_IRCTCTL_RETRY_512 ((uint32_t)0x000000C0)

Trim retry count limitation is 512

Definition at line 119 of file sys.h.

## ◆ SYS_IRCTCTL_RETRY_64

#define SYS_IRCTCTL_RETRY_64 ((uint32_t)0x00000000)

Trim retry count limitation is 64

Definition at line 116 of file sys.h.

## ◆ SYS_IRCTIEN_32KERR_EN

#define SYS_IRCTIEN_32KERR_EN ((uint32_t)0x00000004)

32.768 kHz Clock Error Interrupt Enable

Definition at line 126 of file sys.h.

## ◆ SYS_IRCTIEN_DISABLE

#define SYS_IRCTIEN_DISABLE ((uint32_t)0x00000000)

Trim failure interrupt disable

Definition at line 124 of file sys.h.

## ◆ SYS_IRCTIEN_FAIL_EN

#define SYS_IRCTIEN_FAIL_EN ((uint32_t)0x00000002)

Trim failure interrupt enable

Definition at line 125 of file sys.h.

## ◆ SYS_IRCTISTS_32KERR_INT

#define SYS_IRCTISTS_32KERR_INT ((uint32_t)0x00000004)

32.768 kHz Clock Error Interrupt Status

Definition at line 131 of file sys.h.

## ◆ SYS_IRCTISTS_FAIL_INT

#define SYS_IRCTISTS_FAIL_INT ((uint32_t)0x00000002)

Trim failure interrupt status

Definition at line 130 of file sys.h.

## ◆ SYS_IRCTISTS_FREQLOCK

#define SYS_IRCTISTS_FREQLOCK ((uint32_t)0x00000001)

HIRC frequency lock status

Definition at line 129 of file sys.h.

## ◆ SYS_IVREFCTL_BGP_EN

#define SYS_IVREFCTL_BGP_EN ((uint32_t)0x00000001)

Band-gap Enable

Definition at line 88 of file sys.h.

## ◆ SYS_IVREFCTL_EXTMODE

#define SYS_IVREFCTL_EXTMODE ((uint32_t)0x00000010)

Regulator External Mode

Definition at line 93 of file sys.h.

## ◆ SYS_IVREFCTL_REG_EN

#define SYS_IVREFCTL_REG_EN ((uint32_t)0x00000002)

Regulator Enable

Definition at line 89 of file sys.h.

## ◆ SYS_IVREFCTL_SEL15

#define SYS_IVREFCTL_SEL15 ((uint32_t)0x00000000)

Regulator Output Voltage 1.5V

Definition at line 92 of file sys.h.

## ◆ SYS_IVREFCTL_SEL18

#define SYS_IVREFCTL_SEL18 ((uint32_t)0x00000004)

Regulator Output Voltage 1.8V

Definition at line 91 of file sys.h.

## ◆ SYS_IVREFCTL_SEL25

#define SYS_IVREFCTL_SEL25 ((uint32_t)0x00000008)

Regulator Output Voltage 2.5V

Definition at line 90 of file sys.h.

## ◆ SYS_LDOCTL_LDO_LEVEL12

#define SYS_LDOCTL_LDO_LEVEL12 ((uint32_t)0x00000000)

LDO Output 1.2 Voltage

Definition at line 97 of file sys.h.

## ◆ SYS_LDOCTL_LDO_LEVEL16

#define SYS_LDOCTL_LDO_LEVEL16 ((uint32_t)0x00000004)

LDO Output 1.6 Voltage

Definition at line 98 of file sys.h.

## ◆ SYS_LDOCTL_LDO_LEVEL18

#define SYS_LDOCTL_LDO_LEVEL18 ((uint32_t)0x00000008)

LDO Output 1.8 Voltage

Definition at line 99 of file sys.h.

## ◆ SYS_MIRCTCTL_TRIM_4M

#define SYS_MIRCTCTL_TRIM_4M ((uint32_t)0x00000002)

Trim IRC to 4 MHz

Definition at line 109 of file sys.h.

## ◆ TMR0_RST

#define TMR0_RST ((0x4<<24) | SYS_IPRST2_TMR0RST_Pos )

Timer0 reset is one of the SYS_ResetModule parameter

Definition at line 54 of file sys.h.

## ◆ TMR1_RST

#define TMR1_RST ((0x4<<24) | SYS_IPRST2_TMR1RST_Pos )

Timer1 reset is one of the SYS_ResetModule parameter

Definition at line 53 of file sys.h.

## ◆ TMR2_RST

#define TMR2_RST ((0x4<<24) | SYS_IPRST2_TMR2RST_Pos )

Timer2 reset is one of the SYS_ResetModule parameter

Definition at line 52 of file sys.h.

## ◆ TMR3_RST

#define TMR3_RST ((0x4<<24) | SYS_IPRST2_TMR3RST_Pos )

Timer3 reset is one of the SYS_ResetModule parameter

Definition at line 51 of file sys.h.

## ◆ UART0_RST

#define UART0_RST ((0x4<<24) | SYS_IPRST2_UART0RST_Pos )

UART0 reset is one of the SYS_ResetModule parameter

Definition at line 44 of file sys.h.

## ◆ UART1_RST

#define UART1_RST ((0x4<<24) | SYS_IPRST2_UART1RST_Pos )

UART1 reset is one of the SYS_ResetModule parameter

Definition at line 43 of file sys.h.