| NUC472_NUC442_BSP V3.03.003 The Board Support Package for NUC472/NUC442

Macros | Functions
EADC Exported Functions
NUC472/NUC442 Device Driver » EADC Driver » EADC Exported Constants
Collaboration diagram for EADC Exported Functions:

## Macros
#define | EADC_POWER_DOWN(eadc)
| Power down EADC module. More...
#define | EADC_POWER_ON(eadc)
| Power on EADC module. More...
#define | EADC_CONV_RESET(eadc)
| A/D Converter Control Circuits Reset. More...
#define | EADC_ENABLE_DOUBLE_BUFFER(eadc, u32ModuleNum)
| Enable double buffer mode. More...
#define | EADC_DISABLE_DOUBLE_BUFFER(eadc, u32ModuleNum)
| Disable double buffer mode. More...
#define | EADC_ENABLE_INT(eadc, u32Mask)
| Enable the interrupt. More...
#define | EADC_DISABLE_INT(eadc, u32Mask)
| Disable the interrupt. More...
#define | EADC_ENABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask)
| Enable the sample module interrupt. More...
#define | EADC_DISABLE_SAMPLE_MODULE_INT(eadc, u32IntSel, u32ModuleMask)
| Disable the sample module interrupt. More...
#define | EADC_START_CONV(eadc, u32ModuleMask)
| Start the A/D conversion. More...
#define | EADC_GET_PENDING_CONV(eadc)
| Get the conversion pending flag. More...
#define | EADC_GET_CONV_DATA(eadc, u32ModuleNum)
| Get the conversion data of the user-specified sample module. More...
#define | EADC_GET_DATA_OVERRUN_FLAG(eadc, u32ModuleMask)
| Get the data overrun flag of the user-specified sample module. More...
#define | EADC_GET_DATA_VALID_FLAG(eadc, u32ModuleMask)
| Get the data valid flag of the user-specified sample module. More...
#define | EADC_GET_DOUBLE_DATA(eadc, u32ModuleNum)
| Get the double data of the user-specified sample module. More...
#define | EADC_GET_INT_FLAG(eadc, u32Mask)
| Get the user-specified interrupt flags. More...
#define | EADC_GET_SAMPLE_MODULE_OV_FLAG(eadc, u32ModuleMask)
| Get the user-specified sample module overrun flags. More...
#define | EADC_CLR_INT_FLAG(eadc, u32Mask)
| Clear the selected interrupt status bits. More...
#define | EADC_IS_DATA_OV(eadc)
| Check all sample module A/D result data register overrun flags. More...
#define | EADC_IS_DATA_VALID(eadc)
| Check all sample module A/D result data register valid flags. More...
#define | EADC_IS_SAMPLE_MODULE_OV(eadc)
| Check all A/D sample module start of conversion overrun flags. More...
#define | EADC_IS_INT_FLAG_OV(eadc)
| Check all A/D interrupt flag overrun bits. More...
#define | EADC_IS_BUSY(eadc, converter)
| Get the busy state of EADC. More...
#define | EADC_ENABLE_CMP0(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
| Configure the comparator 0 and enable it. More...
#define | EADC_ENABLE_CMP1(eadc, u32ModuleNum, u32Condition, u16CMPData, u32MatchCount)
| Configure the comparator 1 and enable it. More...
#define | EADC_ENABLE_CMP_INT(eadc, u32CMP)
| Enable the compare interrupt. More...
#define | EADC_DISABLE_CMP_INT(eadc, u32CMP)
| Disable the compare interrupt. More...
#define | EADC_DISABLE_CMP0(eadc)
| Disable comparator 0. More...
#define | EADC_DISABLE_CMP1(eadc)
| Disable comparator 1. More...
#define | EADC_ENABLE_SIMULTANEOUS(eadc, u32ModuleMask)
| Enable simultaneous mode. More...
#define | EADC_DISABLE_SIMULTANEOUS(eadc, u32ModuleMask)
| Disable simultaneous mode. More...
#define | EADC_EnablePWMTriggerCondition(eadc, u32ADTriggerModuleNum, u32TriggerMask) (*(__IO uint32_t *)(&(eadc)->AD0TRGEN0 + (u32ADTriggerModuleNum)) |= (u32TriggerMask))
| Enable PWM and EPWM trigger trigger EADC condition. More...
#define | EADC_DisablePWMTriggerCondition(eadc, u32ADTriggerModuleNum, u32TriggerMask) (*(__IO uint32_t *)(&(eadc)->AD0TRGEN0 + (u32ADTriggerModuleNum)) |= (u32TriggerMask))
| Disable PWM and EPWM trigger trigger EADC condition. More...

## Functions
void | EADC_Open (EADC_T *eadc, uint32_t u32InputMode)
| This function make EADC_module be ready to convert. More...
void | EADC_Close (EADC_T *eadc)
| Disable EADC_module. More...
void | EADC_ConfigSampleModule (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerSrc, uint32_t u32Channel)
| Configure the sample control logic module. More...
void | EADC_SetTriggerDelayTime (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32TriggerDelayTime, uint32_t u32DelayClockDivider)
| Set trigger delay time. More...
void | EADC_SetExtendSampleTime (EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime)
| Set EADC extend sample time. More...

## Detailed Description

## Macro Definition Documentation

## ◆ EADC_CLR_INT_FLAG

#define EADC_CLR_INT_FLAG | ( |  | eadc,
|  |  | u32Mask
| ) |  |

Clear the selected interrupt status bits.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32Mask | The combination of compare interrupt status bits. Each bit corresponds to a compare interrupt status. Bit 0 is ADIF0, bit 1 is ADIF1..., bit 3 is ADIF3. Bit 4 is ADCMPO0, bit 5 is ADCMPO1, bit 6 is ADCMPF0, bit 7 is ADCMPF1.

Returns
  None

This macro is used to clear clear the selected interrupt status bits.

Definition at line 376 of file eadc.h.

## ◆ EADC_CONV_RESET

#define EADC_CONV_RESET | ( |  | eadc | ) |

A/D Converter Control Circuits Reset.

Parameters

  [in] | eadc | Base address of EADC module.

Returns
  None

ADCRST bit (EADC_CT[1]) remains 1 during EADC reset, when EADC reset end, the ADCRST bit is automatically cleared to 0.

Definition at line 172 of file eadc.h.

## ◆ EADC_DISABLE_CMP0

#define EADC_DISABLE_CMP0 | ( |  | eadc | ) |

Disable comparator 0.

Parameters

  [in] | eadc | Base address of EADC module.

Returns
  None

This macro is used to disable comparator 0.

Definition at line 524 of file eadc.h.

## ◆ EADC_DISABLE_CMP1

#define EADC_DISABLE_CMP1 | ( |  | eadc | ) |

Disable comparator 1.

Parameters

  [in] | eadc | Base address of EADC module.

Returns
  None

This macro is used to disable comparator 1.

Definition at line 533 of file eadc.h.

## ◆ EADC_DISABLE_CMP_INT

#define EADC_DISABLE_CMP_INT | ( |  | eadc,
|  |  | u32CMP
| ) |  |

Disable the compare interrupt.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32CMP | Specifies the compare register, valid value are 0 and 1.

Returns
  None

This macro is used to disable the compare interrupt.

Definition at line 515 of file eadc.h.

## ◆ EADC_DISABLE_DOUBLE_BUFFER

#define EADC_DISABLE_DOUBLE_BUFFER | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Disable double buffer mode.

Parameters

  [in] | eadc | Base address of EADC module..
  [in] | u32ModuleNum | Decides the sample module number, valid values are: EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3

Returns
  None

Sample has one sample result register.

Definition at line 208 of file eadc.h.

## ◆ EADC_DISABLE_INT

#define EADC_DISABLE_INT | ( |  | eadc,
|  |  | u32Mask
| ) |  |

Disable the interrupt.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32Mask | Decides the combination of interrupt enable bits. Each bit corresponds to a interrupt enable. This parameter decides which interrupts will be disabled. Bit 0 is ADCIEN0, bit 1 is ADCIEN1..., bit 3 is ADCIEN3.

Returns
  None

Specific sample module A/D ADINT0 interrupt function Disabled.

Definition at line 231 of file eadc.h.

## ◆ EADC_DISABLE_SAMPLE_MODULE_INT

#define EADC_DISABLE_SAMPLE_MODULE_INT | ( |  | eadc,
|  |  | u32IntSel,
|  |  | u32ModuleMask
| ) |  |

Disable the sample module interrupt.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32IntSel | Decides which interrupt source will be used, valid value are from 0 to 3.
  [in] | u32ModuleMask | the combination of sample module interrupt enable bits. Each bit corresponds to a sample module interrupt enable. This parameter decides which sample module interrupts will be disabled, valid range are between 1~0xFFFF.

Returns
  None

There are 4 EADC interrupts ADINT0~3, and each of these interrupts has its own interrupt vector address.

Definition at line 255 of file eadc.h.

## ◆ EADC_DISABLE_SIMULTANEOUS

#define EADC_DISABLE_SIMULTANEOUS | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Disable simultaneous mode.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleMask | The combination of sample module. Each bit corresponds to a sample module. This parameter decides which sample module will be set to disable simultaneous mode, valid range are between 1~0xFF. Bit 0 is sample module 0, bit 1 is sample module 1..., bit 7 is sample module 7.

Returns
  None

This macro is used to set selected sample modules to disable simultaneous mode.

Definition at line 557 of file eadc.h.

## ◆ EADC_DisablePWMTriggerCondition

#define EADC_DisablePWMTriggerCondition | ( |  | eadc,
|  |  | u32ADTriggerModuleNum,
|  |  | u32TriggerMask
| ) |  | (*(__IO uint32_t *)(&(eadc)->AD0TRGEN0 + (u32ADTriggerModuleNum)) |= (u32TriggerMask))

Disable PWM and EPWM trigger trigger EADC condition.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ADTriggerModuleNum | Decides the sample module number, valid values are: EADC0_TRIGGEREN0 : AD trigger condition for SAMPLE00 EADC0_TRIGGEREN1 : AD trigger condition for SAMPLE01 EADC0_TRIGGEREN2 : AD trigger condition for SAMPLE02 EADC0_TRIGGEREN3 : AD trigger condition for SAMPLE03 EADC1_TRIGGEREN0 : AD trigger condition for SAMPLE10 EADC1_TRIGGEREN1 : AD trigger condition for SAMPLE11 EADC1_TRIGGEREN2 : AD trigger condition for SAMPLE12 EADC1_TRIGGEREN3 : AD trigger condition for SAMPLE13
  [in] | u32TriggerMask | Decides the PWM and EPWM trigger EADC condition, valid range are between 0~0xFFFFFFFF.

Returns
  None

This macro is used to disable PWM and EPWM trigger EADC condition.

Definition at line 593 of file eadc.h.

## ◆ EADC_ENABLE_CMP0

#define EADC_ENABLE_CMP0 | ( |  | eadc,
|  |  | u32ModuleNum,
|  |  | u32Condition,
|  |  | u16CMPData,
|  |  | u32MatchCount
| ) |  |

Configure the comparator 0 and enable it.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleNum | specifies the compare sample module, valid values are: CMP_EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 CMP_EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 CMP_EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 CMP_EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 CMP_EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 CMP_EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 CMP_EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 CMP_EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3
  [in] | u32Condition | specifies the compare condition. Valid values are: EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value
  [in] | u16CMPData | specifies the compare value, valid range are between 0~0xFFF.
  [in] | u32MatchCount | specifies the match count setting, valid range are between 0~0xF.

Returns
  None

For example, ADC_ENABLE_CMP0(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_CMPWEN_DISABLE, EADC_CMP_ADCMPIE_ENABLE); Means EADC will assert comparator 0 flag if sample module 5 conversion result is greater or equal to 0x800 for 10 times continuously, and a compare interrupt request is generated.

Definition at line 452 of file eadc.h.

## ◆ EADC_ENABLE_CMP1

#define EADC_ENABLE_CMP1 | ( |  | eadc,
|  |  | u32ModuleNum,
|  |  | u32Condition,
|  |  | u16CMPData,
|  |  | u32MatchCount
| ) |  |

Configure the comparator 1 and enable it.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleNum | specifies the compare sample module, valid values are: CMP_EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 CMP_EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 CMP_EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 CMP_EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 CMP_EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 CMP_EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 CMP_EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 CMP_EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3
  [in] | u32Condition | specifies the compare condition. Valid values are: EADC_CMP_CMPCOND_LESS_THAN :The compare condition is "less than the compare value" EADC_CMP_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value
  [in] | u16CMPData | specifies the compare value, valid range are between 0~0xFFF.
  [in] | u32MatchCount | specifies the match count setting, valid range are between 0~0xF.

Returns
  None

For example, ADC_ENABLE_CMP1(EADC, 5, ADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10, EADC_CMP_ADCMPIE_ENABLE); Means EADC will assert comparator 1 flag if sample module 5 conversion result is greater or equal to 0x800 for 10 times continuously, and a compare interrupt request is generated.

Definition at line 485 of file eadc.h.

## ◆ EADC_ENABLE_CMP_INT

#define EADC_ENABLE_CMP_INT | ( |  | eadc,
|  |  | u32CMP
| ) |  |

Enable the compare interrupt.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32CMP | Specifies the compare register, valid value are 0 and 1.

Returns
  None

If the compare function is enabled and the compare condition matches the setting of CMPCOND (EADC_CMPn[2], n=0~1) and CMPMCNT (EADC_CMPn[11:8], n=0~1), ADCMPFn (EADC_STATUS1[7:6], n=0~1) will be asserted, in the meanwhile, if ADCMPIE is set to 1, a compare interrupt request is generated.

Definition at line 505 of file eadc.h.

## ◆ EADC_ENABLE_DOUBLE_BUFFER

#define EADC_ENABLE_DOUBLE_BUFFER | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Enable double buffer mode.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid values are: EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3

Returns
  None

The EADC controller supports a double buffer mode in eadc0/1 sample module 0~3.

Definition at line 190 of file eadc.h.

## ◆ EADC_ENABLE_INT

#define EADC_ENABLE_INT | ( |  | eadc,
|  |  | u32Mask
| ) |  |

Enable the interrupt.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32Mask | Decides the combination of interrupt enable bits. Each bit corresponds to a interrupt enable. This parameter decides which interrupts will be enabled. Bit 0 is ADCIEN0, bit 1 is ADCIEN1..., bit 3 is ADCIEN3.

Returns
  None

The A/D converter generates a conversion end ADIFn (EADC_STATUS1[n]) upon the end of specific sample module A/D conversion. If ADCIENn bit (EADC_CTL[n+2]) is set then conversion end interrupt request ADINTn is generated (n=0~3).

Definition at line 220 of file eadc.h.

## ◆ EADC_ENABLE_SAMPLE_MODULE_INT

#define EADC_ENABLE_SAMPLE_MODULE_INT | ( |  | eadc,
|  |  | u32IntSel,
|  |  | u32ModuleMask
| ) |  |

Enable the sample module interrupt.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32IntSel | Decides which interrupt source will be used, valid value are from 0 to 3.
  [in] | u32ModuleMask | the combination of sample module interrupt enable bits. Each bit corresponds to a sample module interrupt enable. This parameter decides which sample module interrupts will be enabled, valid range are between 1~0xFFFF.

Returns
  None

There are 4 EADC interrupts ADINT0~3, and each of these interrupts has its own interrupt vector address.

Definition at line 243 of file eadc.h.

## ◆ EADC_ENABLE_SIMULTANEOUS

#define EADC_ENABLE_SIMULTANEOUS | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Enable simultaneous mode.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleMask | The combination of sample module. Each bit corresponds to a sample module. This parameter decides which sample module will be set to simultaneous mode, valid range are between 1~0xFF. Bit 0 is sample module 0, bit 1 is sample module 1..., bit 7 is sample module 7.

Returns
  None

This macro is used to set selected sample modules to be simultaneous mode.

Definition at line 545 of file eadc.h.

## ◆ EADC_EnablePWMTriggerCondition

#define EADC_EnablePWMTriggerCondition | ( |  | eadc,
|  |  | u32ADTriggerModuleNum,
|  |  | u32TriggerMask
| ) |  | (*(__IO uint32_t *)(&(eadc)->AD0TRGEN0 + (u32ADTriggerModuleNum)) |= (u32TriggerMask))

Enable PWM and EPWM trigger trigger EADC condition.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ADTriggerModuleNum | Decides the sample module number, valid values are: EADC0_TRIGGEREN0 : AD trigger condition for SAMPLE00 EADC0_TRIGGEREN1 : AD trigger condition for SAMPLE01 EADC0_TRIGGEREN2 : AD trigger condition for SAMPLE02 EADC0_TRIGGEREN3 : AD trigger condition for SAMPLE03 EADC1_TRIGGEREN0 : AD trigger condition for SAMPLE10 EADC1_TRIGGEREN1 : AD trigger condition for SAMPLE11 EADC1_TRIGGEREN2 : AD trigger condition for SAMPLE12 EADC1_TRIGGEREN3 : AD trigger condition for SAMPLE13
  [in] | u32TriggerMask | Decides the PWM and EPWM trigger EADC condition, valid range are between 0~0xFFFFFFFF.

Returns
  None

This macro is used to enable PWM and EPWM trigger EADC condition.

Definition at line 575 of file eadc.h.

## ◆ EADC_GET_CONV_DATA

#define EADC_GET_CONV_DATA | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Get the conversion data of the user-specified sample module.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid values are: EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4 EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5 EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6 EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7 EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3 EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4 EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5 EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6 EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7

Returns
  Return the conversion data of the user-specified sample module.

This macro is used to read RESULT bit (EADC_ADxDATn[11:0], x=0~1, n=0~7) field to get conversion data.

Definition at line 304 of file eadc.h.

## ◆ EADC_GET_DATA_OVERRUN_FLAG

#define EADC_GET_DATA_OVERRUN_FLAG | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Get the data overrun flag of the user-specified sample module.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleMask | The combination of data overrun status bits. Each bit corresponds to a data overrun status, valid range are between 1~0x7FFFF.

Returns
  Return the data overrun flag of the user-specified sample module.

This macro is used to read OV bit (EADC_STATUS0[31:16]) field to get data overrun status.

Definition at line 314 of file eadc.h.

## ◆ EADC_GET_DATA_VALID_FLAG

#define EADC_GET_DATA_VALID_FLAG | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Get the data valid flag of the user-specified sample module.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleMask | The combination of data valid status bits. Each bit corresponds to a data valid status, valid range are between 1~0x7FFFF.

Returns
  Return the data valid flag of the user-specified sample module.

This macro is used to read VALID bit of EADC_STATUS0[15:0] to get data valid status.

Definition at line 324 of file eadc.h.

## ◆ EADC_GET_DOUBLE_DATA

#define EADC_GET_DOUBLE_DATA | ( |  | eadc,
|  |  | u32ModuleNum
| ) |  |

Get the double data of the user-specified sample module.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid values are: EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3

Returns
  Return the double data of the user-specified sample module.

This macro is used to read RESULT bit (EADC_ADxDDATn[11:0], x=0~1, n=0~3) field to get conversion data.

Definition at line 342 of file eadc.h.

## ◆ EADC_GET_INT_FLAG

#define EADC_GET_INT_FLAG | ( |  | eadc,
|  |  | u32Mask
| ) |  |

Get the user-specified interrupt flags.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32Mask | The combination of interrupt status bits. Each bit corresponds to a interrupt status. Bit 0 is ADIF0, bit 1 is ADIF1..., bit 3 is ADIF3. Bit 4 is ADCMPO0, bit 5 is ADCMPO1, bit 6 is ADCMPF0, bit 7 is ADCMPF1.

Returns
  Return the user-specified interrupt flags.

This macro is used to get the user-specified interrupt flags.

Definition at line 354 of file eadc.h.

## ◆ EADC_GET_PENDING_CONV

#define EADC_GET_PENDING_CONV | ( |  | eadc | ) |

Get the conversion pending flag.

Parameters

  [in] | eadc | Base address of EADC module.

Returns
  Return the conversion pending sample module.
  None

This STPFn(EADC_PENDSTS[15:0]) bit remains 1 during pending state, when the respective EADC conversion is end, the STPFn (n=0~15) bit is automatically cleared to 0.

Definition at line 278 of file eadc.h.

## ◆ EADC_GET_SAMPLE_MODULE_OV_FLAG

#define EADC_GET_SAMPLE_MODULE_OV_FLAG | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Get the user-specified sample module overrun flags.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleMask | The combination of sample module overrun status bits. Each bit corresponds to a sample module overrun status, valid range are between 1~0xFFFF.

Returns
  Return the user-specified sample module overrun flags.

This macro is used to get the user-specified sample module overrun flags.

Definition at line 364 of file eadc.h.

## ◆ EADC_IS_BUSY

#define EADC_IS_BUSY | ( |  | eadc,
|  |  | converter
| ) |  |

Get the busy state of EADC.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | converter | Which converter, it should be 0 or 1.

Return values

  0 | Idle state.
  1 | Busy state.

This macro is used to read BUSY0(EADC_STATUS1[8]) or BUSY1(EADC_STATUS1[16]) to get busy state.

Definition at line 427 of file eadc.h.

## ◆ EADC_IS_DATA_OV

#define EADC_IS_DATA_OV | ( |  | eadc | ) |

Check all sample module A/D result data register overrun flags.

Parameters

  [in] | eadc | Base address of EADC module.

Return values

  0 | None of sample module data register overrun flag is set to 1.
  1 | Any one of sample module data register overrun flag is set to 1.

The AOV bit (EADC_STATUS1[27]) will keep 1 when any one of sample module data register overrun flag OVn (EADC_ADxDATn[16]) is set to 1.

Definition at line 386 of file eadc.h.

## ◆ EADC_IS_DATA_VALID

#define EADC_IS_DATA_VALID | ( |  | eadc | ) |

Check all sample module A/D result data register valid flags.

Parameters

  [in] | eadc | Base address of EADC module.

Return values

  0 | None of sample module data register valid flag is set to 1.
  1 | Any one of sample module data register valid flag is set to 1.

The AVALID bit (EADC_STATUS1[26]) will keep 1 when any one of sample module data register valid flag VALIDn (EADC_ADxDATn[17]) is set to 1.

Definition at line 396 of file eadc.h.

## ◆ EADC_IS_INT_FLAG_OV

#define EADC_IS_INT_FLAG_OV | ( |  | eadc | ) |

Check all A/D interrupt flag overrun bits.

Parameters

  [in] | eadc | Base address of EADC module.

Return values

  0 | None of ADINT interrupt flag is overwritten to 1.
  1 | Any one of ADINT interrupt flag is overwritten to 1.

The ADOVIF bit (EADC_STATUS1[24]) will keep 1 when any one of ADINT interrupt flag ADFOVn (EADC_ADIFOV[3:0]) is overwritten to 1.

Definition at line 416 of file eadc.h.

## ◆ EADC_IS_SAMPLE_MODULE_OV

#define EADC_IS_SAMPLE_MODULE_OV | ( |  | eadc | ) |

Check all A/D sample module start of conversion overrun flags.

Parameters

  [in] | eadc | Base address of EADC module.

Return values

  0 | None of sample module event overrun flag is set to 1.
  1 | Any one of sample module event overrun flag is set to 1.

The STOVF bit (EADC_STATUS1[25]) will keep 1 when any one of sample module event overrun flag SPOVFn (EADC_OVSTS[n]) is set to 1.

Definition at line 406 of file eadc.h.

## ◆ EADC_POWER_DOWN

#define EADC_POWER_DOWN | ( |  | eadc | ) |

Power down EADC module.

Parameters

  [in] | eadc | Base address of EADC module

Returns
  None

Definition at line 155 of file eadc.h.

## ◆ EADC_POWER_ON

#define EADC_POWER_ON | ( |  | eadc | ) |

Power on EADC module.

Parameters

  [in] | eadc | Base address of EADC module

Returns
  None

Definition at line 163 of file eadc.h.

## ◆ EADC_START_CONV

#define EADC_START_CONV | ( |  | eadc,
|  |  | u32ModuleMask
| ) |  |

Start the A/D conversion.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleMask | The combination of sample module. Each bit corresponds to a sample module. This parameter decides which sample module will be conversion, valid range are between 1~0xFFFF. Bit 0 is sample module 0, bit 1 is sample module 1..., bit 15 is sample module 15.

Returns
  None

After write EADC_SWTRG register to start EADC conversion, the EADC_PENDSTS register will show which SAMPLE will conversion.

Definition at line 267 of file eadc.h.

## Function Documentation

## ◆ EADC_Close()

void EADC_Close | ( | EADC_T * | eadc | ) |

Disable EADC_module.

Parameters

  [in] | eadc | Base address of EADC module..

Returns
  None

Clear ADCEN bit (EADC_CTL[0]) to disable A/D converter analog circuit power consumption.

Definition at line 47 of file eadc.c.

## ◆ EADC_ConfigSampleModule()

void EADC_ConfigSampleModule | ( | EADC_T * | eadc,
|  | uint32_t | u32ModuleNum,
|  | uint32_t | u32TriggerSrc,
|  | uint32_t | u32Channel
| ) |  |

Configure the sample control logic module.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid values are: EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4 EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5 EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6 EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7 EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3 EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4 EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5 EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6 EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7
  [in] | u32TriggerSrc | Decides the trigger source. Valid values are: EADC_SOFTWARE_TRIGGER : Disable trigger EADC_STADC_TRIGGER : STADC pin trigger EADC_ADINT0_TRIGGER : EADC ADINT0 interrupt EOC pulse trigger EADC_ADINT1_TRIGGER : EADC ADINT1 interrupt EOC pulse trigger EADC_TIMER0_TRIGGER : Timer0 overflow pulse trigger EADC_TIMER1_TRIGGER : Timer1 overflow pulse trigger EADC_TIMER2_TRIGGER : Timer2 overflow pulse trigger EADC_TIMER3_TRIGGER : Timer3 overflow pulse trigger EADC_EPWM0CH0_TRIGGER : EPWM0CH0 trigger EADC_EPWM0CH2_TRIGGER : EPWM0CH2 trigger EADC_EPWM0CH4_TRIGGER : EPWM0CH4 trigger EADC_EPWM1CH0_TRIGGER : EPWM0CH0 trigger EADC_EPWM1CH2_TRIGGER : EPWM0CH2 trigger EADC_EPWM1CH4_TRIGGER : EPWM0CH4 trigger EADC_PWM0CH0_TRIGGER : PWM0CH0 trigger EADC_PWM0CH1_TRIGGER : PWM0CH1 trigger
  [in] | u32Channel | Specifies the sample module channel, valid value are: EADC0_CH0 : EADC0 channel 0 EADC0_CH1 : EADC0 channel 1 EADC0_CH2 : EADC0 channel 2 EADC0_CH3 : EADC0 channel 3 EADC0_CH4 : EADC0 channel 4 EADC0_CH5 : EADC0 channel 5 EADC0_CH6 : EADC0 channel 6 EADC0_CH7 : EADC0 channel 7 EADC0_VBG : EADC0 VBG EADC0_VTEMP : EADC0 VTEMP EADC0_AVSS : EADC0 AVSS EADC0_OP0 : EADC0 OP0 EADC1_CH0 : EADC1 channel 0 EADC1_CH1 : EADC1 channel 1 EADC1_CH2 : EADC1 channel 2 EADC1_CH3 : EADC1 channel 3 EADC1_CH4 : EADC1 channel 4 EADC1_CH5 : EADC1 channel 5 EADC1_CH6 : EADC1 channel 6 EADC1_CH7 : EADC1 channel 7 EADC1_OP1 : EADC1 OP1

Returns
  None

Each of EADC control logic modules 0~15 which is configurable for EADC converter channel and trigger source.

Definition at line 114 of file eadc.c.

## ◆ EADC_Open()

void EADC_Open | ( | EADC_T * | eadc,
|  | uint32_t | u32InputMode
| ) |  |

This function make EADC_module be ready to convert.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32InputMode | This parameter is not used.

Returns
  None

This function is used to set analog input mode and enable A/D Converter. Before starting A/D conversion function, ADCEN bit (EADC_CTL[0]) should be set to 1.

Note

Definition at line 36 of file eadc.c.

## ◆ EADC_SetExtendSampleTime()

void EADC_SetExtendSampleTime | ( | EADC_T * | eadc,
|  | uint32_t | u32ModuleNum,
|  | uint32_t | u32ExtendSampleTime
| ) |  |

Set EADC extend sample time.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid values are: EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4 EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5 EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6 EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7 EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3 EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4 EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5 EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6 EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7
  [in] | u32ExtendSampleTime | Decides the extend sampling time, the range is from 0~255 EADC clock. Valid value are from 0 to 0xFF.

Returns
  None

When A/D converting at high conversion rate, the sampling time of analog input voltage may not enough if input channel loading is heavy, user can extend A/D sampling time after trigger source is coming to get enough sampling time.

Definition at line 192 of file eadc.c.

## ◆ EADC_SetTriggerDelayTime()

void EADC_SetTriggerDelayTime | ( | EADC_T * | eadc,
|  | uint32_t | u32ModuleNum,
|  | uint32_t | u32TriggerDelayTime,
|  | uint32_t | u32DelayClockDivider
| ) |  |

Set trigger delay time.

Parameters

  [in] | eadc | Base address of EADC module.
  [in] | u32ModuleNum | Decides the sample module number, valid values are: EADC0_SAMPLE_MODULE0 : EADC0 SAMPLE module 0 EADC0_SAMPLE_MODULE1 : EADC0 SAMPLE module 1 EADC0_SAMPLE_MODULE2 : EADC0 SAMPLE module 2 EADC0_SAMPLE_MODULE3 : EADC0 SAMPLE module 3 EADC0_SAMPLE_MODULE4 : EADC0 SAMPLE module 4 EADC0_SAMPLE_MODULE5 : EADC0 SAMPLE module 5 EADC0_SAMPLE_MODULE6 : EADC0 SAMPLE module 6 EADC0_SAMPLE_MODULE7 : EADC0 SAMPLE module 7 EADC1_SAMPLE_MODULE0 : EADC1 SAMPLE module 0 EADC1_SAMPLE_MODULE1 : EADC1 SAMPLE module 1 EADC1_SAMPLE_MODULE2 : EADC1 SAMPLE module 2 EADC1_SAMPLE_MODULE3 : EADC1 SAMPLE module 3 EADC1_SAMPLE_MODULE4 : EADC1 SAMPLE module 4 EADC1_SAMPLE_MODULE5 : EADC1 SAMPLE module 5 EADC1_SAMPLE_MODULE6 : EADC1 SAMPLE module 6 EADC1_SAMPLE_MODULE7 : EADC1 SAMPLE module 7
  [in] | u32TriggerDelayTime | Decides the trigger delay time, valid range are between 0~0xFF.
  [in] | u32DelayClockDivider | Decides the trigger delay clock divider. Valid values are: EADC_SPCTL_TRGDLYDIV_DIVIDER_1 : Trigger delay clock frequency is ADC_CLK/1 EADC_SPCTL_TRGDLYDIV_DIVIDER_2 : Trigger delay clock frequency is ADC_CLK/2 EADC_SPCTL_TRGDLYDIV_DIVIDER_4 : Trigger delay clock frequency is ADC_CLK/4 EADC_SPCTL_TRGDLYDIV_DIVIDER_16 : Trigger delay clock frequency is ADC_CLK/16

Returns
  None

User can configure the trigger delay time by setting TRGDLYCNT (EADC_ADxSPCTLn[15:8], x=0~1, n=0~7) and TRGDLYDIV (EADC_ADxSPCTLn[17:16], x=0~1, n=0~7). Trigger delay time = (u32TriggerDelayTime) x Trigger delay clock period.

Definition at line 157 of file eadc.c.