CMSIS-Core (Cortex-A): PL1 Physical Timer Value register (CNTP_TVAL)

| CMSIS-Core (Cortex-A) Version 1.0.0 CMSIS-Core support for Cortex-A processor-based devices

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PL1 Physical Timer Value register (CNTP_TVAL)
Core Register Access

Holds the timer value for the PL1 physical timer. More...

## Functions
__STATIC_INLINE void | __set_CNTP_TVAL (uint32_t value)
| Set CNTP_TVAL (PL1 Physical TimerValue Register) More...
__STATIC_INLINE uint32_t | __get_CNTP_TVAL ()
| Get CNTP_TVAL (PL1 Physical TimerValue Register) More...

## Description

Consider __get_CNTP_TVAL and __set_CNTP_TVAL to access this register.

Consider using Generic Physical Timer Functions for controlling the PL1 Timer instead.

## Function Documentation

__STATIC_INLINE uint32_t __get_CNTP_TVAL | ( |  | ) |

Returns
  CNTP_TVAL Register value

This function returns the value of the PL1 Physical Timer Value register (CNTP_TVAL).

__STATIC_INLINE void __set_CNTP_TVAL | ( | uint32_t | value | ) |

Parameters

  [in] | value | CNTP_TVAL Register value to set

This function assigns the given value to PL1 Physical Timer Value register (CNTP_TVAL).